Marc Bocquet
Enseignant Chercheur (Professeur des universités) à l'université d'Aix-Marseille.
104
Documents
Presentation
Professeur des Universités - 63ème section CNU
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Unités de rattachement actuelles
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### Laboratoire de recherche :
Institut Matériaux Microélectronique Nanosciences de Provence (Im2np)
Im2np, UMR CNRS 7334 et Université d'Aix-Marseille <http://www.im2np.fr>
Equipe Mémoires - Département ASCE
### Composante d'enseignement :
IUT dpt GEII de Marseille
<https://iut.univ-amu.fr/departements/geii-marseille>
Responsabilités Administratives
### Laboratoire
- Depuis 2017 : Co-responsable de l'équipe Mémoires de l'IM2NP
- Depuis 2017 : Membre du conseil scientifique de l'IM2NP
### Unité de Formation
- 2019-2020 : Co-responsable de la 2ème année du cycle préparatoire intégrée de Polytech Marseille
- 2014-2019 : Responsable d'année du département MT de Polytech Marseille
- 2012-2014 : Responsable d'un parcours d'enseignement au département MT de Polytech Marseille
Diplômes
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- Juin 2017 : Habilitation à diriger les recherches (HDR), Université d’Aix-Marseille.
- Novembre 2009 : Thèse de doctorat en Micro&NanoElectronique de l'INPG, Grenoble.
- 2005-2006 : Master NanoTechnologies Université Joseph Fourier, Grenoble, mention bien
- 2003-2006 : Diplôme d'ingénieur ENSERG - INPG, Grenoble, mention très bien
Activité d'enseignement
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Volume : Environ 2500 HETD enseignées depuis 2006
Niveaux : Cycle préparatoire (2A), école d'ingénieur (3A-4A-5A), formation continue
Matières enseignés : Base de l'électronique numérique, microcontrôleur, électrotechnique, physique et technologie des composants à semi-conducteur, mémoires non-volatiles
Thématiques de recherche
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### Mots-clefs thématiques :
Technologies mémoires émergentes, micro-nanoélectronique, électronique flexible, mémoires non-volatiles, mémoires résistives, RRAM, CBRAM, PCM, FRAM
### Compétences :
Microscopie champ proche (AFM, EFM, KPFM, C-AFM), caractérisation électrique sous pointes, modélisation physique, modélisation compacte
### Thèmes :
- Modélisation et caractérisation des mémoires innovantes : RRAM, PCRAM, FRAM
- Développement technologique de dispositifs mémoires sur support souple\\\\
- Optimisation de nouvelles architectures mémoires de type EEPROM/Flash
Projets de recherche
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Implication en tant que participant (P) ou coordinateur (C) :
- ANR Neuronic (2019-2023) (C)
- IPCEI Nano2022 (2019-2022) (C)
- UNICO Chist-ERA (2019-2022) (P)
- ANR Reflex (2012-2015) (P)
- ANR Dipmem (2012-2015) (P)
- Carnot POLYMEM (2014) (P)
Expertises Nationales
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- Participation à des jurys de thèse : 2 en tant que président, 4 en tant que rapporteur et 1 en tant que Examinateur
- Depuis 2016 : Expertise de dossiers AGIR-PEPS, ANR, IRS, projet region.
- 2013 : Membre de la commission de Spécialité de la 63ème section collège B
Encadrement doctoral
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- 4 thèses en co-encadrement soutenues
- 2 thèses en co-encadrement en cours.
- Co-encadrement de thèses sous contrat CIFRE et CTBU CEA.
Dissémination scientifique
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- 105 publications
- 25 revues internationales à comité de lecture.
- 54 proceedings de conférences internationales à comité de lecture.
- 2 articles de vulgarisation scientifiques.
- 7 conférences invitées
- 1 brevet.
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Memory Window in Si:HfO 2 FeRAM arrays: Performance Improvement and Extrapolation at Advanced NodesIMW 2023 - 2023 IEEE International Memory Workshop, IEEE, May 2023, Monterey (CA), United States. pp.1-4, ⟨10.1109/IMW56887.2023.10145972⟩
Conference papers
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Experimental Demonstration of Memristor Delay-Based Logic In-Memory Ternary Neural Network2023 Silicon Nanoelectronics Workshop (SNW), Jun 2023, Kyoto, Japan. pp.43-44, ⟨10.23919/SNW57900.2023.10183957⟩
Conference papers
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A Multimode Hybrid Memristor-CMOS Prototyping Platform Supporting Digital and Analog Projects2023 28th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan 2023, Tokyo (Japan), France. pp.184-185, ⟨10.1145/3566097.3567944⟩
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Energy-Efficient Bayesian Inference Using Near-Memory Computation with Memristors2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), Apr 2023, Antwerp, Belgium. pp.1-2, ⟨10.23919/DATE56975.2023.10137312⟩
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Bayesian In-Memory Computing with Resistive Memories2023 International Electron Devices Meeting (IEDM), Dec 2023, San Francisco, United States. pp.1 - 4, ⟨10.1109/iedm45741.2023.10413773⟩
Conference papers
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Binary ReRAM-based BNN first-layer implementation2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), Apr 2023, Antwerp, Belgium. pp.1-6, ⟨10.23919/DATE56975.2023.10137057⟩
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1S1R sub-threshold operation in Crossbar arrays for low power BNN inference computingIMW 2022 - IEEE International Memory Workshop, May 2022, Dresden, Germany. pp.1-4, ⟨10.1109/IMW52921.2022.9779253⟩
Conference papers
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Hot Electron Source Side Injection Comprehension in 40nm eSTM™2021 IEEE International Memory Workshop (IMW), May 2021, Dresden, France. pp.1-4, ⟨10.1109/IMW51353.2021.9439613⟩
Conference papers
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CAPC: A Configurable Analog Pop-Count Circuit for Near-Memory Binary Neural Networks2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Aug 2021, Lansing, France. pp.158-161, ⟨10.1109/MWSCAS47672.2021.9531919⟩
Conference papers
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16kbit HfO 2 :Si-based 1T-1C FeRAM Arrays Demonstrating High Performance Operation and Solder Reflow Compatibility67th Annual IEEE International Electron Devices Meeting (IEDM) 2021, Dec 2021, San Francisco, United States. ⟨10.1109/IEDM19574.2021.9720640⟩
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Low-Overhead Implementation of Binarized Neural Networks Employing Robust 2T2R Resistive RAM BridgesESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC), Sep 2021, Grenoble, France. pp.83-86, ⟨10.1109/ESSCIRC53450.2021.9567742⟩
Conference papers
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Ge-Se-Sb-N-based OTS scaling perspectives for high-density 1S1R crossbar arrays2021 IEEE INTERNATIONAL MEMORY WORKSHOP (IMW), May 2021, Dresde, Germany. pp.107-110, ⟨10.1109/IMW51353.2021.9439606⟩
Conference papers
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In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), Mar 2020, Grenoble, France. pp.690-695, ⟨10.23919/DATE48585.2020.9116439⟩
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Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2020, Genova (virtual), Italy. ⟨10.1109/AICAS48895.2020.9073877⟩
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Embracing the unreliability of memory devices for neuromorphic computingIRPS 2020 - IEEE International Reliability Physics Symposium, IEEE, Apr 2020, Dallas (Texas), United States. pp.1-5, ⟨10.1109/IRPS45951.2020.9128346⟩
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High-Density 3D Monolithically Integrated Multiple 1T1R Multi-Level-Cell for Neural Networks2020 IEEE International Electron Devices Meeting (IEDM), Dec 2020, San Francisco (virtual), United States. pp.36.5.1-36.5.4, ⟨10.1109/IEDM13553.2020.9372019⟩
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Outstanding Bit Error Tolerance of Resistive RAM-Based Binarized Neural NetworksIEEE International Conference on Artificial Intellignence Circuits and Systems (AICAS), Mar 2019, Hsinshu, Taiwan. ⟨10.1109/AICAS.2019.8771544⟩
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Hybrid Analog-Digital Learning with Differential RRAM Synapses2019 IEEE International Electron Devices Meeting (IEDM), Dec 2019, San Francisco, United States. ⟨10.1109/IEDM19573.2019.8993555⟩
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Ferroelectric HfO2 for Memory Applications: Impact of Si Doping Technique and Bias Pulse Engineering on Switching Performance2019 IEEE 11th International Memory Workshop (IMW), May 2019, Monterey, United States. pp.1-4, ⟨10.1109/IMW.2019.8739664⟩
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Memory-Centric Neuromorphic Computing With NanodevicesBiomedical Circuits and Systems Conference (BiOCAS), Oct 2019, Nara, Japan. ⟨10.1109/BIOCAS.2019.8919010⟩
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Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction15th IEEE / ACM International Symposium on Nanoscale Architectures (NANOARCH), Jul 2019, Qingdao, China
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Demonstration of BEOL-compatible ferroelectric Hf 0.5 Zr 0.5 O 2 scaled FeRAM co-integrated with 130nm CMOS for embedded NVM applications2019 IEEE International Electron Devices Meeting (IEDM), Dec 2019, San Francisco, United States. ⟨10.1109/IEDM19573.2019.8993485⟩
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Resistive and spintronic RAMs: device, simulation, and applicationsIOLTS 2018 - IEEE 24th International Symposium on On-Line Testing And Robust System Design, Jul 2018, Platja d'Aro, Spain. pp.109-114, ⟨10.1109/IOLTS.2018.8474226⟩
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In-Memory and Error-Immune Differential RRAM Implementation of Binarized Deep Neural Networks2018 IEEE International Electron Devices Meeting (IEDM), Dec 2018, San Francisco, United States. pp.20.6.1-20.6.4, ⟨10.1109/IEDM.2018.8614639⟩
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Impact of a laser pulse on a STT-MRAM bitcell: security and reliability issues2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS), Jul 2018, Platja d'Aro, Spain. pp.243-244, ⟨10.1109/IOLTS.2018.8474088⟩
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PCM compact model: Optimized methodology for model card extraction2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Sep 2018, Austin, United States. pp.190-193, ⟨10.1109/SISPAD.2018.8551654⟩
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Thermal Laser Attack and High Temperature Heating on HfO2-based OxRAM CellsInternational Symposium on On-Line Testing and Robust System Design, Jul 2017, Thessaloniki, Greece
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ReRAM ON/OFF resistance ratio degradation due to line resistance combined with device variability in 28nm FDSOI technology2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), Apr 2017, Athens, Greece. ⟨10.1109/ULIS.2017.7962594⟩
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Continuous Multilevel Compact Model of Subthreshold Conduction and Threshold Switching in Phase-Change Memory49th International Conference on Solid State Devices and Materals, Sep 2017, Tsukuba, Japan
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Functionality and reliability of resistive RAM (RRAM) for non-volatile memory applications2016 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS AND APPLICATION (VLSI-TSA), 2016, Unknown, Unknown Region
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Impact of a Laser Pulse On HfO$_2$-based RRAM Cells Reliability and Integrity2016 INTERNATIONAL CONFERENCE ON MICROELECTRONIC TEST STRUCTURES (ICMTS), 2016, Unknown, Unknown Region. pp.152-156
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Multilevel Operation in Oxide Based Resistive RAM with SET voltage modulation2016 11TH IEEE INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE ERA (DTIS), Apr 2016, Istanbul, Turkey. pp.1-5, ⟨10.1109/DTIS.2016.7483892⟩
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Flash gate optimized process and integration for electrical performances requirement on advanced embedded memory2016 International Symposium on Semiconductor Manufacturing (ISSM), Dec 2016, Tokyo, Japan. ⟨10.1109/ISSM.2016.7934533⟩
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Critical sensitivity of flash gate dimension spread on electrical performances for advanced embedded memory2015 26th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC), May 2015, Saratoga Springs, United States. ⟨10.1109/ASMC.2015.7164428⟩
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Investigation of the potentialities of Vertical Resistive RAM (VRRAM) for neuromorphic applications2015 IEEE International Electron Devices Meeting (IEDM), Dec 2015, Washington, United States. pp.17.2.1-17.2.4, ⟨10.1109/IEDM.2015.7409717⟩
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Resistive memories: Which applications?Design Automation and Test in Europe, Mar 2014, Dresden, France. ⟨10.7873/DATE.2014.282⟩
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Oxide based resistive RAM: ON/OFF resistance analysis versus circuit variability2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2014, Amsterdam, Netherlands. ⟨10.1109/DFT.2014.6962107⟩
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Effect of SET temperature on data retention performances of HfO2-based RRAM cells2014 IEEE 6th International Memory Workshop (IMW), May 2014, Taipei, France. ⟨10.1109/IMW.2014.6849355⟩
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Fabrication and characterization of ECM memories based on a Ge2Sb2Te5 solid electrolyte2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Jun 2014, Grenoble, France. ⟨10.1109/PRIME.2014.6872754⟩
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Printed complementary organic thin film transistors based decoder for ferroelectric memoryESSCIRC 2014 - 40th European Solid State Circuits Conference, Sep 2014, Venice Lido, France. ⟨10.1109/ESSCIRC.2014.6942034⟩
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A Built-In Self-Test Structure (BIST) for Resistive RAMs Characterization: Application to Bipolar OxRRAMsInternational Semiconductor Device Research Symposium, Dec 2013, Bethesda, United States
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Analytical study of complementary memristive synchronous logic gates2013 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Jul 2013, Brooklyn, United States. ⟨10.1109/NanoArch.2013.6623047⟩
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Temperature impact (up to 200°C) on performance and reliability of HfO2-based RRAMs2013 5th IEEE International Memory Workshop (IMW), May 2013, Monterey, United States. ⟨10.1109/IMW.2013.6582112⟩
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Single-ended sense amplifier robustness evaluation for OxRRAM technology2013 IEEE Design and Test Symposium (IDT), Dec 2013, Marrakesh, Morocco. ⟨10.1109/IDT.2013.6727097⟩
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SPICE level analysis of Single Event Effects in an OxRRAM cell2013 14th Latin American Test Workshop - LATW, Apr 2013, Cordoba, France. ⟨10.1109/LATW.2013.6562684⟩
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Synchronous Full-Adder based on Complementary Resistive Switching Memory Cells11th International New Circuits and Systems Conference (NEWCAS), Jun 2013, Paris, France. ⟨10.1109/NEWCAS.2013.6573578⟩
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Crossbar architecture based on 2R complementary resistive switching memory cell 2012 IEEE/ACM International Symposium on Nanoscale Architectures , Jul 2012, Amsterdam, Netherlands. ⟨10.1145/2765491.2765508⟩
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Resistance switching variability in HfO2-based memory structures with different electrodesEMRS Spring Meeting 2012, May 2012, Strasbourg France
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Bipolar ReRAM Based Non-‐Volatile Flip-‐flops for Low-‐Power Architectures2012 IEEE 10th International New Circuits and Systems Conference (NEWCAS), Jun 2012, Montreal, Canada. ⟨10.1109/NEWCAS.2012.6329045⟩
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Role of Ti and Pt electrodes on resistance switching variability of HfO$_2$-based Resistive Random Access MemoryEMRS 2012 symposium L: Novel functional materials and nanostructures for innovative non-volatile memory devices, May 2012, Strasbourg, France. pp.19 - 23, ⟨10.1016/j.tsf.2012.11.050⟩
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Design challenges for prototypical and emerging memory concepts relying on resistance switching2011 IEEE Custom Integrated Circuits Conference (CICC 2011), Sep 2011, San Jose, CA, United States. ⟨10.1109/CICC.2011.6055316⟩
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On the electrical variability of resistive-switching memory devices based on NiO oxide2011 IEEE 42nd Semiconductor Interface Specialists Conference (SISC), Dec 2011, Arlington, United States
Conference papers
hal-01745633v1
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Layered HfSiON-based tunnel stacks for voltage reduction and improved reliability in TANOS memoriesProceedings of 2010 International Symposium on VLSI Technology, System and Application, Apr 2010, Hsin Chu, France. ⟨10.1109/VTSA.2010.5488949⟩
Conference papers
hal-01745640v1
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Investigation of the role of H-related defects in Al2O3 blocking layer on charge-trap memory retention by atomistic simulations and device physical modellingIEEE IEDM 2010,, 2010, San Francisco, CA, Spain
Conference papers
hal-00604550v1
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Charge Localization During Program and Retention in NROM-like Nonvolatile Memory Devices.International Conference on Solid State Devices and Materials (SSDM), 2009, Sendai, Japan
Conference papers
hal-00604215v1
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New Physical Model for ultra-scaled 3D Nitride-Trapping Non-Volatile Memories.IEEE International Electron Devices Meeting 2008, San Francisco, USA, Dec 2008, San Francisco, United States
Conference papers
hal-00392162v1
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Reliability of charge trapping memories with high-k control dielectrics5th International Symposium on Advanced Gate Stack Technology, Austin, Texas, Sep 2008, Austin, United States
Conference papers
hal-00392559v1
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On the Role of a HTO/Al2O3 Bi-Layer Blocking Oxide in Nitride-Trap Non-Volatile Memories38th European Solid-State Device Research Conference (ESSDERC'08), Edinburgh, UK, Sep 2008, Edinburgh, France
Conference papers
hal-00392558v1
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Intrinsic fixed charge and trapping properties of HfAlO interpoly dielectric layersInternational Conference on Memory Technology and Design (ICMTD), May 2007, Giens, France
Conference papers
hal-01745578v1
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Thorough investigation of Si-nanocrystal memories with high-k interpoly dielectrics for sub-45nm node Flash NAND applications2007 IEEE International Electron Devices Meeting - IEDM '07, Dec 2007, Washington, France. pp.453-456, ⟨10.1109/IEDM.2007.4418971⟩
Conference papers
hal-02072903v1
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In-depth Investigation of Hf-based High-k Dielectrics as Storage Layer of Charge-TrapNVMsIEDM 2006, 2006, San Francisco, United States. pp.XX
Conference papers
hal-00147137v1
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Powering AI at the edge: A robust, memristor-based binarized neural network with near-memory computing and miniaturized solar cellJournées Scientifiques Nationales 2024 du PEPR électronique et PEPR réseaux du futur, Mar 2024, Grenoble, France
Conference poster
hal-04699105v1
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NH 3 treatments of Hf-based layers for application as NVM active dielectricsIEEE Semiconductor Interface Specialists Conference (SISC), Dec 2007, Arlington, United States
Conference poster
hal-01745607v1
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Intégration de matériaux à forte permittivité électrique (High-k) dans les mémoires non-volatiles pour les générations sub-45nmMicro et nanotechnologies/Microélectronique. Institut National Polytechnique de Grenoble (INPG), 2009. Français. ⟨NNT : ⟩
Theses
tel-01737690v1
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Caractérisation et modélisation compacte de mémoires émergentesMicro et nanotechnologies/Microélectronique. Aix Marseille Université, 2017
Habilitation à diriger des recherches
tel-01737675v1
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