Brice Colombier
Maître de conférences
10
Documents
Affiliations actuelles
- 17835
Identifiants chercheurs
- brice-colombier
- Google Scholar : qDo2dnoAAAAJ
- 0000-0002-6028-3028
Site web
- https://bcolombier.fr
Publications
- 10
- 5
- 5
- 2
- 1
- 6
- 2
- 2
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Key Reconciliation Protocols for Error Correction of Silicon PUF ResponsesIEEE Transactions on Information Forensics and Security, 2017, 12 (8), pp.1988-2002. ⟨10.1109/TIFS.2017.2689726⟩
Article dans une revue
ujm-01575582v1
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From Secured Logic to IP ProtectionMicroprocessors and Microsystems: Embedded Hardware Design , 2016, 47 (Part A), pp.44-54. ⟨10.1016/j.micpro.2016.02.010⟩
Article dans une revue
hal-01280195v1
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A comprehensive hardware/software infrastructure for IP cores design protectionIEEE International Conference on Field-Programmable Technology, ICFPT 2017, Dec 2017, Melbourne, Australia
Communication dans un congrès
hal-01632978v1
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Centrality Indicators for Efficient and Scalable Logic MaskingIn International CryptArchi Workshop 2017, Jun 2017, Smolenice, Slovakia
Communication dans un congrès
hal-01586818v1
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Centrality Indicators for Efficient and Scalable Logic MaskingIEEE Computer Society Annual Symposium on VLSI (ISVLSI 2017), IEEE, Jul 2017, Bochum, Germany. pp.98-103, ⟨10.1109/ISVLSI.2017.26⟩
Communication dans un congrès
ujm-01570080v1
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Key Reconciliation Protocols: an Alternative for Lightweight Authentication of Integrated CircuitsInternational CryptArchi Workshop , Jun 2016, La Grande-Motte, France
Communication dans un congrès
hal-01382983v1
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Reversible Denial-of-Service by Locking Gates Insertion for IP Cores Design ProtectionInternational CryptArchi Workshop 2015, Jun 2015, Leuven, Belgium
Communication dans un congrès
hal-01382976v1
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Reversible Denial-of-Service by Locking Gates Insertion for IP Cores Design Protection{IEEE} Computer Society Annual Symposium on VLSI, CNRS-LIRMM, France, Jul 2015, Montpellier, France
Communication dans un congrès
ujm-01180564v1
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Logic Modification-Based IP Protection Methods: An Overview and a ProposalBossuet, Lilian, Torres, Lionel. Foundations of Hardware IP Protection, 2, Springer, pp.30-64, 2017, 978-3-319-50378-3
Chapitre d'ouvrage
ujm-01570115v1
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Turning Electronic Circuits Features into On-Chip LocksLilian Bossuet; Lionel Torres. Foundations of Hardware IP Protection, Springer International Publishing, pp.15-36, 2017, 978-3-319-50378-3. ⟨10.1007/978-3-319-50380-6_2⟩
Chapitre d'ouvrage
hal-02426141v1
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