Florent de Dinechin

120

Documents

Publications

Reconfigurable Constant Multipliers: Hardware Models, Optimization Algorithm and Applications

Bastien Barbe , Louis Ledoux , Anastasia Volkova , Florent de Dinechin

Microprocessors and Microsystems: Embedded Hardware Design , 2026, pp.105270. ⟨10.1016/j.micpro.2026.105270⟩

Article dans une revue hal-05510936v1

Towards Optimized Arithmetic Circuits with MLIR

Louis Ledoux , Pierre Cochard , Florent de Dinechin

Works in Progress in Embedded Computing Journal, 2025, 11 (1), pp.4. ⟨10.64552/wipiec.v11i1.90⟩

Article dans une revue hal-05385229v1

Computer Arithmetic: Continuing a Long and Steady Emergence

Paolo Montuschi , Jean-Michel Muller , Florent de Dinechin

Computer, 2022, 55 (10), pp.4-6. ⟨10.1109/MC.2022.3193206⟩

Article dans une revue hal-03806577v1

Lossless Differential Table Compression for Hardware Function Evaluation

Maxime Christ , Luc Forget , Florent de Dinechin

IEEE Transactions on Circuits and Systems II: Express Briefs, 2021, ⟨10.1109/TCSII.2021.3131405⟩

Article dans une revue hal-03040364v2

Application-specific arithmetic in high-level synthesis tools

Yohann Uguen , Florent de Dinechin , Victor Lezaud , Steven Derrien

ACM Transactions on Architecture and Code Optimization, 2020, ⟨10.1145/3377403⟩

Article dans une revue hal-02423363v3

Guest Editors Introduction: Special Section on Computer Arithmetic

Javier Bruguera , Florent de Dinechin

IEEE Transactions on Computers, 2019, 68 (7), pp.951-952. ⟨10.1109/TC.2019.2918447⟩

Article dans une revue hal-02151757v1

Towards Hardware IIR Filters Computing Just Right: Direct Form I Case Study

Anastasia Volkova , Matei Istoan , Florent de Dinechin , Thibault Hilaire

IEEE Transactions on Computers, 2019, 68 (4), pp.597 - 608. ⟨10.1109/TC.2018.2879432⟩

Article dans une revue hal-01561052v3

Hardware division by small integer constants

Fatih Ugurdag , Florent de Dinechin , Yilmaz Serhan Gener , Sezer Gören , Laurent-Stéphane Didier

IEEE Transactions on Computers, 2017, ⟨10.1109/TC.2017.2707488⟩

Article dans une revue hal-01402252v2

Improving Energy Efficiency of OFDM Using Adaptive Precision Reconfigurable FFT

Hatam Abdoli , Hooman Nikmehr , Naser Movahedinia , Florent de Dinechin

Circuits, Systems, and Signal Processing, 2016, ⟨10.1007/s00034-016-0435-z⟩

Article dans une revue hal-01402231v1

Floating-Point Exponentiation Units for Reconfigurable Computing

Florent de Dinechin , Pedro Echeverria , Marisa Lopez-Vallejo , Bogdan Pasca

ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2013, 6 (1), pp.4:1--4:15. ⟨10.1145/2457443.2457447⟩

Article dans une revue ensl-00718637v1

On Ziv's rounding test

Florent de Dinechin , Christoph Lauter , Jean-Michel Muller , Serge Torres

ACM Transactions on Mathematical Software, 2013, 39 (4), pp.26

Article dans une revue ensl-00693317v2

Multiplication by rational constants

Florent de Dinechin

IEEE Transactions on Circuits and Systems Part 2 Analog and Digital Signal Processing, 2012, pp.00. ⟨10.1109/TCSII.2011.2177706⟩

Article dans une revue ensl-00610328v3

Certifying the floating-point implementation of an elementary function using Gappa

Florent de Dinechin , Christoph Lauter , Guillaume Melquiond

IEEE Transactions on Computers, 2011, 60 (2), pp.242-253. ⟨10.1109/TC.2010.128⟩

Article dans une revue ensl-00200830v2

Designing Custom Arithmetic Data Paths with FloPoCo

Florent de Dinechin , Bogdan Pasca

IEEE Design & Test, 2011, 28, pp.18-27

Article dans une revue ensl-00646282v1

Fonctions élémentaires en virgule flottante pour les accélérateurs reconfigurables

Jérémie Detrey , Florent de Dinechin

Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, 2008, Architecture des Ordinateurs, 27 (6), pp.673-698. ⟨10.3166/tsi.27.673-698⟩

Article dans une revue inria-00424001v1

A Tool for Unbiased Comparison between Logarithmic and Floating-point Arithmetic

Florent de Dinechin , Jérémie Detrey

Journal of Signal Processing Systems, 2007, 49 (1), pp.161-175. ⟨10.1007/s11265-007-0048-7⟩

Article dans une revue istex ensl-00542212v1

Fast and correctly rounded logarithms in double precision

Jean-Michel Muller , Florent de Dinechin , Christoph Lauter

RAIRO - Theoretical Informatics and Applications (RAIRO: ITA), 2007, 41 (1), pp.85-102. ⟨10.1051/ita:2007003⟩

Article dans une revue ensl-00000007v2

Parameterized floating-point logarithm and exponential functions for FPGAs

Florent de Dinechin , Jérémie Detrey

Microprocessors and Microsystems: Embedded Hardware Design , 2006, 31 (8), pp.537-545. ⟨10.1016/j.micpro.2006.02.008⟩

Article dans une revue ensl-00542213v1

Multipartite table methods

Florent de Dinechin , Arnaud Tisserand

IEEE Transactions on Computers, 2005, 54 (3), pp.319-330

Article dans une revue ensl-00542210v1

Reducing the Hardware Gap for Custom Accelerators through Quantization Aware Training

Bastien Barbe , Romain Bouarah , Florent de Dinechin , Anastasia Volkova

AccML 2026 - 8th Workshop on Accelerated Machine Learning, Jan 2026, Krakow (Cracovie), Poland

Communication dans un congrès hal-05466817v2

Reciprocal Square Root Accelerated Using Hardware and Software Techniques

Orégane Desrentes , Florent de Dinechin , Benoît Dupont de Dinechin

RAIM Meeting 2025: 16th Rencontres de l'Arithmétique en Informatique Mathématique – A Tribute to Jean-Michel Muller, Nov 2025, Lyon, France

Communication dans un congrès hal-05461486v1

Hardware Fixed-Point 2D and 3D norms

Romain Bouarah , Florent de Dinechin

32nd IEEE International Symposium on Computer Arithmetic - ARITH 2025, May 2025, El Paso, Texas, United States

Communication dans un congrès hal-04986776v1

Double-Word Decomposition in a Combined FP16, BF16 and FP32 Dot Product Add Operator

Orégane Desrentes , Benoît Dupont de Dinechin , Florent de Dinechin

ARITH 2025 - IEEE 32nd International Symposium on Computer Arithmetic, May 2025, El-Paso, Texas, United States

Communication dans un congrès hal-04982397v2

RETROSPECTIVE: Table-based polynomials for fast hardware function evaluation

Florent de Dinechin

ASAP 2025 - 36th IEEE International Conference on Application-specific Systems, Architectures and Processors, Jul 2025, Vancouver (British Columbia), Canada

Communication dans un congrès hal-05139896v1

Hardware-optimal digital FIR filters: one ILP to rule them all and in faithfulness bind them

Anastasia Volkova , Rémi Garcia , Florent de Dinechin , Martin Kumm

2023 Asilomar Conference on Signals, Systems, and Computers, Oct 2023, Asilomar, United States

Communication dans un congrès hal-04398268v1

Towards Fixed-Point Formats Determination for Faust Programs

Agathe Herrou , Florent de Dinechin , Stéphane Letz , Yann Orlarey , Anastasia Volkova

Journées d'Informatique Musicale 2024, May 2024, Marseille, France

Communication dans un congrès hal-04489647v1

Exact Fused Dot Product Add Operators

Orégane Desrentes , Benoît Dupont de Dinechin , Florent de Dinechin

2023 ARITH - 30th IEEE International Symposium on Computer Arithmetic, Sep 2023, Portland, OR, United States

Communication dans un congrès hal-04240762v1

Using integer linear programming for correctly rounded multipartite architectures

Orégane Desrentes , Florent de Dinechin

FPT 2022 - International Conference on Field Programmable Technology, Dec 2022, Hong Kong, China

Communication dans un congrès hal-03844218v1

Resource Optimal Squarers for FPGAs

Andreas Böttcher , Martin Kumm , Florent de Dinechin

International Conference on Field-Programmable Logic and Applications (FPL), Aug 2022, Belfast, United Kingdom. ⟨10.1109/FPL57034.2022.00018⟩

Communication dans un congrès hal-03922311v1

Low-precision logarithmic arithmetic for neural network accelerators

Maxime Christ , Florent de Dinechin , Frédéric Pétrot

33rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2022), IEEE, Jul 2022, Gothenburg, Sweden. ⟨10.1109/ASAP54787.2022.00021⟩

Communication dans un congrès hal-03684585v1

A single-source C++20 HLS flow for function evaluation on FPGA and beyond

Luc Forget , Gauthier Harnisch , Ronan Keryell , Florent de Dinechin

HEART 2022 - 12th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Jun 2022, Tsukuba, Japan

Communication dans un congrès hal-03684757v1

Resource Optimal Truncated Multipliers for FPGAs

Andreas Böttcher , Martin Kumm , Florent de Dinechin

ARITH 2021 - 28th IEEE International Symposium on Computer Arithmetic, Jun 2021, Torino, Italy. pp.1-8, ⟨10.1109/ARITH51176.2021.00029⟩

Communication dans un congrès hal-03220290v1

Towards Arithmetic-Centered Filter Design

Florent de Dinechin , Silviu-Ioan Filip , Martin Kumm , Anastasia Volkova

ARITH 2021 - 28th IEEE Symposium on Computer Arithmetic, Jun 2021, Torino, Italy. pp.1-4, ⟨10.1109/ARITH51176.2021.00032⟩

Communication dans un congrès hal-03220258v1

Next Generation Arithmetic for Edge Computing

Andre Guntoro , Cecilia de La Parra , Farhad Merchant , Florent de Dinechin , John Gustafson et al.

DATE 2020 - Design, Automation and Test in Europe Conference, Mar 2020, Grenoble, France. pp.1357-1365, ⟨10.23919/DATE48585.2020.9116196⟩

Communication dans un congrès hal-03114381v1

Reflections on 10 years of FloPoCo

Florent de Dinechin

ARITH 2019 - 26th IEEE Symposium on Computer Arithmetic, Jun 2019, kyoto, Japan. pp.1-3

Communication dans un congrès hal-02161527v1

SMURF: Scalar Multiple-precision Unum Risc-V Floating-point Accelerator for Scientific Computing

Andrea Bocco , Yves Durand , Florent de Dinechin

CoNGA 2019 - Conference on Next-Generation Arithmetic, Mar 2019, Singapour, Singapore. pp.1-8, ⟨10.1145/3316279.3316280⟩

Communication dans un congrès hal-02087098v1

Variable Precision Floating-Point RISC-V Coprocessor Evaluation using Lightweight Software and Compiler Support

Tiago T Jost , Andrea Bocco , Yves Durand , Christian Fabre , Florent de Dinechin et al.

CARRV 2019 - Third Workshop on Computer Architecture Research with RISC-V, Jun 2019, Phoenix, AZ, United States. pp.1-6

Communication dans un congrès hal-02161621v1

Table-Based versus Shift-And-Add constant multipliers for FPGAs

Florent de Dinechin , Silviu-Ioan Filip , Luc Forget , Martin Kumm

ARITH 2019 - 26th IEEE Symposium on Computer Arithmetic, Jun 2019, Kyoto, Japan. pp.1-8

Communication dans un congrès hal-02147078v1

Posits: the good, the bad and the ugly

Florent de Dinechin , Luc Forget , Jean-Michel Muller , Yohann Uguen

CoNGA 2019 - Conference on Next-Generation Arithmetic, Mar 2019, Singapore, Singapore. pp.1-10, ⟨10.1145/3316279.3316285⟩

Communication dans un congrès hal-01959581v4

Evaluating the hardware cost of the posit number system

Yohann Uguen , Luc Forget , Florent de Dinechin

FPL 2019 - 29th International Conference on Field-Programmable Logic and Applications (FPL), Sep 2019, Barcelona, Spain. pp.106 - 113

Communication dans un congrès hal-02130912v4

A type-safe arbitrary precision arithmetic portability layer for HLS tools

Luc Forget , Yohann Uguen , Florent de Dinechin , David Thomas

HEART 2019 - International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Jun 2019, Nagasaki, Japan. pp.1-6, ⟨10.1145/3337801.3337809⟩

Communication dans un congrès hal-02131798v2

Karatsuba with Rectangular Multipliers for FPGAs

Martin Kumm , Oscar Gustafsson , Florent de Dinechin , Johannes Kappauf , Peter Zipf

ARITH 2018 - 25th IEEE International Symposium on Computer Arithmetic, Jun 2018, Amherst, United States. pp.13-20, ⟨10.1109/ARITH.2018.8464809⟩

Communication dans un congrès hal-01773447v1

Une architecture minimisant les échanges entre processeur et mémoire

Florent de Dinechin , Maxime Darrin , Antonin Dudermel , Sébastien Michelland , Alban Reynaud

ComPAS 2018 - Conférence d’informatique en Parallélisme, Architecture et Système, Jul 2018, Toulouse, France. pp.1-8

Communication dans un congrès hal-01959855v1

Automating the pipeline of arithmetic datapaths

Matei Istoan , Florent de Dinechin

Design, Automation & Test in Europe Conference & Exhibition (DATE 2017), Mar 2017, Lausanne, Switzerland

Communication dans un congrès hal-01373937v2

Hardware support for UNUM floating point arithmetic

Andrea Bocco , Yves Durand , Florent de Dinechin

13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Jun 2017, Taormina, Italy. pp.93 - 96, ⟨10.1109/PRIME.2017.7974115⟩

Communication dans un congrès hal-01618698v1

Bridging High-Level Synthesis and Application-Specific Arithmetic: The Case Study of Floating-Point Summations

Yohann Uguen , Florent de Dinechin , Steven Derrien

27th International Conference on Field-Programmable Logic and Applications (FPL), IEEE, Sep 2017, Gent, Belgium. pp.8

Communication dans un congrès hal-01373954v2

A high-level synthesis approach optimizing accumulations in floating-point programs using custom formats and operators

Yohann Uguen , Florent de Dinechin , Steven Derrien

2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), Apr 2017, Napa, United States. pp.80-80, ⟨10.1109/FCCM.2017.41⟩

Communication dans un congrès hal-01498357v2

Exploration architecturale de l'accumulateur de Kulisch

Yohann Uguen , Florent de Dinechin

Compas'2017 - Conférence d’informatique en Parallélisme, Architecture et Système, Jun 2017, Sophia Antipolis, France. pp.1-8

Communication dans un congrès hal-02131977v1

Computing floating-point logarithms with fixed-point operations

Julien Le Maire , Nicolas Brunie , Florent de Dinechin , Jean-Michel Muller

23rd IEEE Symposium on Computer Arithmetic, IEEE, Jul 2016, Santa Clara, United States

Communication dans un congrès hal-01227877v1

Pipeline automatique d’opérateurs dans FloPoCo 5.0

Matei Istoan , Florent de Dinechin

COMPAS'2016: Conférence d’informatique en Parallélisme, Architecture et Système, Jul 2016, Lorient, France

Communication dans un congrès hal-01348007v1

Hardware implementations of fixed-point Atan2

Florent de Dinechin , Matei Istoan

22nd IEEE Symposium on Computer Arithmetic, Jun 2015, Lyon, France

Communication dans un congrès hal-01091138v1

Code generators for mathematical functions

Nicolas Brunie , Florent de Dinechin , Olga Kupriianova , Christoph Lauter

22d IEEE Symposium on Computer Arithmetic, Jun 2015, Lyon, France

Communication dans un congrès hal-01084726v2

Sum-of-Product Architectures Computing Just Right

Florent de Dinechin , Matei Istoan , Albdelbassat Massouri

ASAP - Application-specific Systems, Architectures and Processors, Jun 2014, Zurich, Switzerland

Communication dans un congrès hal-00957609v1

Fixed-Point Trigonometric Functions on FPGAs

Florent de Dinechin , Matei Istoan , Guillaume Sergent

Fourth International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, Jun 2013, Edimburgh, United Kingdom. pp.1-6

Communication dans un congrès ensl-00802777v1

Conception d'une matrice reconfigurable pour coprocesseur fortement couplé

Nicolas Brunie , Florent de Dinechin , Benoît de Dinechin

Symposium en Architectures nouvelles de machines, Jan 2013, France

Communication dans un congrès ensl-00763067v1

Arithmetic core generation using bit heaps

Nicolas Brunie , Florent de Dinechin , Matei Istoan , Guillaume Sergent , Kinga Illyes et al.

23rd International Conference on Field Programmable Logic and Applications, Sep 2013, Porto, Portugal. pp.1-8

Communication dans un congrès ensl-00738412v2

L'arithmétique sur le tas

Nicolas Brunie , Florent de Dinechin , Matei Istoan , Guillaume Sergent

Symposium en Architectures nouvelles de machines, Jan 2013, France

Communication dans un congrès ensl-00762990v1

34 Gb/s PDM-QPSK coherent receiver using SiGe ADCs and a single FPGA for digital signal processing

Eric Dutisseuil , Jean-Marc Tanguy , Adrian Voicila , Rémi Laube , Francois Bore et al.

Optical Fiber Communication Conference, Mar 2012, nc, United States. pp.OM3H.7

Communication dans un congrès ensl-00766801v1

Table-based division by small integer constants

Florent de Dinechin , Laurent-Stéphane Didier

8th International Symposium on Applied Reconﬁgurable Computing (ARC), Mar 2012, Hong Kong, Hong Kong SAR China. pp.53-63, ⟨10.1007/978-3-642-28365-9_5⟩

Communication dans un congrès ensl-00642145v1

Mixed-precision Fused Multiply and Add

Nicolas Brunie , Florent de Dinechin , Benoît de Dinechin

45th Asilomar Conference on Signals, Systems & Computers, Nov 2011, United States. pp.165-169

Communication dans un congrès ensl-00642157v1

The arithmetic operators you will never see in a microprocessor

Florent de Dinechin

20th IEEE Symposium on Computer Arithmetic, Jul 2011, Tuebingen, Germany. pp.189-190

Communication dans un congrès ensl-00642164v1

An FPGA architecture for solving the Table Maker's Dilemma

Florent de Dinechin , Jean-Michel Muller , Bogdan Pasca , Alexandru Plesco

Application-Specific Systems, Architectures and Processors (ASAP), 2011 IEEE International Conference on, Sep 2011, Santa Monica, United States. pp.187-194, ⟨10.1109/ASAP.2011.6043267⟩

Communication dans un congrès ensl-00640063v1

Multiplicative square root algorithms for FPGAs

Florent de Dinechin , Mioara Maria Joldes , Bogdan Pasca , Guillaume Revy

International Conference on Field Programmable Logic and Applications, Aug 2010, Milano, Italy. pp.14, ⟨10.1109/FPL.2010.112⟩

Communication dans un congrès ensl-00475779v2

Automatic generation of polynomial-based hardware architectures for function evaluation

Florent de Dinechin , Mioara Joldes , Bogdan Pasca

Application-specific Systems, Architectures and Processors, Jul 2010, Rennes, France

Communication dans un congrès ensl-00470506v1

LEMA: Towards a Language for Reliable Arithmetic

Vincent Lefèvre , Philippe Théveny , Florent de Dinechin , Claude-Pierre Jeannerod , Christophe Mouilleron et al.

International Workshop on Programming Languages for Mechanized Mathematics Systems (PLMMS 2010), Jul 2010, Paris, France. pp.41-52, ⟨10.1145/1838599.1838622⟩

Communication dans un congrès inria-00542143v1

Code generation for argument filtering and argument reduction in elementary functions

Florent de Dinechin , Claude-Pierre Jeannerod , David Pfannholzer , Nathalie Revol

SCAN 2010: 14th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics, Revol, Nathalie and de Dinechin, Florent and Jeannerod, Claude-Pierre and Lefèvre, Vincent and Louvet, Nicolas and Morin, Sèverine and Nguyen, Hong Diep, Sep 2010, Lyon, France

Communication dans un congrès inria-00544808v1

Floating-point exponential functions for DSP-enabled FPGAs

Florent de Dinechin , Bogdan Pasca

International Conference on Field-Programmable Technology, Dec 2010, Beijing, China. pp.110-117

Communication dans un congrès ensl-00506125v1

Efficient implementation of Parallel BCD Multiplication in LUT-6 FPGAs

Alvaro Vazquez , Florent de Dinechin

2010 International Conference on Field-Programmable Technology, Dec 2010, Beijing, China

Communication dans un congrès inria-00546028v1

Multipliers for Floating-Point Double Precision and Beyond on FPGAs

Sebastian Banescu , Florent de Dinechin , Bogdan Pasca , Radu Tudoran

Highly Efficient Accelerators and Reconfigurable Technologies, Jun 2010, Tsukuba, Japan

Communication dans un congrès ensl-00475781v2

Pipelined FPGA Adders

Florent de Dinechin , Hong Diep Nguyen , Bogdan Pasca

International Conference on Field Programmable Logic and Applications, Aug 2010, Milano, Italy. pp.422-427, ⟨10.1109/FPL.2010.87⟩

Communication dans un congrès ensl-00475780v2

A 128-Tap Complex FIR Filter Processing 20 Giga-Samples/s in a Single FPGA

Florent de Dinechin , Honoré Takeugming , Jean-Marc Tanguy

44th Conference on signals, systems and computers, United States

Communication dans un congrès ensl-00542950v1

Large multipliers with less DSP blocks

Florent de Dinechin , Bogdan Pasca

Field Programmable Logic and Applications, Aug 2009, Czech Republic

Communication dans un congrès ensl-00356421v1

Generating high-performance custom floating-point pipelines

Florent de Dinechin , Cristian Klein , Bogdan Pasca

Field Programmable Logic and Applications, Aug 2009, Prague, Czech Republic

Communication dans un congrès ensl-00379154v2

Integer and Floating-Point Constant Multipliers for FPGAs

Nicolas Brisebarre , Florent de Dinechin , Jean-Michel Muller

International Conference on Application-Specific Systems, Architectures and Processors, 2008, IMEC, Jul 2008, Leuven, Belgium. pp.239-244, ⟨10.1109/ASAP.2008.4580184⟩

Communication dans un congrès ensl-00269219v1