Florent de Dinechin
103
Documents
Publications
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Low-precision logarithmic arithmetic for neural network accelerators33rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2022), IEEE, Jul 2022, Gothenburg, Sweden. ⟨10.1109/ASAP54787.2022.00021⟩
Conference papers
hal-03684585v1
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Resource Optimal Squarers for FPGAsInternational Conference on Field-Programmable Logic and Applications (FPL), Aug 2022, Belfast, United Kingdom. ⟨10.1109/FPL57034.2022.00018⟩
Conference papers
hal-03922311v1
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Using integer linear programming for correctly rounded multipartite architecturesFPT 2022 - International Conference on Field Programmable Technology, Dec 2022, Hong Kong, China
Conference papers
hal-03844218v1
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A single-source C++20 HLS flow for function evaluation on FPGA and beyondHEART 2022 - 12th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Jun 2022, Tsukuba, Japan
Conference papers
hal-03684757v1
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Towards Arithmetic-Centered Filter DesignARITH 2021 - 28th IEEE Symposium on Computer Arithmetic, Jun 2021, Torino, Italy. pp.1-4, ⟨10.1109/ARITH51176.2021.00032⟩
Conference papers
hal-03220258v1
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Resource Optimal Truncated Multipliers for FPGAsARITH 2021 - 28th IEEE International Symposium on Computer Arithmetic, Jun 2021, Torino, Italy. pp.1-8, ⟨10.1109/ARITH51176.2021.00029⟩
Conference papers
hal-03220290v1
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Next Generation Arithmetic for Edge ComputingDATE 2020 - Design, Automation and Test in Europe Conference, Mar 2020, Grenoble, France. pp.1357-1365, ⟨10.23919/DATE48585.2020.9116196⟩
Conference papers
hal-03114381v1
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Evaluating the hardware cost of the posit number systemFPL 2019 - 29th International Conference on Field-Programmable Logic and Applications (FPL), Sep 2019, Barcelona, Spain. pp.106 - 113
Conference papers
hal-02130912v4
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Posits: the good, the bad and the uglyCoNGA 2019 - Conference on Next-Generation Arithmetic, Mar 2019, Singapore, Singapore. pp.1-10, ⟨10.1145/3316279.3316285⟩
Conference papers
hal-01959581v4
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A type-safe arbitrary precision arithmetic portability layer for HLS toolsHEART 2019 - International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, Jun 2019, Nagasaki, Japan. pp.1-6, ⟨10.1145/3337801.3337809⟩
Conference papers
hal-02131798v2
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Reflections on 10 years of FloPoCoARITH 2019 - 26th IEEE Symposium on Computer Arithmetic, Jun 2019, kyoto, Japan. pp.1-3
Conference papers
hal-02161527v1
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SMURF: Scalar Multiple-precision Unum Risc-V Floating-point Accelerator for Scientific ComputingCoNGA 2019 - Conference on Next-Generation Arithmetic, Mar 2019, Singapour, Singapore. pp.1-8, ⟨10.1145/3316279.3316280⟩
Conference papers
hal-02087098v1
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Variable Precision Floating-Point RISC-V Coprocessor Evaluation using Lightweight Software and Compiler SupportCARRV 2019 - Third Workshop on Computer Architecture Research with RISC-V, Jun 2019, Phoenix, AZ, United States. pp.1-6
Conference papers
hal-02161621v1
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Table-Based versus Shift-And-Add constant multipliers for FPGAsARITH 2019 - 26th IEEE Symposium on Computer Arithmetic, Jun 2019, Kyoto, Japan. pp.1-8
Conference papers
hal-02147078v1
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Une architecture minimisant les échanges entre processeur et mémoireComPAS 2018 - Conférence d’informatique en Parallélisme, Architecture et Système, Jul 2018, Toulouse, France. pp.1-8
Conference papers
hal-01959855v1
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Karatsuba with Rectangular Multipliers for FPGAsARITH 2018 - 25th IEEE International Symposium on Computer Arithmetic, Jun 2018, Amherst, United States. pp.13-20, ⟨10.1109/ARITH.2018.8464809⟩
Conference papers
hal-01773447v1
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Bridging High-Level Synthesis and Application-Specific Arithmetic: The Case Study of Floating-Point Summations27th International Conference on Field-Programmable Logic and Applications (FPL), IEEE, Sep 2017, Gent, Belgium. pp.8
Conference papers
hal-01373954v2
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Hardware support for UNUM floating point arithmetic13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Jun 2017, Taormina, Italy. pp.93 - 96, ⟨10.1109/PRIME.2017.7974115⟩
Conference papers
hal-01618698v1
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Exploration architecturale de l'accumulateur de KulischCompas'2017 - Conférence d’informatique en Parallélisme, Architecture et Système, Jun 2017, Sophia Antipolis, France. pp.1-8
Conference papers
hal-02131977v1
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A high-level synthesis approach optimizing accumulations in floating-point programs using custom formats and operators2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), Apr 2017, Napa, United States. pp.80-80, ⟨10.1109/FCCM.2017.41⟩
Conference papers
hal-01498357v2
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Automating the pipeline of arithmetic datapathsDesign, Automation & Test in Europe Conference & Exhibition (DATE 2017), Mar 2017, Lausanne, Switzerland
Conference papers
hal-01373937v2
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Computing floating-point logarithms with fixed-point operations23rd IEEE Symposium on Computer Arithmetic, IEEE, Jul 2016, Santa Clara, United States
Conference papers
hal-01227877v1
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Pipeline automatique d’opérateurs dans FloPoCo 5.0COMPAS'2016: Conférence d’informatique en Parallélisme, Architecture et Système, Jul 2016, Lorient, France
Conference papers
hal-01348007v1
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Hardware implementations of fixed-point Atan222nd IEEE Symposium on Computer Arithmetic, Jun 2015, Lyon, France
Conference papers
hal-01091138v1
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Code generators for mathematical functions22d IEEE Symposium on Computer Arithmetic, Jun 2015, Lyon, France
Conference papers
hal-01084726v2
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Sum-of-Product Architectures Computing Just RightASAP - Application-specific Systems, Architectures and Processors, Jun 2014, Zurich, Switzerland
Conference papers
hal-00957609v1
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Arithmetic core generation using bit heaps23rd International Conference on Field Programmable Logic and Applications, Sep 2013, Porto, Portugal. pp.1-8
Conference papers
ensl-00738412v2
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Conception d'une matrice reconfigurable pour coprocesseur fortement coupléSymposium en Architectures nouvelles de machines, Jan 2013, France
Conference papers
ensl-00763067v1
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L'arithmétique sur le tasSymposium en Architectures nouvelles de machines, Jan 2013, France
Conference papers
ensl-00762990v1
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Fixed-Point Trigonometric Functions on FPGAsFourth International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, Jun 2013, Edimburgh, United Kingdom. pp.1-6
Conference papers
ensl-00802777v1
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Table-based division by small integer constants8th International Symposium on Applied Reconfigurable Computing (ARC), Mar 2012, Hong Kong, Hong Kong SAR China. pp.53-63, ⟨10.1007/978-3-642-28365-9_5⟩
Conference papers
ensl-00642145v1
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34 Gb/s PDM-QPSK coherent receiver using SiGe ADCs and a single FPGA for digital signal processingOptical Fiber Communication Conference, Mar 2012, nc, United States. pp.OM3H.7
Conference papers
ensl-00766801v1
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The arithmetic operators you will never see in a microprocessor20th IEEE Symposium on Computer Arithmetic, Jul 2011, Tuebingen, Germany. pp.189-190
Conference papers
ensl-00642164v1
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Mixed-precision Fused Multiply and Add45th Asilomar Conference on Signals, Systems & Computers, Nov 2011, United States. pp.165-169
Conference papers
ensl-00642157v1
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An FPGA architecture for solving the Table Maker's DilemmaApplication-Specific Systems, Architectures and Processors (ASAP), 2011 IEEE International Conference on, Sep 2011, Santa Monica, United States. pp.187-194, ⟨10.1109/ASAP.2011.6043267⟩
Conference papers
ensl-00640063v1
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Code generation for argument filtering and argument reduction in elementary functionsSCAN 2010: 14th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics, Revol, Nathalie and de Dinechin, Florent and Jeannerod, Claude-Pierre and Lefèvre, Vincent and Louvet, Nicolas and Morin, Sèverine and Nguyen, Hong Diep, Sep 2010, Lyon, France
Conference papers
inria-00544808v1
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Floating-point exponential functions for DSP-enabled FPGAsInternational Conference on Field-Programmable Technology, Dec 2010, Beijing, China. pp.110-117
Conference papers
ensl-00506125v1
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Multiplicative square root algorithms for FPGAsInternational Conference on Field Programmable Logic and Applications, Aug 2010, Milano, Italy. pp.14, ⟨10.1109/FPL.2010.112⟩
Conference papers
ensl-00475779v2
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Automatic generation of polynomial-based hardware architectures for function evaluationApplication-specific Systems, Architectures and Processors, Jul 2010, Rennes, France
Conference papers
ensl-00470506v1
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A 128-Tap Complex FIR Filter Processing 20 Giga-Samples/s in a Single FPGA44th Conference on signals, systems and computers, United States
Conference papers
ensl-00542950v1
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Efficient implementation of Parallel BCD Multiplication in LUT-6 FPGAs2010 International Conference on Field-Programmable Technology, Dec 2010, Beijing, China
Conference papers
inria-00546028v1
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Multipliers for Floating-Point Double Precision and Beyond on FPGAsHighly Efficient Accelerators and Reconfigurable Technologies, Jun 2010, Tsukuba, Japan
Conference papers
ensl-00475781v2
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Pipelined FPGA AddersInternational Conference on Field Programmable Logic and Applications, Aug 2010, Milano, Italy. pp.422-427, ⟨10.1109/FPL.2010.87⟩
Conference papers
ensl-00475780v2
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LEMA: Towards a Language for Reliable ArithmeticInternational Workshop on Programming Languages for Mechanized Mathematics Systems (PLMMS 2010), Jul 2010, Paris, France. pp.41-52, ⟨10.1145/1838599.1838622⟩
Conference papers
inria-00542143v1
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Large multipliers with less DSP blocksField Programmable Logic and Applications, Aug 2009, Czech Republic
Conference papers
ensl-00356421v1
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Generating high-performance custom floating-point pipelinesField Programmable Logic and Applications, Aug 2009, Prague, Czech Republic
Conference papers
ensl-00379154v2
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Integer and Floating-Point Constant Multipliers for FPGAsInternational Conference on Application-Specific Systems, Architectures and Processors, 2008, IMEC, Jul 2008, Leuven, Belgium. pp.239-244, ⟨10.1109/ASAP.2008.4580184⟩
Conference papers
ensl-00269219v1
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An FPGA-specific Approach to Floating-Point Accumulation and Sum-of-ProductsField-Programmable Technology, Dec 2008, Taipei, Taiwan
Conference papers
ensl-00268348v3
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Return of the hardware floating-point elementary function18th Symposium on Computer Arithmetic, Jun 2007, Montpellier, France. pp.161-168
Conference papers
ensl-00117386v1
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High-level synthesis and arithmetic optimizationsCompas'2016, Jul 2016, Lorient, France
Conference poster
hal-02131970v1
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Handbook of Floating-point Arithmetic (2nd edition)Birkhäuser Basel, pp.1-627, 2018, 978-3319765259. ⟨10.1007/978-3-319-76526-6⟩
Books
hal-01766584v1
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Handbook of Floating-Point ArithmeticBirkhauser Boston, pp.572, 2010
Books
ensl-00379167v1
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Evaluating Elementary FunctionsNicholas Higham. Princeton Companion to Applied Mathematics, Princeton University Press, pp.2, 2014
Book sections
ensl-00989001v1
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Reconfigurable arithmetic for HPCWim Vanderbauwhede and Khaled Benkrid. High-Performance Computing using FPGAs, Springer, 2013
Book sections
ensl-00758377v1
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Digital ArithmeticBenjamin Wah. Wiley Encyclopedia of Computer Science and Engineering, Wiley, pp.935-948, 2009
Book sections
ensl-00542215v1
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Method and device for floating point representation with variable precisionFrance, Patent n° : 1902386. 2019
Patents
hal-02169527v1
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Mixed-Precision Merged Multiplication and Addition OperatorFrance, Patent n° : WO/2012/175828. 2012
Patents
hal-01021919v1
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Matériel et logiciel pour l'évaluation de fonctions numériques :
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