Gérard Scorletti
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Publications
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Distributed clock generator for synchronous SoC using ADPLL networkCICC 2013 - IEEE 2013 Custom Integrated Circuits Conference, Sep 2013, San José, CA, United States. pp.1-4, ⟨10.1109/CICC.2013.6658437⟩
Communication dans un congrès
hal-01053768v1
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All-digital PLL array provides reliable distributed clock for SOCs2011 IEEE International Symposium of Circuits and Systems (ISCAS), May 2011, Rio de Janeiro, Brazil. pp.2589-2592, ⟨10.1109/ISCAS.2011.5938134⟩
Communication dans un congrès
hal-00655799v1
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A clock network of distributed ADPLLs using an asymmetric comparison strategyIEEE International Symposium on Circuit and Systems (ISCAS'10), May 2010, Paris, France. pp.3212-3215, ⟨10.1109/ISCAS.2010.5537932⟩
Communication dans un congrès
hal-00520988v1
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