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Giorgio Di Natale

9
Documents

Présentation

Giorgio Di Natale received the PhD in Computer Engineering from the Politecnico di Torino in 2003. He is director of research for the National Research Center of France at the TIMA laboratory in Grenoble. His research interests include hardware security and trust, secure circuits design and test, reliability evaluation and fault tolerance, software implemented hardware fault tolerance, and VLSI testing.

Publications

regis-leveugle
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Security EDA Extension through P1687.1 and 1687 Callbacks

Michele Portolan , V. Reynaud , Paolo Maistri , Régis Leveugle , Giorgio Di Natale
IEEE International Test Conference (ITC 2021), Oct 2021, Anaheim (CA), United States. pp.344-353, ⟨10.1109/ITC50571.2021.00050⟩
Communication dans un congrès hal-03629319v1

Alternatives to fault injections for early safety/security evaluations

Régis Leveugle , Michele Portolan , S. Di Carlo , A. Savino , Giorgio Di Natale
24th IEEE European Test Symposium (ETS 2019), May 2019, Baden Baden, Germany. ⟨10.1109/ETS.2019.8791555⟩
Communication dans un congrès hal-02110119v1
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A Comprehensive Approach to a Trusted Test Infrastructure

Marc Merandat , Vincent Reynaud , Emanuele Valea , Jerome Quevremont , Nicolas Valette
IVSW 2019 - 4th IEEE International Verification and Security Workshop, Jul 2019, Rhodes, Greece. pp.43-48, ⟨10.1109/IVSW.2019.8854428⟩
Communication dans un congrès lirmm-02306980v1
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The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks

Jean-Max Dutertre , Vincent Beroulle , Philippe Candelier , Louis-Barthelemy Faber , Marie-Lise Flottes
IOLTS: International On-Line Testing Symposium, Jul 2018, Platja d’Aro, Spain. pp.214-219, ⟨10.1109/IOLTS.2018.8474230⟩
Communication dans un congrès emse-01856000v1
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Laser fault injection at the CMOS 28 nm technology node: an analysis of the fault model

Jean-Max Dutertre , Vincent Beroulle , Philippe Candelier , Stephan de Castro , Louis-Barthelemy Faber
FDTC: Fault Diagnosis and Tolerance in Cryptography, Sep 2018, Amsterdam, Netherlands. pp.1-6, ⟨10.1109/FDTC.2018.00009⟩
Communication dans un congrès emse-01856008v1

Reliability of computing systems: From flip flops to variables

Giorgio Di Natale , Maha Kooli , Alberto Bosio , Michele Portolan , Régis Leveugle
IOLTS: International On-Line Testing Symposium, Jul 2017, Thessaloniki, Greece. pp.196-198, ⟨10.1109/IOLTS.2017.8046242⟩
Communication dans un congrès lirmm-01700744v1
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Laser-Induced Fault Effects in Security-Dedicated Circuits

Vincent Beroulle , Philippe Candelier , Stephan de Castro , Giorgio Di Natale , Jean-Max Dutertre
VLSI-SoC: Very Large Scale Integration and System-on-Chip, Oct 2014, Playa del Carmen, Mexico. pp.220-240, ⟨10.1007/978-3-319-25279-7_12⟩
Communication dans un congrès hal-01383737v1
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Ensuring High Testability without Degrading Security

Marie-Lise Flottes , Giorgio Di Natale , Paolo Maistri , Bruno Rouzeyre , Régis Leveugle
ETS: European Test Symposium, May 2009, Seville, Spain
Communication dans un congrès lirmm-00407163v1