Jean-Christophe Le Lann

47
Documents

Présentation

I am researcher and lecturer ("enseignant-chercheur") at ENSTA-Bretagne, an engineering school located in Brest, France. I am also member of LabSticc , a major research laboratory in France.

My main research activities are related to Hardware-software Codesign of Embedded Systems and Cyber-physical systems (CPS) : modeling, DSL design, transformation, simulation, compilation onto real architectures organized around a network of processing elements like RISC processors, FPGAs, multicores, sensors and actuators. All these topics have no meaning without another keyword : Models of Computation (MoCs). As Wikipedia explains : in model-driven engineering, the model of computation explains how the behaviour of the whole system is the result of the behaviour of each of its components.

I am involved in many concrete designs in the field of multimedia, communication and robotics, that ensure that my research is still rooted in the ground.

I spent 10 years as IC Design Engineer for Thomson R & D France (now Technicolor) and I am cofounder of Modae Technologies, that delivered a high-level modeling, simulation and behavioral synthesis framework for FPGAs starting from Python and Ruby DSLs, as a possible alternative to Matlab/Simulink. Modae was awarded twice by the French Ministry of Research and OSEO (now Bpi France).

Publications

Publications

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An Iterative Design and Validation Methodology for RISC-V Custom Extension

Pierre Filiol , Luc Jaulin , Jean-Christophe Le Lann , Théotime Bollengier

International Conference on Electronics Circuits and Systems, Nov 2025, Marrakech, Morocco

Communication dans un congrès hal-05410346v1

Efficient Hardware Primitives for Interval Contractors in Robotics and Integration to a Custom RISC-V ISA Extension

Pierre Filiol , Théotime Bollengier , Luc Jaulin , Jean-Christophe Le Lann

2025 23rd IEEE Interregional NEWCAS Conference (NEWCAS), Jun 2025, Paris, France. pp.548-552, ⟨10.1109/NewCAS64648.2025.11107029⟩

Communication dans un congrès hal-05410321v1
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An HLS algorithm for the direct synthesis of complex control flow graphs into finite state machines with implicit datapath

Jean-Christophe Le Lann

27th Euromicro Conference Series on Digital System Design, Aug 2024, Paris, France

Communication dans un congrès hal-04812311v1

Acceleration of contractor algebra on RISCV in the context of mobile robotic

Pierre Filiol , Luc Jaulin , Jean-Christophe Le Lann , Théotime Bollengier

Summer Workshop on Interval Methods, Jun 2023, Angers, France

Communication dans un congrès hal-04320802v1
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HLS-based Accelerated Simulation of Large Scale Cyber-Physical Systems on FPGAs

Maelic Louart , Jean-Christophe Le Lann , Frédéric Le Roy , Abdel Boudraa , Jean-Jacques Szkolnik

IEEE International NEWCAS Conference, Jul 2022, Montreal, Canada. ⟨10.1109/NEWCAS52662.2022.9842250⟩

Communication dans un congrès hal-03839510v1
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Stratégie de détection des Falsifications des Positions des Messages AIS Basée sur l'Application du Filtre IMM

Maelic Louart , Jean-Jacques Szkolnik , Abdel-Ouahab Boudraa , Jean-Christophe Le Lann , Frédéric Le Roy

Gretsi'22 XXVIIIème Colloque Francophone de Traitement du Signal et des Images, Sep 2022, Nancy, France

Communication dans un congrès hal-03859377v1
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A new interval arithmetic to generate the complementary of contractors

Pierre Filiol , Théotime Bollengier , Luc Jaulin , Jean-Christophe Le Lann

Summer Workshop on Interval Methods, Jul 2022, Hannover, Germany

Communication dans un congrès hal-03859346v2
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Émulation de Systèmes Cyber-Physiques sur FPGA

Maelic Louart , Jean-Christophe Le Lann , Frédéric Le Roy , Abdel Boudraa , Jean-Jacques Szkolnik

GRETSI'22 XXVIIIème Colloque Francophone de Traitement du Signal et des Images, Sep 2022, Nancy, France. pp.481-484

Communication dans un congrès hal-03839578v1
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Opportunistic IP Birthmarking using Side Effects of Code Transformations on High-Level Synthesis

Hannah Badier , Christian Pilato , Jean-Christophe Le Lann , Philippe Coussy , Guy Gogniat

DATE'21 Design Automation and Test in Europe, Feb 2021, Grenoble (virtuel), France

Communication dans un congrès hal-03228922v1
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Towards a Hardware DSL Ecosystem: RubyRTL and Friends

Jean-Christophe Le Lann , Hannah Badier , Florent Kermarrec

OSDA'2020 Open Source Hardware Design, colocated with DATE'20, Mar 2020, Grenoble, France

Communication dans un congrès hal-02513256v1
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Transient Key-based Obfuscation for HLS in an Untrusted Cloud Environment

Hannah Badier , Jean-Christophe Le Lann , Philippe Coussy , Guy Gogniat

2019 Design, Automation & Test in Europe Conference & Exhibition, DATE 2019, Mar 2019, Florence, Italy

Communication dans un congrès hal-02052433v1
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LiteX: an open-source SoC builder and library based on Migen Python DSL

Florent Kermarrec , Sébastien Bourdeauducq , Hannah Badier , Jean-Christophe Le Lann

OSDA 2019, colocated with DATE 2019 Design Automation and Test in Europe, Mar 2019, Florence, Italy

Communication dans un congrès hal-02088044v1
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An Integrated Toolchain for Overlay-centric System-on-chip

Jean-Christophe Le Lann , Théotime Bollengier , Mohamad Najem , Loïc Lagadec

13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip 2018 (ReCoSoC 2018), Jul 2018, Lille, France. ⟨10.1109/ReCoSoC.2018.8449388⟩

Communication dans un congrès hal-01867638v1
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Soft timing closure for soft programmable logic cores: The ARGen approach

Théotime Bollengier , Loïc Lagadec , Mohamad Najem , Jean-Christophe Le Lann , Pierre Guilloux

ARC 2017 - 13th International Symposium on Applied Reconfigurable Computing, Delft University of Technology Apr 2017, Delft, Netherlands

Communication dans un congrès hal-01475251v1

A Cost-effective Approach for Efficient Time-sharing of Reconfigurable Architectures

Mohamad Najem , Théotime Bollengier , Jean-Christophe Le Lann , Loïc Lagadec

FPGA4GPC'2017, May 2017, Hambourg, Germany. ⟨10.1109/FPGA4GPC.2017.8008959⟩

Communication dans un congrès hal-01656613v1
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Overlay Architectures For FPGA Resource Virtualization

Théotime Bollengier , Mohamad Najem , Jean-Christophe Le Lann , Loïc Lagadec

GDR SOC SIP, Jun 2016, Nantes, France

Communication dans un congrès hal-01405912v1

Speeding Up Robot Control Software Through Seamless Integration With FPGA

Xuan Sang Le , Luc Fabresse , Jannik Laval , Jean-Christophe Le Lann , Loïc Lagadec

SHARC'16, Jun 2016, Brest, France

Communication dans un congrès hal-01480221v1
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Overlay Architectures for Heterogeneous FPGA Cluster Management.

Théotime Bollengier , Mohamad Najem , Jean-Christophe Le Lann , Loïc Lagadec

DASIP 2016, Oct 2016, Rennes, France

Communication dans un congrès hal-01405890v1

ZeFF : Une plateforme pour l’intégration d’architectures overlay dans le Cloud

Théotime Bollengier , Mohamad Najem , Jean-Christophe Le Lann , Loïc Lagadec

COMPAS 2016, Jul 2016, Lorient, France

Communication dans un congrès hal-01405860v1

CaRDIN: An Agile Environment for EdgeComputing on Reconfigurable Sensor Networks

Xuan Sang Le , Jean-Christophe Le Lann , Loïc Lagadec , Luc Fabresse , Noury Bouraqadi et al.

3rd IEEE International Conference on Computational Science and Computational Intelligence (CSCI 2016), Dec 2016, Las Vegas, United States

Communication dans un congrès hal-01406641v1

Communication-aware Parallelization Strategies for High Performance Applications.

Imran Ashraf , Nader Khammassi , Koen Bertels , Jean-Christophe Le Lann

ISVLSI'15 - IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France

Communication dans un congrès hal-01174435v1

A High-Level Programming Model to Ease Pipeline Parallelism Expression On Shared Memory Multicore Architectures

Nader Khammassi , Jean-Christophe Le Lann

HPC 2014, Apr 2014, Tampa, FL, United States. pp.XX

Communication dans un congrès hal-00989661v1

A Prototyping Platform for Virtual Reconfigurable Units

Loïc Lagadec , Jean-Christophe Le Lann , Théotime Bollengier

RECOSOC 2014, May 2014, Montpellier, France

Communication dans un congrès hal-01006128v1

Tackling Real-Time Signal Processing Applications on Shared Memory Multicore Architectures Using XPU

Nader Khammassi , Jean-Christophe Le Lann

ERTS 2014, Feb 2014, Toulouse, France

Communication dans un congrès hal-00958087v1

DESIGN AND IMPLEMENTATION OF A CACHE HIERARCHY-AWARE TASK SCHEDULING FOR PARALLEL LOOPS ON MULTICORE ARCHITECTURES

Nader Khammassi , Jean-Christophe Le Lann

PDCTA 2014, Feb 2014, Sydney, Australia

Communication dans un congrès hal-00958096v1

Early exploring design alternatives of smart sensor software with Model of Computation implemented with actors

Jean-Philippe Schneider , Zoé Drey , Jean-Christophe Le Lann

ESUG 2013 - 21th International Smalltalk Conference, Sep 2013, Annecy, France

Communication dans un congrès hal-00913335v1

Modélisation algorithmique et synthèse d'architectures assistées par model-checking

Jean-Christophe Le Lann , Philippe Dhaussy , Pierre-Laurent Lagalaye

CAL 2012-, May 2012, Montpellier, France

Communication dans un congrès hal-00703785v1

MHPM : Multi-Scale Hybrid Programming Model A flexible parallelization Medthodology

Nader Khammassi , Jean-Christophe Le Lann , Jean-Philippe Diguet , Alexandre Skrzyniarz

HPCC 2012, Jun 2012, Liverpool, United Kingdom

Communication dans un congrès hal-00728364v1
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AN EXPERIMENTAL TOOLCHAIN BASED ON HIGH-LEVEL DATAFLOW MODELS OF COMPUTATION FOR HETEROGENEOUS MPSOC

Julien Heulot , Karol Desnos , Jean François Nezan , Maxime Pelcat , Mickaël Raulet et al.

DASIP, Oct 2012, Karlsruhe, Germany

Communication dans un congrès hal-00749175v1
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From system-level models to heterogeneous embedded systems

Jean-Christophe Le Lann , Joël Champeau , Papa Issa Diallo , Pierre-Laurent Lagalaye

RITF 2012 - Recherche et Innovation pour les Transports du Futur, Nov 2012, Paris, France. pp.XX

Communication dans un congrès hal-00771758v1

MoPCoM Methodology: Focus on Models of Computation

Ali Koudri , Joël Champeau , Jean-Christophe Le Lann , Vincent Leilde

6th European Conference on Modelling Foundations and Applications (ECMFA'10), Jun 2010, Paris, France. pp.Non renseigne

Communication dans un congrès hal-00517464v1
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JOG : une approche haut niveau des systèmes embarqués via Armadeus et Java

Olivier Reynet , Jean-Christophe Le Lann , Benoit Clement

3èmes Journées Démonstrateurs 2010, Nov 2010, Angers, France

Communication dans un congrès hal-00911269v1

UML/MARTE Process for SoC/SoPC

Ali Koudri , Jean-Christophe Le Lann , Joël Champeau

Embedded Real Time Software and Systems Symposium, 2010, Toulouse, France. pp.201,209

Communication dans un congrès hal-00730497v1

Using MARTE in the MOPCOM SoC/SoPC Methodology

Ali Koudri , Didier Vojtsiek , Philippe Soulard , Christophe Moy , Joël Champeau et al.

Workshop MARTE, Colocated with DATE, Mar 2008, Munich, Germany

Communication dans un congrès hal-00517468v1
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Using MARTE in a Co-Design Methodology

Ali Koudri , Denis Aulagnier , Didier Vojtisek , Philippe Soulard , Christophe Moy et al.

MARTE UML profile workshop co-located with DATE'08, Mar 2008, Munich, Germany. 6 p

Communication dans un congrès hal-00354356v1

CDFG Platform in MORPHEUS

Jalil Boukhobza , Loïc Lagadec , Alain Plantec , Jean-Christophe Le Lann

AETHER - MORPHEUS Workshop AMWAS'07, Oct 2007, Paris, France

Communication dans un congrès hal-00487063v1

Protecting Behavioral IPs During Design Time: Key-Based Obfuscation Techniques for HLS in the Cloud

Hannah Badier , Jean-Christophe Le Lann , Philippe Coussy , Gogniat Guy

Behavioral Synthesis for Hardware Security, Springer International Publishing; Springer International Publishing, pp.71-93, 2022, ⟨10.1007/978-3-030-78841-4_5⟩

Chapitre d'ouvrage hal-04115023v1

XPU: A C++ Metaprogramming Approach to Ease Parallelism Expression: Parallelization Methodology, Internal Design and Practical Application

Nader Khammassi , Jean-Christophe Le Lann

Parallel Programming: Practical Aspects, Models and Current Limitations, NOVA publishers, pp.175-198, 2014, 978-1-60741-263-2

Chapitre d'ouvrage hal-01090466v1
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Polychrony for system design

Paul Le Guernic , Jean-Pierre Talpin , Jean-Christophe Le Lann

[Research Report] RR-4715, INRIA. 2003

Rapport (rapport de recherche) inria-00071871v1