Jean-Michel Gorius Ingénieur de recherche

Identifiants chercheurs

IdHAL :

jean-michel-gorius

ORCID :

0000-0002-9065-1717

Publications

Communication dans un congrès (6)

Exploring Instruction Set Extension Emulation for Long-Term Support of RISC-V Processors Jean-Michel Gorius,Arthur Perais,Erven Rohou SCW 2026 - Sustainable Computing Workshop 2026, May 2026, Catania, Italy. ⟨10.1145/3801488.3807478⟩ Communication dans un congrès hal-05579364v1
Optimizing Recovery Logic in Speculative High-Level Synthesis Dylan Leothaud,Jean-Michel Gorius,Simon Rokicki,Steven Derrien DAC 2025 - 62nd Design Automation Conference, Jun 2025, San Fransisco, United States. pp.1-7, ⟨10.1109/dac63849.2025.11133015⟩ Communication dans un congrès hal-05140504v1
A Unified Memory Dependency Framework for Speculative High-Level Synthesis Jean-Michel Gorius,Simon Rokicki,Steven Derrien CC 2024 - ACM SIGPLAN International Conference on Compiler Construction, Mar 2024, Edinburgh (Ecosse), United Kingdom. pp.1-13, ⟨10.1145/3640537.3641581⟩ Communication dans un congrès hal-04394762v2
Exploration efficace d'espace de conception pour la synthèse de haut niveau dynamique et spéculative Dylan Leothaud,Jean-Michel Gorius,Simon Rokicki,Simon Rokicki,Steven Derrien COMPAS 2024 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jul 2024, Nantes, France. pp.1-8 Communication dans un congrès hal-04615776v1
Efficient Design Space Exploration for Dynamic & Speculative High-Level Synthesis Dylan Leothaud,Jean-Michel Gorius,Simon Rokicki,Steven Derrien FPL 2024 - 34th International Conference on Field-Programmable Logic and Applications, Sep 2024, Turin, Italy. pp.1-9, ⟨10.1109/FPL64840.2024.00024⟩ Communication dans un congrès hal-04615767v2
Design Exploration of RISC-V Soft-Cores through Speculative High-Level Synthesis Jean-Michel Gorius,Simon Rokicki,Steven Derrien FPT 2022 - International Conference on Field Programmable Technology, Dec 2022, Honk Kong / Hybrid, Hong Kong SAR China. pp.1-6, ⟨10.1109/ICFPT56656.2022.9974478⟩ Communication dans un congrès hal-03828841v1

Poster de conférence (4)

Speculative High-Level Synthesis of RISC-V Processors Thomas Feuilletin,Dylan Leothaud,Jean-Michel Gorius,Steven Derrien,Simon Rokicki RISC-V summit Europe 2025, May 2025, Paris, France. pp.1-1, 2025 Poster de conférence hal-05140615v1
Optimizing Recovery Logic in Speculative High-Level Synthesis Dylan Leothaud,Jean-Michel Gorius,Simon Rokicki,Steven Derrien DAC 2025 - Design Automation Conference, Jun 2025, San francisco, United States Poster de conférence hal-05140532v1
Speculative High-Level Synthesis of RISC-V Processors Dylan Leothaud,Jean-Michel Gorius,Steven Derrien,Simon Rokicki RISC-V Summit Europe 2024, Jun 2024, Munich, Germany. , 2024 Poster de conférence hal-04615846v1
Automatic Micro-Architecture Exploration and Synthesis for RISC-V CPUs Jean-Michel Gorius,Steven Derrien,Simon Rokicki RISC-V 2022 - Spring RISC-V Week, May 2022, Paris, France. Poster de conférence hal-05516739v1

Thèse (1)

High-level synthesis of instruction set processors Jean-Michel Gorius Hardware Architecture [cs.AR]. Université de Rennes, 2024. English. ⟨NNT : 2024URENS068⟩ Thèse tel-04884873v2

Article dans une revue (1)

SpecHLS: Speculative Accelerator Design using High-Level Synthesis Jean-Michel Gorius,Simon Rokicki,Steven Derrien IEEE Micro, In press, pp.1-10. ⟨10.1109/mm.2022.3188136⟩ Article dans une revue hal-03714101v1