Kevin Martin Maître de conférences - Université de Bretagne Sud

Identifiants chercheurs

IdHAL :

kevin-martin

ORCID :

0000-0002-8122-1192

IdRef :

147602300

Présentation

Maitre de conférences - Associate Professor

Université de Bretagne-Sud

Kevin Martin is an associate professor at the Université de Bretagne-Sud, France, in the ARCAD team of the Lab-STICC. He has received a M.S. in electrical and computer engineering in 2004 and a PhD in computer science in 2010 from the Université de Rennes, France. His research interests include system-level design and methodologies, CGRAs, memories, custom processors, embedded multi-processor platforms, high-level synthesis, computer-aided design for SoCs and embedded systems.

Publications

Article dans une revue (10)

CREPE: Concurrent Reverse-Modulo-Scheduling and Placement for CGRAs Chilankamol Sunny,Satyajit Das,Kevin J M Martin,Philippe Coussy IEEE Transactions on Parallel and Distributed Systems, 2024, 35 (7), pp.1293 - 1306. ⟨10.1109/tpds.2024.3402098⟩ Article dans une revue hal-04614567v1
Run-time remapping algorithm of dataflow actors on NoC-based heterogeneous MPSoCs Mostafa Rizk,Kevin J. M. Martin,Jean-Philippe Diguet IEEE Transactions on Parallel and Distributed Systems, 2022, 33 (12), ⟨10.1109/TPDS.2022.3177957⟩ Article dans une revue hal-03702259v1
Energy Efficient Hardware Loop Based Optimization for CGRAs Chilankamol Sunny,Satyajit Das,Kevin J M Martin,Philippe Coussy Journal of Signal Processing Systems, 2022, 94 (9), pp.895-912. ⟨10.1007/s11265-022-01760-9⟩ Article dans une revue hal-03704229v1
The Impact of Cache and Dynamic Memory Management in Static Dataflow Applications Alemeh Ghasemi,Marcelo Ruaro,Rodrigo Cataldo,Jean-Philippe Diguet,Kevin Martin Journal of Signal Processing Systems, 2022, 94 (7), pp.721-738. ⟨10.1007/s11265-021-01730-7⟩ Article dans une revue hal-03606524v1
An efficient and flexible stochastic CGRA mapping approach Satyajit Das,Kevin Martin,Thomas Peyret,Philippe Coussy ACM Transactions on Embedded Computing Systems (TECS), 2022, 22 (1), Article No.: 8, pp 1-24. ⟨10.1145/3550071⟩ Article dans une revue hal-03763453v2
Subutai: Speeding Up Legacy Parallel Applications Through Data Synchronization Rodrigo Cataldo,Ramon Fernandes,Kevin Martin,Jarbas Silveira,Gustavo Sanchezet al. IEEE Transactions on Parallel and Distributed Systems, 2021, 32 (5), pp.1102-1116. ⟨10.1109/TPDS.2020.3040066⟩ Article dans une revue hal-03082831v1
Floating Point CGRA based Ultra-Low Power DSP Accelerator Rohit Prasad,Satyajit Das,Kevin Martin,Philippe Coussy Journal of Signal Processing Systems, 2021, ⟨10.1007/s11265-020-01630-2⟩ Article dans une revue hal-03124545v1
An Energy-Efficient Integrated Programmable Array Accelerator and Compilation flow for Near-Sensor Ultra-low Power Processing Satyajit Das,Kevin Martin,Davide Rossi,Philippe Coussy,Luca Benini IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019, 38 (6), pp.1095-1108. ⟨10.1109/TCAD.2018.2834397⟩ Article dans une revue hal-01828604v1
Move Based Algorithm for Runtime Mapping of Dataflow Actors on Heterogeneous MPSoCs Thanh Dinh Ngo,Kevin Martin,Jean-Philippe Diguet Journal of Signal Processing Systems, 2015 Article dans une revue hal-01236673v1
Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation Kevin Martin,Christophe Wolinski,Krzysztof Kuchcinski,Antoine Floch,François Charot ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2012, 5 (2), pp.10:1--10:38. ⟨10.1145/2209285.2209289⟩ Article dans une revue hal-00663464v1

Communication dans un congrès (42)

XVI-V: A Scalable and ProgrammableRISC-V based Multi-Cluster Accelerator for Embedded Systems Chanon Khongprasongsiri,Tanguy Philippe,Kevin Martin,P Coussy International Conference on Architecture of Computing Systems (ARCS), Mar 2026, Mainz, Germany, Germany Communication dans un congrès hal-05601138v1
Comparative Study of Memory Optimization Techniques for Dataflow-Modeled Applications Naouel Haggui,Maxime Pelcat,Yaesop Lee,Shuvra S. Bhattacharyya,Kevin Martinet al. DASIP 2025, Jan 2025, Barcelona (ES), Spain Communication dans un congrès hal-05117283v1
Scratchy : A Class of Adaptable Architectures with Software-Managed Communication for Edge Streaming Applications Joseph W Faye,Naouel Haggui,Florent Kermarrec,Kevin J M Martin,Shuvra Bhattacharyyaet al. DASIP 2024: Workshop on Design and Architectures for Signal and Image Processing, Jan 2024, Munich (Allemagne), Germany Communication dans un congrès hal-04509310v1
Exécution autonome de boucles sur CGRAs pour l'accélération des applications de traitement du signal Chilankamol Sunny,Satyajit Das,Kevin Martin,Philippe Coussy Compas, Jul 2024, Nantes, France Communication dans un congrès hal-04651585v1
SplitMS: Split Modulo-Scheduling for Accelerating Loops Onto CGRAs Christie Sajitha Sajan,Kevin J M Martin,Satyajit Das,Philippe Coussy 2024 27th Euromicro Conference on Digital System Design (DSD), Aug 2024, Paris, France. pp.242 - 249, ⟨10.1109/dsd64264.2024.00040⟩ Communication dans un congrès hal-04777325v1
Standalone Nested Loop Acceleration on CGRAs for Signal Processing Applications Chilankamol Sunny,Satyajit Das,Kevin J M Martin,Philippe Coussy DASIP 2024: Workshop on Design and Architectures for Signal and Image Processing, Jan 2024, Munich, Germany Communication dans un congrès hal-04505187v1
Mitigating Transceiver and Token Controller Permanent Faults in Wireless Network-on-Chip Navonil Chatterjee,Marcelo Ruaro,Kevin Martin,Jean-Philippe Diguet Euromicro International Conference on Parallel, Distributed and Network-based Processing, Mar 2022, Valladolid, Spain Communication dans un congrès hal-03609150v1
Ultra-low Power Computing with CGRAs an architecture, compilation, and application triptych Kevin J M Martin,Philippe Coussy Workshop on Reconfigurable Computing (WRC), Jun 2022, Budapest, France Communication dans un congrès hal-03704282v1
ManyGUI: A Graphical Tool to Accelerate Many-core Debugging Through Communication, Memory, and Energy Profiling Marcelo Ruaro,Kevin J. M. Martin DroneSE and RAPIDO '22: System Engineering for constrained embedded systems, Jun 2022, Budapest, Hungary. pp.39-46, ⟨10.1145/3522784.3522791⟩ Communication dans un congrès hal-03704278v1
Twenty Years of Automated Methods for Mapping Applications on CGRA Kevin J M Martin 2022 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), May 2022, Lyon, France. ⟨10.1109/IPDPSW55747.2022.00118⟩ Communication dans un congrès hal-03704256v1
On Cache Limits for Dataflow Applications and Related Efficient Memory Management Strategies Alemeh Ghasemi,Rodrigo Cataldo,Jean-Philippe Diguet,Kevin Martin DASIP 2021: Workshop on Design and Architectures for Signal and Image Processing, Jan 2021, Budapest -Online, Hungary. ⟨10.1145/3441110.3441573⟩ Communication dans un congrès hal-03125551v1
Hardware Based Loop Optimization for CGRA Architectures Chilankamol Sunny,Satyajit Das,Kevin Martin,Philippe Coussy Applied Reconfigurable Computing. Architectures, Tools, and Applications, Jun 2021, Rennes, France. pp.65-80, ⟨10.1007/978-3-030-79025-7_5⟩ Communication dans un congrès hal-03345346v1
Energy Efficient Acceleration of Floating Point Applications onto CGRA Satyajit Das,Rohit Prasad,Kevin Martin,Philippe Coussy ICASSP, May 2020, Barcelona, Spain Communication dans un congrès hal-02614908v1
TRANSPIRE: An energy-efficient TRANSprecision floating-point Programmable archItectuRE Rohit Prasad,Satyajit Das,Kevin Martin,Giuseppe Tagliavini,Philippe Coussyet al. Design, Automation and Test in Europe Conference (DATE), Mar 2020, Grenoble, France Communication dans un congrès hal-02510931v1
Context-memory Aware Mapping for Energy Efficient Acceleration with CGRAs Satyajit Das,Kevin Martin,Philippe Coussy Design, Automation and Test in Europe Conference (DATE), Mar 2019, Florence, Italy Communication dans un congrès hal-02086145v1
A Heterogeneous Cluster with Reconfigurable Accelerator for Energy Efficient Near-Sensor Data Analytics Satyajit Das,Kevin Martin,Philippe Coussy,Davide Rossi International Symposium on Circuits and Systems (ISCAS), May 2018, Florence, Italy Communication dans un congrès hal-01827425v1
Une approche basée sur la programmation par contraintes pour résoudre le problème d'affectation de binômes Kevin Martin,Alban Derrien ROADEF, Feb 2018, Lorient, France Communication dans un congrès hal-01724696v1
Subutai: Distributed Synchronization Primitives in NoC Interfaces for Legacy Parallel-Applications Rodrigo Cataldo,Ramon Fernandes,Kevin Martin,Johanna Sepúlveda,Altamiro Susinet al. the 55th Annual Design Automation Conference, Jun 2018, San Francisco, United States. pp.83:1--83:6, ⟨10.1145/3195970.3196124⟩ Communication dans un congrès hal-01828428v1
Broadcast- and Power-Aware Wireless NoC for Barrier Synchronization in Parallel Computing Hemanta Kumar Mondal,Rodrigo Cataldo,Cesar Augusto Missio Marcon,Kevin Martin,Sujay Debet al. 2018 31st IEEE International System-on-Chip Conference (SOCC), Sep 2018, Arlington, United States. pp.1-6 Communication dans un congrès hal-02005970v1
Embedded Runtime for Reconfigurable Dataflow Graphs on Manycore Architectures Hugo Miomandre,Julien Hascoët,Karol Desnos,Kevin Martin,Benoît Dupont de Dinechinet al. PARMA-DITAM, Jan 2018, Manchester, United Kingdom. ⟨10.1145/3183767.3183780⟩ Communication dans un congrès hal-01704702v1
Efficient Mapping of CDFG onto Coarse-Grained Reconfigurable Array Architectures Satyajit Das,Kevin Martin,Philippe Coussy,Davide Rossi,Luca Benini ASP-DAC, Jan 2017, Tokyo, Japan Communication dans un congrès hal-01452277v1
A 142MOPS/mW Integrated Programmable Array accelerator for Smart Visual Processing Satyajit Das,Davide Rossi,Kevin Martin,Philippe Coussy,Luca Benini IEEE International Symposium on Circuits & Systems, May 2017, Baltimore, United States Communication dans un congrès hal-01534574v1
A Scalable Design Approach to Efficiently Map Applications on CGRAs Satyajit Das,Kevin Martin,Philippe Coussy,Thomas Peyret,Gwenolé Correet al. IEEE Computer Society Annual Symposium on VLSI, Jul 2016, Pittsburgh, United States. pp.7560275, ⟨10.1109/ISVLSI.2016.54⟩ Communication dans un congrès hal-01347764v1
Introduction d'aléas dans le processus de projection d'applications sur CGRA Satyajit Das,Kevin Martin,Thomas Peyret,Philippe Coussy Conférence d’informatique en Parallélisme, Architecture et Système (COMPAS 2016), Lab-STICC (UMR 6285), Jul 2016, Lorient, France Communication dans un congrès hal-01347737v1
Notifying Memories: a case-study on Data-Flow Applications with NoC Interfaces Implementation Kevin Martin,Mostafa Rizk,Martha Johanna Sepulveda Florez,Jean-Philippe Diguet Design Automation Conference, Jun 2016, Austin, United States. ⟨10.1145/2897937.2898051⟩ Communication dans un congrès hal-01347736v1
Improving Reuse by means of Asymmetrical Model Migrations: An Application to the Orcc Case Study Paola Vallejo,Mickaël Kerboeuf,Kevin Martin,Jean-Philippe Babau 2015 ACM/IEEE 18th International Conference on Model Driven Engineering Languages and Systems (MODELS), Sep 2015, Ottawa, Canada Communication dans un congrès hal-01220427v1
COMPA backend : Runtime dynamique pour l’exécution de programmes flot de données sur plates-formes multiprocesseurs Yaset Oliva,Emmanuel Casseau,Kevin Martin,Jean-Philippe Diguet,Thanh Dinh Ngoet al. COMPAS 2015 : - Conférence d’informatique en Parallélisme, Architecture et Système, Jun 2015, Lille, France. pp.1-9 Communication dans un congrès hal-01167037v1
Efficient Application Mapping on CGRAs based on Backward Simultaneous Scheduling/Binding and Dynamic Graph Transformations Thomas Peyret,Gwenolé Corre,Mathieu Thevenin,Kevin Martin,Philippe Coussy IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Jun 2014, Zurich, Switzerland. pp.6868652, ⟨10.1109/ASAP.2014.6868652⟩ Communication dans un congrès hal-01009486v1
Virtual Devices for Hot-Pluggable Processors Pierre Bomel,Kevin Martin,Jean-Philippe Diguet 17th Euromicro Conference on Digital System Design (DSD), Aug 2014, Verona, Italy Communication dans un congrès hal-01018908v1
Dataflow program implementation onto a heterogeneous multiprocessor platform Kevin Martin,Jean-Philippe Diguet,Emmanuel Casseau,Yaset Oliva METODO, Oct 2014, Madrid, France Communication dans un congrès hal-01075481v1
Communication-model based Embedded Mapping of Dataflow Actors on Heterogeneous MPSoC Thanh Dinh Ngo,Sepulveda Daniel,Kevin Martin,Jean-Philippe Diguet Conference on Design and Architectures for Signal and Image Processing (DASIP), Oct 2014, Madrid, France Communication dans un congrès hal-01075476v1
An automated design approach to map applications on CGRAs Thomas Peyret,Gwenolé Corre,Mathieu Thevenin,Kevin Martin,Philippe Coussy GLSVLSI Great Lakes Symposium on VLSI, May 2014, Houston, Texas, United States. pp.229-230, ⟨10.1145/2591513.2591552⟩ Communication dans un congrès hal-01002316v1
Ordonnancement, assignation et transformations dynamiques de graphe simultanés pour projeter efficacement des applications sur CGRAs Thomas Peyret,Gwenolé Corre,Mathieu Thevenin,Kevin Martin,Philippe Coussy ComPAS 2014 : conférence en parallélisme, architecture et systèmes, Apr 2014, Neuchatel, Suisse Communication dans un congrès hal-00985815v1
GeCoS: A framework for prototyping custom hardware design flows Antoine Floch,Tomofumi Yuki,Ali El-Moussawi,Antoine Morvan,Kevin Martinet al. 13th IEEE International Working Conference on Source Code Analysis and Manipulation (SCAM), Sep 2013, Eindhoven, Netherlands. pp.100-105, ⟨10.1109/SCAM.2013.6648190⟩ Communication dans un congrès hal-00921370v1
Virtual UARTs for Reconfigurable Multi-processor Architectures Pierre Bomel,Kevin Martin,Jean-Philippe Diguet IEEE 27th International Symposium on Parallel and Distributed Processing, May 2013, United States. pp.Pages 252-259 Communication dans un congrès hal-00877367v1
Sélection d'instructions et ordonnancement parallèle simultanés pour la conception de processeurs spécialisés Antoine Floch,François Charot,Steven Derrien,Kevin Martin,Antoine Morvanet al. Symposium en Architecture de Machines (Sympa'14), May 2011, St Malo, France Communication dans un congrès hal-00640999v1
Graph Constraints in Embedded System Design Christophe Wolinski,Krzysztof Kuchcinski,Kevin Martin,Antoine Floch,Erwan Raffinet al. Worshop on Combinatorial Optimization for Embedded System Design (COESD 2010), Jun 2010, Bologne, Italy Communication dans un congrès inria-00481135v1
How Constraints Programming Can Help You in the Generation of Optimized Application Speciﬁc Reconﬁgurable Processor Extensions Christophe Wolinski,Krzysztof Kuchcinski,Kevin Martin,Erwan Raffin,François Charot International Conference on Engineering of Reconfigurable Systems & Algorithms (ERSA 2009), Jul 2009, Las Vegas, United States Communication dans un congrès inria-00449775v1
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system Kevin Martin,Christophe Wolinski,Krzysztof Kuchcinski,Antoine Floch,François Charot 20th IEEE International Conference on Application-specific Systems, Architectures and Processors, (ASAP 2009), Jul 2009, Boston, United States. pp.145-152, ⟨10.1109/ASAP.2009.19⟩ Communication dans un congrès inria-00449747v1
Design of Processor Accelerators with Constraints Christophe Wolinski,Krzysztof Kuchcinski,Kevin Martin,Erwan Raffin,François Charot 8th workshop of the Network for Sweden-based researchers and practitioners of Constraint programming, May 2009, Linköping, Sweden Communication dans un congrès inria-00449820v1
Sélection automatique d'instructions et ordonnancement d'applications basés sur la programmation par contraintes Kevin Martin,Christophe Wolinski,Krzysztof Kuchcinski,Antoine Floch,François Charot 13ème Symposium en Architecture de machines (SympA'13), Sep 2009, Toulouse, France Communication dans un congrès inria-00449670v1
Constraint-Driven Identification of Application Specific Instructions in the DURASE System Kevin Martin,Christophe Wolinski,Krzysztof Kuchcinski,Antoine Floch,François Charot 9th International Workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2009), Jul 2009, Samos, Greece. pp.194-203, ⟨10.1007/978-3-642-03138-0_21⟩ Communication dans un congrès istex inria-00449798v1

Poster de conférence (7)

Efficient Application Execution Framework for CGRAs Christie Sajitha Sajan,Satyajit Das,Kevin Martin,Philippe Coussy Colloque du GDR SOC2, Jun 2024, Toulouse (FRANCE), France Poster de conférence hal-04651635v1
Software-Defined Networking for Many-cores Marcelo Ruaro,Kevin Martin,Fernando G Moraes Colloque du GdR SOC2, Jun 2021, Rennes, France Poster de conférence hal-03294530v1
Subutai: Implantation de primitives de synchronisation au sein d'interfaces NoCs sans modification du code source Rodrigo Cataldo,Kevin Martin,Jean-Philippe Diguet Colloque du GdR SOC2, Jun 2018, Paris, France Poster de conférence hal-01828617v1
Demonstrating the SPIDER Runtime for Reconfigurable Dataflow Graphs Execution onto a DMA-based Manycore Processor Hugo Miomandre,Julien Hascoët,Karol Desnos,Kevin Martin,Benoît Dupont de Dinechinet al. IEEE International Workshop on Signal Processing Systems, Oct 2017, Lorient, France. 2017 Poster de conférence hal-01637300v1
Compa backend: a Dynamic Runtime for the execution of dataflow programs onto multi-core platforms Kevin Martin,Jean-Philippe Diguet,Yvan Eustache,Thanh Dinh Ngo,Emmanuel Casseauet al. Conference on Design & Architectures for Signal & Image Processing, Demo Night, Sep 2015, Cracow, Poland. 2015 Poster de conférence hal-01220680v1
Déploiement à la volée de réseaux d'acteurs dataflow dynamiques sur plateforme multiprocesseurs hétérogène Thanh Dinh Ngo,Kevin Martin,Jean-Philippe Diguet SoCSiP, Jun 2014, Paris, France. 2014 Poster de conférence hal-01078215v1
Orcc's Compa-Backend demonstration Yaset Oliva,Emmanuel Casseau,Kevin Martin,Pierre Bomel,Jean-Philippe Diguetet al. Conference on Design and Architectures for Signal and Image Processing, Demo Night, Oct 2014, Madrid, Spain. 2014 Poster de conférence hal-01059858v1

Brevet (2)

Procédé et dispositif d'architecture configurable à gros grains pour exécuter l'intégralité d'un code Thomas Peyret,Thevenin Mathieu,Gwenole Corre,Kevin Martin,Philippe Coussy France, N° de brevet: FR1460631. 2015 Brevet hal-01166875v1
Procédé et dispositif de tolérance aux fautes sur des composants électroniques Thomas Peyret,Thevenin Mathieu,Gwenole Corre,Philippe Coussy,Kevin Martin France, N° de brevet: FR1460633. 2015 Brevet hal-01166874v1

Autre publication scientifique (3)

Compiling for notifying memories: issues and challenges Kevin Martin 2019 Autre publication scientifique hal-02494373v1
Prise en compte de la contrainte de mémoire de programme dans un flot de compilation pour CGRA Satyajit Das,Kevin Martin,Philippe Coussy 2019 Autre publication scientifique hal-02171262v1
Move Based Algorithm for Runtime Mapping of Dataflow Actors on Heterogeneous MPSoCs Kevin Martin,Thanh Dinh Ngo,Jean-Philippe Diguet 2017 Autre publication scientifique hal-01638863v1

Thèse (1)

Génération automatique d'extensions de jeux d'instructions de processeurs Kevin Martin Génie logiciel [cs.SE]. Université Rennes 1, 2010. Français. ⟨NNT : ⟩ Thèse tel-00526133v1

HDR (1)

Mapping parallel applications on parallel architectures Kevin J M Martin Hardware Architecture [cs.AR]. Université Bretagne Sud, 2023 HDR tel-04054474v2

Cours (2)

On-chip memories at the edge Kevin J. M. Martin Doctoral. France. 2022 Cours hal-03710634v1
Mémoires sur puce : architecture et organisation Kevin Martin Doctorat. France. 2019 Cours hal-03294440v1