Lirida Naviner

Publications

Article dans une revue (52)

Impact of Scaling Up the Sensor Sampling Frequency on the Reliability of Edge Processing Systems in Tolerating Soft Errors Caused by Neutrons Matheus Minelli de Carvalho,Luiz Henrique Laurini,Emmanuel Atukpor,Lirida Naviner,Rodrigo Possamai Bastos IEEE Sensors Letters, 2024, 8 (9), pp.Article Sequence Number: 7004304. ⟨10.1109/LSENS.2024.3435677⟩ Article dans une revue hal-04681009v1
Check-Bit Region Exploration in Two-Dimensional Error Correction Codes David Freitas,David Mota,David Coelho,Humberto Fontinele,Alexandre Coelhoet al. IEEE Access, 2024, 12, pp.131830-131841. ⟨10.1109/ACCESS.2024.3456582⟩ Article dans une revue hal-05158125v1
Dependable STT-MRAM With Emerging Approximation and Speculation Paradigms Hao Cai,Yaoru Hou,Mengdi Zhang,Bo Liu,Lirida Naviner IEEE Design & Test, 2023, 40 (3), pp.17-25. ⟨10.1109/MDAT.2021.3120330⟩ Article dans une revue hal-04420922v1
A survey on two-dimensional Error Correction Codes applied to fault-tolerant systems David Freitas,César Marcon,Jarbas Silveira,Lirida Naviner,João Mota Microelectronics Reliability, 2022, 139, pp.114826. ⟨10.1016/j.microrel.2022.114826⟩ Article dans une revue hal-04420908v1
OPCoSA: an Optimized Product Code for space applications David Freitas,Jarbas Silveira,César Marcon,Lirida Naviner,João Mota Integration, the VLSI Journal, 2022, 84, pp.131-141. ⟨10.1016/j.vlsi.2022.02.005⟩ Article dans une revue hal-04420909v1
Commodity Bit-Cell Sponsored MRAM Interaction Design for Binary Neural Network Hao Cai,Zhongjian Bian,Zhonghua Fan,Bo Liu,Lirida Naviner IEEE Transactions on Electron Devices, 2022, 69 (4), pp.1721-1726. ⟨10.1109/TED.2021.3134588⟩ Article dans une revue hal-04420910v1
Writing-only in-MRAM computing paradigm for ultra-low power applications Bo Liu,Mingyue Liu,Yongliang Zhou,Xiaofeng Hong,Hao Caiet al. Microprocessors and Microsystems: Embedded Hardware Design , 2022, 90, pp.104449. ⟨10.1016/j.micpro.2022.104449⟩ Article dans une revue hal-04420915v1
Tunnel Magnetoresistance Based Passive Resistance Replacement in Hybrid MTJ-CMOS Integration Yu-Ang Wu,Xinshu Xie,Xinfang Tong,Yantong Di,Lirida Navineret al. IEEE Transactions on Nanotechnology, 2022, 21, pp.638-647. ⟨10.1109/TNANO.2022.3216778⟩ Article dans une revue hal-04420913v1
Investigation of PVT-Aware STT-MRAM Sensing Circuits for Low-VDD Scenario Zhongjian Bian,Xiaofeng Hong,Yanan Guo,Lirida Naviner,Wei Geet al. Micromachines, 2021, 12 (5), pp.551. ⟨10.3390/mi12050551⟩ Article dans une revue hal-04420923v1
A survey of in-spin transfer torque MRAM computing Hao Cai,Bo Liu,Juntong Chen,Lirida Naviner,Yongliang Zhouet al. Science China Information Sciences, 2021, 64 (6), pp.160402. ⟨10.1007/s11432-021-3220-0⟩ Article dans une revue hal-04420919v1
Sparse Realization in Unreliable Spin-Transfer-Torque RAM for Convolutional Neural Network Hao Cai,Juntong Chen,Yongliang Zhou,Xiaofeng Hong,Bo Liuet al. IEEE Transactions on Magnetics, 2021, 57 (2), pp.1-5. ⟨10.1109/TMAG.2020.3015146⟩ Article dans une revue hal-04420916v1
Analysis of stepwise charging limits and its implementation for efficiency improvement in switched capacitor DC–DC converters Francisco Veirano,Pablo Castro Lisboa,Pablo Pérez-Nicoli,Lirida Naviner,Fernando Silveira Analog Integrated Circuits and Signal Processing, 2021, 109 (2), pp.271-282. ⟨10.1007/s10470-021-01810-5⟩ Article dans une revue hal-04420921v1
Triple Sensing Current Margin for Maintainable MRAM Yield at Sub-100% Tunnel Magnetoresistance Ratio Hao Cai,Menglin Han,Yongliang Zhou,Bo Liu,Lirida Naviner IEEE Transactions on Magnetics, 2021, 57 (2), pp.1-5. ⟨10.1109/TMAG.2020.3011614⟩ Article dans une revue hal-04420918v1
Magnetic Tunnel Junction Applications Nilson Maciel,Elaine Marques,Lirida Naviner,Yongliang Zhou,Hao Cai Sensors, 2020, 20 (1), pp.121. ⟨10.3390/s20010121⟩ Article dans une revue hal-02941339v1
CSME: A novel cycle-sensing margin enhancement scheme for high yield STT-MRAM H. Cai,M. Liu,Y. Zhou,B. Liu,Lirida Naviner Microelectronics Reliability, 2020, pp.113732. ⟨10.1016/j.microrel.2020.113732⟩ Article dans une revue hal-02941338v1
Optimal Asymmetrical Back Plane Biasing for Energy Efficient Digital Circuits in 28 nm UTBB FD-SOI Francisco Veirano,Lirida Naviner,Fernando Silveira Integration, the VLSI Journal, 2019, 65, pp.211-218. ⟨10.1016/j.vlsi.2017.08.008⟩ Article dans une revue istex hal-02287634v1
Voltage-Controlled Magnetic Anisotropy MeRAM Bit-Cell over Event Transient Effects Nilson Maciel,Elaine Crespo Marques,Lirida Naviner,Hao Cai,Jun Yang Journal of Low Power Electronics Applications, 2019, 9 (2), pp.1-14. ⟨10.3390/jlpea9020015⟩ Article dans une revue hal-02288058v1
Reliability analysis of NAND-like spintronic memory N. Maciel,E. C. Marques,Lirida Naviner,H. Cai,J. Yang Microelectronics Reliability, 2019, 100-101, pp.113332. ⟨10.1016/j.microrel.2019.06.024⟩ Article dans une revue hal-02941340v1
A Review of Sparse Recovery Algorithms Elaine Crespo Marques,Nilson Maciel,Lirida Naviner,Hao Cai,Jun Yang IEEE Access, 2019, 7, pp.1300-1322. ⟨10.1109/ACCESS.2018.2886471⟩ Article dans une revue hal-02942487v1
Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration Hao Cai,You Wang,Lirida Naviner,Xinning Liu,Weiwei Shanet al. IEEE Transactions on Circuits and Systems I: Regular Papers, 2019, 66 (1), pp.239-250. ⟨10.1109/TCSI.2018.2854277⟩ Article dans une revue hal-02942486v1
Soft-Error Vulnerability Estimation Approach Based on the SET Susceptibility of Each Gate Fábio Batagin Armelin,Lirida Naviner,Roberto D’amore Electronics, 2019, 8 (7), pp.749. ⟨10.3390/electronics8070749⟩ Article dans une revue hal-02941341v1
Single-event transient effects on dynamic comparator in 28nm FDSOI CMOS technology Nilson Maciel,Elaine Crespo Marques,Lirida Naviner,Hao Cai Microelectronics Reliability, 2018, 88-90, pp.965-968 Article dans une revue hal-02287982v1
Exploring Hybrid STT-MTJ/CMOS Energy Solution in Near-/Sub-Threshold Regime for IoT Applications Hao Cai,You Wang,Lirida Naviner,Jun Yang,Weisheng Zhao IEEE Transactions on Magnetics, 2018, 54 (2), pp.1-9. ⟨10.1109/TMAG.2017.2766220⟩ Article dans une revue hal-04420926v1
Exploring Hybrid STT-MTJ/CMOS Energy Solution in Near/Sub-Threshold Regime Hao Cai,You Wang,Lirida Naviner,Weisheng Zhao IEEE Transactions on Magnetics, 2018, 54 (2), pp.1-9 Article dans une revue hal-02287861v1
Analysis of Ageing effects on ARTIX7 XILINX FPGA (article) Author Mariem Slimani,Karim Benkalaia,Lirida Naviner Microelectronics Reliabilit Journal, 2017 Article dans une revue hal-02287639v1
Robust Ultra-Low Power Non-Volatile Logic-in-Memory Circuits in FD-SOI Technology Hao Cai,You Wang,Lirida Naviner,Weisheng Zhao IEEE Transactions on Circuits and Systems I: Regular Papers, 2017, 64 (4), pp.847-857 Article dans une revue hal-02287638v1
Failure Analysis in Magnetic Tunnel Junction Nanopillar with Interfacial Perpendicular Magnetic Anisotropy Weisheng Zhao,You Wang,Lirida Naviner Materials Science Journal, 2017, 9 (41), pp.1-17 Article dans une revue hal-02287641v1
A Non-Monte-Carlo Methodology for Variability Analysis of Magnetic Tunnel Junction-Based Circuits You Wang,Hao Cai,Lirida Naviner,Weisheng Zhao IEEE Transactions on Magnetics, 2017, 53 (3), pp.1-6. ⟨10.1109/TMAG.2016.2638913⟩ Article dans une revue hal-02287631v1
Optimum NMOS/PMOS Imbalance for Energy Efficient Digital Circuits Francisco Veirano,Lirida Naviner,Fernando Silveira IEEE Transactions on Circuits and Systems I: Regular Papers, 2017 Article dans une revue hal-02287635v1
High Performance MRAM with Spin-Transfer-Torque and Voltage-Controlled Magnetic Anisotropy Effects Hao Cai,Wang Kang,You Wang,Lirida Naviner,Jun Yanget al. Applied Sciences, 2017, 7 (9), pp.1-13. ⟨10.3390/app7090929⟩ Article dans une revue hal-02287690v1
Compact Model of Dielectric Breakdown in Spin-Transfer Torque Magnetic Tunnel Junction You Wang,Hao Cai,Lirida Naviner,Yue Zhang,Zhao Xiaoxuanet al. IEEE Transactions on Electron Devices, 2016, 63 (4), pp.1762 - 1767. ⟨10.1109/TED.2016.2533438⟩ Article dans une revue hal-01318736v1
A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28nm FDSOI Y. Wang,H. Cai,Lirida Naviner,X.X. Zhao,Y. Zhanget al. Microelectronics Reliability, 2016, ⟨10.1016/j.microrel.2016.07.073⟩ Article dans une revue istex hal-01371736v1
Breakdown Analysis of Magnetic Flip-flop With 28nm UTBB FDSOI Technology Hao Cai,You Wang,Lirida Naviner,Weisheng Zhao IEEE Transactions on Device and Materials Reliability, 2016, 16 (3), pp.376-383 Article dans une revue hal-02287471v1
Efficient reliability evaluation methodologies for combinational circuits Hao Cai,Kaikai Liu,Lirida Naviner,You Wang,Mariem Slimaniet al. Microelectronics Reliability, 2016, 64, pp.19-25. ⟨10.1016/j.microrel.2016.07.116⟩ Article dans une revue istex hal-02942489v1
Reliable majority voter based on spin transfer torque magnetic tunnel junction device Paulo Butzen,Mariem Slimani,You Wang,Hao Cai,Lirida Naviner IEEE Electronics Letters, 2016, 52 (1), pp.47-49 Article dans une revue hal-02287642v1
Reliability analysis of hybrid spin transfer torque magnetic tunnel junction/CMOS majority voters Mariem Slimani,Lirida Naviner,You Wang,Hao Cai Microelectronics Reliability, 2016, C (64), pp.48-53 Article dans une revue hal-02287469v1
Low Power Magnetic Flip-Flop Optimization With FDSOI Technology Boost Hao Cai,You Wang,Lirida Naviner,Weisheng Zhao IEEE Transactions on Magnetics, 2016, 52 (8), pp.1-7 Article dans une revue hal-02287472v1
Efficient reliability evaluation methodologies for combinational circuits Hao Cai,Kaikai Liu,Lirida Naviner,You Wang,Mariem Slimaniet al. Microelectronics Reliability, 2016, 64 Article dans une revue hal-02287474v1
Ultra wide voltage range consideration of reliability-aware STT magnetic flip-flop in 28nm FDSOI technology Hao Cai,You Wang,Lirida Naviner,Weisheng Zhao Microelectronics Reliability, 2015 Article dans une revue hal-02287224v1
Compact thermal modeling of spin transfer torque magnetic tunnel junction You Wang,Hao Cai,Lirida Naviner,Yue Zhang,Jacques-Olivier Kleinet al. Microelectronics Reliability, 2015, 55 (9-10), pp.1649-1653. ⟨10.1016/j.microrel.2015.06.029⟩ Article dans une revue istex hal-01216389v1
A dual-rail compact defect-tolerant multiplexer Arwa Ben Dhia,Mariem Slimani,Hao Cai,Lirida Naviner Microelectronics Reliability, 2015, 55, pp.662-670 Article dans une revue hal-01128326v1
Multiplexing Sense Amplifier Based Magnetic Flip Flop in 28nm FDSOI Technology Hao Cai,You Wang,Weisheng Zhao,Lirida Naviner IEEE Transactions on Nanotechnology, 2015, 14 (4) Article dans une revue hal-02287225v1
A Novel Analytical Method for Defect Tolerance Assessment Mariem Slimani,Arwa Ben Dhia,Lirida Naviner Microelectronics Reliability, 2015, 55, pp.1285-1289 Article dans une revue hal-01216729v1
Accurate Reliability Analysis of Concurrent Checking Circuits Employing An Efficient Analytical Method Ting An,Kaikai Liu,Hao Cai,Lirida Naviner Microelectronics Reliability, 2015, 55 (3-4), pp.696-703 Article dans une revue hal-01122423v1
Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses You Wang,Yue Zhang,Erya Deng,Jacques-Olivier Klein,Lirida Navineret al. Microelectronics Reliability, 2014, 54 (9-10), pp.1774-1778. ⟨10.1016/j.microrel.2014.07.019⟩ Article dans une revue istex hal-01216414v1
Optimal digital reconstruction and calibration for multichannel Time Interleaved ΣΔ ADC based on Comb-filters Ali Beydoun,van Tam Nguyen,Lirida Naviner,Patrick Loumeau AEÜ - International Journal of Electronics and Communications / Archiv für Elektronik und Übertragungstechnik, 2013, 67 (4), pp.329-339. ⟨10.1016/j.aeue.2012.10.004⟩ Article dans une revue istex hal-02942479v1
SNaP: a Novel Hybrid Method for Circuit Reliability Assessment Under Multiple Faults Samuel Nascimento Pagliarini,Arwa Ben Dhia,Lirida Naviner,J. F. Naviner Microelectronics Reliability, 2013, pp.1230-1234 Article dans une revue hal-01062108v1
A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs Arwa Ben Dhia,S. N. Pagliarini,Lirida Naviner,Habib Mehrez,Philippe Matherat Microelectronics Reliability, 2013, 53 (9-11), pp.1189-1193. ⟨10.1016/j.microrel.2013.06.014⟩ Article dans une revue hal-01195954v1
A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs Arwa Ben Dhia,Samuel Nascimento Pagliarini,Lirida Naviner,Habib Mehrez,Philippe Matherat Microelectronics Reliability, 2013, pp.1189-1193 Article dans une revue hal-01062109v1
Majority voter: Signal probability, reliability and error bound characteristics Tian Ban,Lirida Naviner Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on, 2012, pp.538 - 541 Article dans une revue hal-00728879v1
Progressive module redundancy for fault-tolerant designs in nanoelectronics Tian Ban,Lirida Naviner Microelectronics Reliability, 2011, 51 (9-11), pp.1489-1492. ⟨10.1016/j.microrel.2011.06.020⟩ Article dans une revue istex hal-02942481v1
FIFA: A fault-injection-fault-analysis-based tool for reliability assessment at RTL level Lirida Naviner,Jean-Francois Naviner,Gutemberg Goncalves dos Santos Junior,Elaine Crespo Marques,Nilson Maciel de Paiva Junior Microelectronics Reliability, 2011, 51 (9-11), http://www.sciencedirect.com/science/article/pii/S0026271411002162. ⟨10.1016/j.microrel.2011.06.017⟩ Article dans une revue istex hal-00627134v1

Communication dans un congrès (110)

RV-Sec5: Enhancing RISC-V Security Evaluation via Targeted ISA-Level Instrumentation using gem5 Muhammad Awais,Maria Mushtaq,Lirida Naviner,Florent Bruguier,Jawad Haj Yahya 17th Australasian Information Security Conference (AISC 2026 ), Australasian Computer Science Week (ACSW 2026), Feb 2026, Melbourne, Australia. ⟨10.1145/3793638.3793640⟩ Communication dans un congrès hal-05525254v2
Opcode Analysis of Real Encryption-Based Microarchitectural Attacks Using gem5 Muhammad Awais,Mahreen Khan,Maria Mushtaq,Lirida Naviner,Jawad Haj-Yahyaet al. ComComAp 2025 - 7th Computing, Communications and IoT Applications Conference, Dec 2025, Madrid, Spain. pp.377-384, ⟨10.1109/ComComAp68359.2025.11353163⟩ Communication dans un congrès hal-05393482v1
Near-sensor testing method for observing radiation-induced soft errors in modern sensors Matheus Minelli de Carvalho,Benjamin Cheymol,Lirida Naviner,Rodrigo Possamai Bastos Conference on Design of Circuits and Integrated Systems (DCIS 2025), Nov 2025, Santander, Spain Communication dans un congrès hal-05404459v1
Bypass Synchronization Primitives: GhostRace Attack and Mitigation on RISC-V Mahreen Khan,Maria Priscilla,Matheus Victor,Maria Mushtaq,Renaud Pacaletet al. 7th Computing, Communications and IoT Applications Conference (ComComAp 2025), Dec 2025, Madrid, Spain Communication dans un congrès hal-05393473v1
HYGENE: A Diffusion-Based Hypergraph Generation Method Dorian Gailhard,Enzo Tartaglione,Lirida Naviner,Jhony Giraldo The 39th AAAI Conference on Artificial Intelligence e (AAAI-25), Association for the Advancement of Artificial Intelligence, Feb 2025, Philadelphia, United States. pp.16682-16690, ⟨10.1609/aaai.v39i16.33833⟩ Communication dans un congrès hal-05166733v1
Leveraging gem5 and Machine Learning for End-to-End Detection of Cache-based Side-Channel Attack Patterns Muhammad Awais,Maria Mushtaq,Lirida Naviner,Florent Bruguier,Pascal Benoitet al. PROOFS 2025 - 13th International Workshop on Security Proofs for Embedded Systems, Sep 2025, Kuala Lumpur, Malaysia Communication dans un congrès hal-05372979v1
Impact of scaling up the sensor sampling frequency on the reliability of edge processing systems in tolerating soft errors caused by neutrons Matheus Minelli de Carvalho,Luiz Henrique Laurini,Emmanuel Atukpor,Lirida Naviner,Rodrigo Possamai Bastos IEEE Sensors Conference 2024, Oct 2024, Kobe, Japan Communication dans un congrès hal-04739776v1
Neutron radiation tests and assessment of edge computing systems Rodrigo Possamai Bastos,Luiz Henrique Laurini,Matheus Minelli de Carvalho,Lirida Naviner Invited talk presented in VII Workshop sobre os Efeitos das Radiações Ionizantes em Componentes e Circuitos Eletrônicos de Uso Aeroespacial (WERICE AEROESPACIAL 2024), Nov 2024, São José dos Campos, Brazil Communication dans un congrès hal-04739744v1
Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5 Muhammad Awais,Maria Mushtaq,Lirida Naviner,Florent Bruguier,Jawad Haj Yahyaet al. RSP 2024 - IEEE International Workshop on Rapid System Prototyping, Oct 2024, North Carolina, United States. pp.1-6, ⟨10.1109/RSP64122.2024.10871078⟩ Communication dans un congrès hal-05160886v2
Fast analysis of combinatorial netlists correctness rate based on binomial law and partitioning Esther Goudet,Luis Peña Treviño,Lirida Naviner,Jean-Marc Daveau,Philippe Roche 2023 IEEE 24th Latin American Test Symposium (LATS), Mar 2023, Veracruz, Mexico. pp.1-6, ⟨10.1109/lats58125.2023.10154491⟩ Communication dans un congrès hal-04420927v1
Fast and accurate estimation of correctness rate in combinatorial circuits based on clustering Esther Goudet,Lirida Naviner,Jean Marc Daveau,Philippe Roche IEEE Workshop on Silicon Errors in Logic – System Effects SELSE 2023, IEEE, Mar 2023, ONLINE, France. pp.1-6 Communication dans un congrès hal-04458400v1
Minconvnets: a New Class of Multiplication-Less Neural Networks Xuecan Yang,Sumanta Chaudhuri,Laurence Likforman-Sulem,Lirida Naviner 2022 IEEE International Conference on Image Processing (ICIP), Oct 2022, Bordeaux, France. pp.881-885, ⟨10.1109/ICIP46576.2022.9897286⟩ Communication dans un congrès hal-04297354v1
Ultra-low Power Access Strategy for Process-Voltage-Temperature Aware STT-MRAM You-You Zhang,Lirida Naviner,Hao Cai 2021 IEEE 14th International Conference on ASIC (ASICON), Oct 2021, Kunming, China. pp.1-4, ⟨10.1109/ASICON52560.2021.9620529⟩ Communication dans un congrès hal-04477660v1
Hybrid MTJ-CMOS Integration for Sigma-Delta ADC Yu-Ang Wu,Lirida Naviner,Hao Cai 2021 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Nov 2021, AB, Canada. pp.1-5, ⟨10.1109/NANOARCH53687.2021.9642236⟩ Communication dans un congrès hal-04477656v1
Novel Self-timing Speculative Writing for Unreliable STT-MRAM Meng-Di Zhang,Hao Cai,Lirida Naviner 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT), Nov 2020, Kunming, China. pp.1-3, ⟨10.1109/ICSICT49897.2020.9278373⟩ Communication dans un congrès hal-04477675v1
Magnetic Tunnel Junction-based Analog-to-Digital Converter using Spin Orbit Torque Mechanism Nilson Maciel,Elaine Marques,Lirida Naviner,Hao Cai 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Nov 2020, Glasgow, United Kingdom. pp.1-4, ⟨10.1109/ICECS49266.2020.9294780⟩ Communication dans un congrès hal-04477665v1
Quad-Approx CNNs for Embedded Object Detection Systems Xuecan Yang,Sumanta Chaudhuri,Lirida Naviner,Laurence Likforman-Sulem 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Nov 2020, Glasgow, United Kingdom. pp.1-4, ⟨10.1109/ICECS49266.2020.9294829⟩ Communication dans un congrès hal-04297374v1
Deep Learning Approaches for Sparse Recovery in Compressive Sensing E. Marques,N. Maciel,Lirida Naviner,H. Cai,J. Yang 2019 11th International Symposium on Image and Signal Processing and Analysis (ISPA), Sep 2019, Dubrovnik, Croatia. pp.129-134, ⟨10.1109/ISPA.2019.8868841⟩ Communication dans un congrès hal-04477689v1
Comprehensive Pulse Shape Induced Failure Analysis in Voltage-Controlled MRAM Mingyue Liu,Hao Cai,Menglin Han,Lei Xie,Jun Yanget al. 2019 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Jul 2019, Qingdao, China. pp.1-6, ⟨10.1109/NANOARCH47378.2019.181292⟩ Communication dans un congrès hal-04477682v1
Nonlinear Functions in Learned Iterative Shrinkage-Thresholding Algorithm for Sparse Signal Recovery Elaine Crespo Marques,Nilson Maciel,Lirida Naviner,Hao Cai,Jun Yang 2019 IEEE International Workshop on Signal Processing Systems (SiPS), Oct 2019, Nanjing, China. pp.324-329, ⟨10.1109/SiPS47522.2019.9020469⟩ Communication dans un congrès hal-04477699v1
Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low Power Hao Cai,Menglin Han,You Wang,Lirida Naviner,Xinning Liuet al. 2018 Conference on Design of Circuits and Integrated Systems (DCIS), Nov 2018, Lyon, France. pp.1-5, ⟨10.1109/DCIS.2018.8681471⟩ Communication dans un congrès hal-04477704v1
Probability Aware Fault-Injection Approach for SER Estimation Fabio Batagin Armelin,Lirida Naviner,Roberto d'Amore Proceedings of IEEE Latin American Test Symposium (LATS), Mar 2018, São Paulo, SP, Brazil Communication dans un congrès hal-02287888v1
Stability and Variability Emphasized STT-MRAM Sensing Circuit With Performance Enhancement Menglin Han,Hao Cai,Jun Yang,Lirida Naviner,You Wanget al. 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Oct 2018, Chengdu, China. pp.386-389, ⟨10.1109/APCCAS.2018.8605603⟩ Communication dans un congrès hal-04477743v1
Compressed Sensing for Wideband HF Channel Estimation Elaine Crespo Marques,Nilson Maciel,Lirida Naviner,Hao Cai,Jun Yang 4th International Conference on Frontiers of Signal Processing, Sep 2018, Poitiers, France. pp.1-5 Communication dans un congrès hal-02287975v1
Design Space Exploration of Magnetic Tunnel Junction based Stochastic Computing in Deep Learning You Wang,Yue Zhang,Zhabg Youguang,Weisheng Zhao,Hao Caiet al. To appear in Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2018, Chicago, Illinois, United States. pp.23-25 Communication dans un congrès hal-02287894v1
Using FPGA self-produced transients to emulate SETs for SER estimation Fabio Batagin Armelin,Lirida Naviner,Roberto d'Amore Proceedings of IEEE Latin American Test Symposium (LATS), Mar 2018, São Paulo, SP, Brazil Communication dans un congrès hal-02288530v1
MRAM-on-FDSOI Integration: A Bit-Cell Perspective Hao Cai,You Wang,Wang Kang,Lirida Naviner,Xinning Liuet al. 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Jul 2018, Hong Kong, China. pp.263-268, ⟨10.1109/ISVLSI.2018.00056⟩ Communication dans un congrès hal-04477718v1
Design, Synthesis and Application of A Novel Approximate Adder Tian Ban,Baokun Wang,Lirida Naviner 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS), Aug 2018, Windsor, Canada. pp.488-491, ⟨10.1109/MWSCAS.2018.8624023⟩ Communication dans un congrès hal-04477695v1
Reliability evaluation of circuits designed in multi- and single-stage versions R. Schvittz,M. Pontes,C. Meinhardt,D. Franco,Lirida Navineret al. 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), Feb 2018, Puerto Vallarta, Mexico. pp.1-4, ⟨10.1109/LASCAS.2018.8399927⟩ Communication dans un congrès hal-04477727v1
Enabling Resilient Voltage-Controlled MeRAM Using Write Assist Techniques Hao Cai,You Wang,Lirida Naviner,Jun Yang,Wang Kanget al. IEEE International Symposium on Circuits and Systems (ISCAS), May 2018, Florence, Italy Communication dans un congrès hal-02288533v1
Asymmetrical Length Biasing for Energy Efficient Digital Circuits Francisco Veirano,Lirida Naviner,Fernando Silveira IEEE Latin American Symposium on Circuits and Systems, Feb 2017, Bariloche, Argentina Communication dans un congrès hal-02287637v1
Novel Pulsed-Latch Replacement in Non-Volatile Flip-Flop Core Hao Cai,You Wang,Lirida Naviner,Weisheng Zhao VLSI (ISVLSI), 2017 IEEE Computer Society Annual Symposium on, Jun 2017, Bochum, Germany Communication dans un congrès hal-02287633v1
Energy Efficient Magnetic Tunnel Junction Based Hybrid LSI Using Multi-Threshold UTBB-FD-SOI Device Hao Cai,You Wang,Lirida Naviner,Weisheng Zhao Great Lakes Symposium on VLSI 2017 (GLSVLSI 17), May 2017, Banff, Canada Communication dans un congrès hal-02287632v1
Practical metrics for evaluation of fault-tolerant logic design Alexandre Stempkovskiy,Dmitry Telpukhov,Roman Solovyev,Ekaterina Balaka,Lirida Naviner IEEE Conference of Russian Young Researchers in Electrical and Electronic Engineering, Feb 2017, Saint Petersbourgh, Russia. pp.569-573 Communication dans un congrès hal-02287656v1
Sparsity Analysis using a Mixed Approach with Greedy and LS Algorithms on Channel Estimation Nilson Maciel,Elaine Crespo Marques,Lirida Naviner International Conference on Frontiers of Signal Processing (ICFSP), Sep 2017, Paris, France. pp.91-95 Communication dans un congrès hal-02287640v1
Analysis of Ageing effects on ARTIX7 XILINX FPGA Mariem Slimani,Karim Benkalaia,Lirida Naviner European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Sep 2017, Bordeaux, France Communication dans un congrès hal-02287636v1
Design Considerations for Reliable OxRAM-based Non-Volatile Flip-Flops in 28nm FD-SOI Technology Natalija Jovanovic,Olivier Thomas,Elisa Vianello,Boris Nikolic,Lirida Naviner IEEE International Symposium on Circuits and Systems (ISCAS 2016), May 2016, Montréal, Canada. pp.1146-1149, ⟨10.1109/ISCAS.2016.7527448⟩ Communication dans un congrès hal-02287862v1
A Layout-Based Fault Injection Methodology for SER Prediction: Implementation and Correlation with 65nm Heavy Ion Experimental Results Benjamin Coeffic,Victor Malherbe,Jean-Marc Daveau,Gilles Gasiot,Lirida Navineret al. Proceedings of IEEE Nuclear and Space Radiation Effects Conference (NSREC), Jul 2016, New Orleans, United States Communication dans un congrès hal-02288532v1
A process-variation-resilient methodology of circuit design by using asymmetrical forward body bias in 28 nm FDSOI You Wang,Hao Cai,Lirida Naviner,Weisheng Zhao,Jacques-Olivier Kleinet al. ESREF 2016, 27th EUROPEAN SYMPOSIUM ON RELIABILITY OF ELECTRON DEVICES, FAILURE PHYSICS AND ANALYSIS, Sep 2016, Händel-Halle, Halle, Germany. ⟨10.1016/j.microrel.2016.07.073⟩ Communication dans un congrès istex hal-01371743v1
Approximate Computing in MOS/Spintronic Non-Volatile Full-Adder Hao Cai,You Wang,Lirida Naviner,Weisheng Zhao 12th ACM/IEEE International Symposium on Nanoscale Architectures, Jun 2016, Beijing, China Communication dans un congrès hal-02412223v1
Radiation Hardening Improvement of a SerDes under Heavy Ions up to 60 MeV.cm2/mg by Layout-Aware Fault Injection Benjamin Coeffic,Jean-Marc Daveau,Gilles Gasiot,A.E. Pricco,S. Pariniet al. Proceedings of IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE), Mar 2016, Austin, Texas, United States Communication dans un congrès hal-02287892v1
A novel circuit design of true random number generator using magnetic tunnel junction You Wang,Hao Cai,Lirida Naviner,Jacques-Olivier Klein,Jianlei Yanget al. 12th ACM/IEEE International Symposium on Nanoscale Architectures (Nanoarch 2016), At Beijing, China, Jul 2016, Beijing, China Communication dans un congrès hal-01371756v1
A Novel Analytical Method for Defect Tolerance Assessment Mariem Slimani,Arwa Ben Dhia,Lirida Naviner European Symposium on Reliability of Electron devices, Failure physics and Analysis, Oct 2015, Toulouse, France Communication dans un congrès hal-01216726v1
Partial Triplication of a Sparc-V8 Microprocessor Using Fault Injection Cyril Bottoni,Benjamin Coeffic,Jean-Marc Daveau,Lirida Naviner,Philippe Roche Proceedings of IEEE Latin American Symposium on Circuits and Systems (LASCAS), Feb 2015, Montevideo, Uruguay Communication dans un congrès hal-02287891v1
Frequency and Voltage Effects on SER on a 65nm Sparc-V8 Microprocessor Under Radiation Test Cyril Bottoni,Benjamin Coeffic,Jean-Marc Daveau,Gilles Gasiot,F. Abouzeidet al. Proceedings of IEEE International Reliability Physics Symposium (IRPS), Apr 2015, Monterrey, CA, United States Communication dans un congrès hal-02287890v1
A Tool for Transient Fault Analysis in Combinational Circuits Mariem Slimani,Lirida Naviner IEEE International Conference on Electronics, Circuits, and Systems, Dec 2015, Caire, Egypt Communication dans un congrès hal-02287234v1
Design insights for reliable energy efficient OxRAM-based flip-flop in 28nm FD-SOI Natalija Jovanovic,Elisa Vianello,Olivier Thomas,Boris Nikolic,Lirida Naviner Proceedings of IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), Oct 2015, Sonoma Valley, CA, United States Communication dans un congrès hal-02287895v1
Ultra wide voltage range consideration of reliability-aware STT magnetic flip-flop in 28nm FDSOI technology Hao Cai,You Wang,Lirida Naviner,Weisheng Zhao 26th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Oct 2015, Toulouse, France Communication dans un congrès hal-02287226v1
D2D Broadcast Communications for 4G PMR Networks Xavier Pons Masbernart,Christophe Gruet,Eric Georgeaux,Lirida Naviner Proceedings of IFIF International Conference on New Technologies, Mobility and Security (NTMS), Jul 2015, Paris, France Communication dans un congrès hal-02287897v1
Stochastic Computation With Spin Torque Transfer Magnetic Tunnel Junction Lirida Naviner,Hao Cai,You Wang,Weisheng Zhao,Arwa Ben Dhia IEEE-NEWCAS, Jun 2015, Grenoble, France Communication dans un congrès hal-02412179v1
A Layout-Aware Approach to Fault Injection for Improving Failure Mode Prediction Cyril Bottoni,Benjamin Coeffic,Jean-Marc Daveau,Gilles Gasiot,Lirida Navineret al. Proceedings of Workshop on Silicon Errors in Logic - System Effects (SELSE), Mar 2015, Austin, United States Communication dans un congrès hal-02288531v1
Battery-aware network discovery algorithm for mobile terminals within heterogeneous networks Xavier Pons Masbernart,S. Althunibat,G Kibalya,Christophe Gruet,Lirida Navineret al. Proceedings of IEEE International Workshop on Computer Aided Modeling and Design of Communication Links and Networks (CAMAD), Dec 2014, Athens, Greece Communication dans un congrès hal-02287896v1
Simulation Study of Aging in CMOS Binary Adders Ting An,Hao Cai,Lirida Naviner MIPRO 37th International Convention/Microelectronics, Electronics and Electronic Technology, May 2014, Opatija, Croatia Communication dans un congrès hal-02288395v1
Cross Logic : A New Approach for Defect-Tolerant Circuits Mariem Slimani,Arwa Ben Dhia,Lirida Naviner IEEE International Conference on IC Design and Technology (ICICDT), May 2014, Austin, United States. pp.1-4 Communication dans un congrès hal-01062064v1
Reliability-aware Delay Faults Evaluation of CMOS Flip-Flops Hao Cai,Kaikai Liu,Lirida Naviner 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES), Jun 2014, Lublin, Poland Communication dans un congrès hal-02412061v1
Efficient Implementation for Accurate Analysis of CED Circuits Against Multiple Faults Ting An,Kaikai Liu,Hao Cai,Lirida Naviner 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES), Jun 2014, Lublin, Poland Communication dans un congrès hal-02286893v1
Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA Saif-Ur Rehman,Adrien Blanchardon,Arwa Ben Dhia,Mounir Benabdenbi,Roselyne Chotin-Avotet al. IEEE Computer Society Annual Symposium on VLSI (ISVLSI'14), Jul 2014, Tampa, FL, United States. pp.553-558, ⟨10.1109/ISVLSI.2014.66⟩ Communication dans un congrès hal-01400630v1
Comparative Study of Defect-Tolerant Multiplexers for FPGAs Arwa Ben Dhia,Mariem Slimani,Lirida Naviner 20th IEEE International On-Line Testing Symposium (IOLTS), Jul 2014, Platja d'Aro, Spain. pp.7-12 Communication dans un congrès hal-01062059v1
OxRAM-Based Non Volatile Flip-Flop in 28nm FDSOI Natalija Jovanovic,Olivier Thomas,Elisa Vianello,Jean-Michel Portal,Boris Nikolicet al. 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS), Jun 2014, Trois Rivières, Canada. ⟨10.1109/NEWCAS.2014.6934003⟩ Communication dans un congrès hal-02288534v1
Efficient Computation of Combinational Circuits Reliability Based on Probabilistic Transfer Matrix Lirida Naviner,Kaikai Liu,Hao Cai,Jean-François Naviner International Conference on IC Design and Technology (ICICDT), May 2014, Austin, United States Communication dans un congrès hal-02412060v1
Heavy ions test result on a 65nm sparc-v8 radiation-hard microprocessor Cyril Bottoni,Jean-Marc Daveau,Gilles Gasiot,Lirida Naviner,Philippe Roche IEEE International Reliability Physics Symposium, Jun 2014, Waikoloa, Hawai, United States Communication dans un congrès hal-02412075v1
A hybrid reliability assessment method and its support of sequential logic modelling Samuel Nascimento Pagliarini,Lirida Naviner,Jean-François Naviner,Dhiraj Pradhan IEEE International On-line Test Symposium, Jul 2014, Platja d'Aro, Spain Communication dans un congrès hal-02412073v1
A Defect-Tolerant Multiplexer Using Differential Logic for FPGAs Arwa Ben Dhia,Mariem Slimani,Lirida Naviner IEEE 21st Mixed Design of Integrated Circuits and Systems Conference (MIXDES), Jun 2014, Lublin, Poland. pp.375-380 Communication dans un congrès hal-01062063v1
Improving the Robustness of a Switch Box in a Mesh of Clusters FPGA Arwa Ben Dhia,Mariem Slimani,Lirida Naviner 15th IEEE Latin American Test Workshop (LATW), Mar 2014, Fortaleza, Brazil. pp.1-6 Communication dans un congrès hal-01062066v1
Analytical method for reliability assessment of concurrent checking circuits under multiple faults Ting An,Kaikai Liu,Lirida Naviner MIPRO 37th International Convention/Microelectronics, Electronics and Electronic Technology, May 2014, Opatija, Croatia Communication dans un congrès hal-02286867v1
Flip-flop selection for in-situ slack-time monito- ring based on the activation probability of timing-critical paths. Sébastien Sarrazin,Samuel Evain,Ivan Miro Panades,Alexandre Valentian,Lirida Navineret al. IEEE International On-line Test Symposium, Jul 2014, Platja d'Aro, Spain Communication dans un congrès hal-02412072v1
A Study of Statistical Variability-aware Methods Hao Cai,Kaikai Liu,Lirida Naviner IEEE International Symposium on Radio Frequency Integration Technology (RFIT), Aug 2014, Hefei, China Communication dans un congrès hal-02286946v1
Evaluating CLB Designs under Multiple SETs in SRAM-based FPGAs Arwa Ben Dhia,Lirida Naviner,Philippe Matherat IEEE Symp. Defect and Fault Tolerance (DFT), Oct 2013, New-York City, United States. pp.112-117 Communication dans un congrès hal-01062101v1
Comparison of Fault-Tolerant Fabless CLBs in SRAM-based FPGAs Arwa Ben Dhia,Lirida Naviner,Philippe Matherat IEEE Latin-American Test Workshop (LATW), Apr 2013, Cordoba, Argentina. pp.1-6 Communication dans un congrès hal-01062112v1
Reliability Assessment of Combinational Logic Using First-Order-Only Fanout Reconvergence Analysis Samuel Nascimento Pagliarini,Tian Ban,Lirida Naviner,Jean-François Naviner Midwest Symposium on Circuits and Systems (MWSCAS), Aug 2013, Columbus, OH., United States Communication dans un congrès hal-02411994v1
Reliability analysis of combinational circuits with the influences of noise and single-event transients Kaikai Liu,Hao Cai,Ting An,Lirida Naviner,Jean-François Navineret al. IEEE Symp. Defect and Fault Tolerance (DFT), Oct 2013, New York City, United States Communication dans un congrès hal-02286814v1
Single Event Transient Mitigation Through Pulse Quenching: Effectiveness at Circuit Level Samuel Nascimento Pagliarini,Lirida Naviner,Jean-François Naviner IEEE International Conference of Electronics, Circuits and Systems (ICECS), Dec 2013, Abu Dhabi, United Arab Emirates Communication dans un congrès hal-02412466v1
A model to simulate the behaviour of probabilistic gates Kaikai Liu,Lirida Naviner,Jean-François Naviner Journées Nationales du Réseau Doctoral de Microélectronique, Jun 2013, Grenoble, France Communication dans un congrès hal-02286894v1
A Defect-tolerant Cluster in a Mesh SRAM-based FPGA Arwa Ben Dhia,Saif Ur Rehman,Adrien Blanchardon,Lirida Naviner,Mounir Benabdenbiet al. International Conference on Field-Programmable Technology (FPT), Dec 2013, Kyoto, Japan. pp.434-437, ⟨10.1109/FPT.2013.6718407⟩ Communication dans un congrès hal-00987365v1
Exploring the Impact of Transient Faults on CORDIC Processor Ting An,Lirida Naviner,Philippe Matherat Journées Nationales du Réseau Doctoral en Micro-nanoélectronique (JNRDM), Jun 2013, Grenoble, France Communication dans un congrès hal-02411992v1
Uplink energy efficiency in LTE systems Xavier Pons Masbernart,Raul Palacios,Christophe Gruet,Lirida Naviner,Hugo Marqueset al. IEEE International Workshop on Computer Aided Modeling and Design of Communication Links and Networks, Sep 2013, Berlin, Germany Communication dans un congrès hal-02412074v1
Nouvelle architecture de BLE tolérante aux fautes dans les FPGAs SRAM Arwa Ben Dhia,Lirida Naviner,Philippe Matherat Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM), Jun 2013, Grenoble, France Communication dans un congrès hal-02288374v1
Evaluation of Fault-tolerant Composite Field AES S-Boxes under Multiple Transient Faults Ting An,Lirida Naviner,Philippe Matherat IEEE International NEWCAS Conference, Jun 2013, Paris, France. pp.1 - 4 Communication dans un congrès hal-00973720v1
Selective Hardening Against Multiple Faults Employing a Net-based Reliability Analysis Samuel Nascimento Pagliarini,Lirida Naviner,Jean-François Naviner International New Circuits and Systems Conference (NEWCAS), Jun 2013, Paris, France Communication dans un congrès hal-02411993v1
A General Cost-effective Design Structure for Probabilistic-Based Noise-Tolerant Logic Functions in Nanometer CMOS Technology Kaikai Liu,Ting An,Hao Cai,Lirida Naviner,Jean-François Navineret al. Eurocon 2013, Jul 2013, Zagreb, Croatia. pp.1829-1836, ⟨10.1109/EUROCON.2013.6625225⟩ Communication dans un congrès hal-02286855v1
Circuit-level Hardening Against Multiple Faults: Combining Global TMR and Selective Hardening Samuel Nascimento Pagliarini,Lirida Naviner,Jean-François Naviner Journées Nationales du Réseau Doctoral de Microélectronique, Jun 2013, Grenoble, France Communication dans un congrès hal-02286728v1
A Low Cost Reliable Architecture for S-Boxes in AES Processors Ting An,Lirida Naviner,Philippe Matherat IEEE Symp. Defect and Fault Tolerance (DFT), Oct 2013, New York City, U.S. Outlying Islands. pp.155-160 Communication dans un congrès hal-01024892v1
SNaP: a Novel Hybrid Method for Circuit Reliability Assessment Under Multiple Faults Samuel Nascimento Pagliarini,Arwa Ben Dhia,Lirida Naviner,J. F. Naviner European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Oct 2013, Arcachon, France. pp.1230-1234 Communication dans un congrès hal-01062078v1
A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs Arwa Ben Dhia,Samuel Nascimento Pagliarini,Lirida Naviner,Habib Mehrez,Philippe Matherat European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Oct 2013, Arcachon, France. pp.1189-1193 Communication dans un congrès hal-01062075v1
Transient Fault Analysis of CORDIC Processor Ting An,Matteo Causo,Lirida Naviner,Philippe Matherat IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2012, Séville, Spain. pp.757 - 760 Communication dans un congrès hal-00973764v1
Transient Fault Analysis of CORDIC Processor Ting An,Matteo Causo,Lirida Naviner,Philippe Matherat IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2012, Séville, Spain. pp.757 - 760 Communication dans un congrès hal-00973766v1
Transient Fault Analysis of CORDIC Processor Ting An,Matteo Causo,Lirida Naviner,Philippe Matherat IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2012, Séville, Spain. pp.757 - 760 Communication dans un congrès hal-00973765v1
Single-Event-Induced Charge Sharing Effects in TMR with Different Levels of Granularity Felipe Almeida,Fernanda Lima Kastensmidt,Samuel Nascimento Pagliarini,Luis Entrena,Almudena Lindosoet al. European Conference on Radiation and Its Effects on Components and Systems (RADECS), Sep 2012, Biarritz, France Communication dans un congrès hal-02286461v1
Parallel Scaling-Free and Area-Time Efficient CORDIC Algorithm Matteo Causo,Ting An,Lirida Naviner IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2012, Séville, Spain. pp.149 - 152 Communication dans un congrès hal-01024891v1
Tolérance aux défauts dans les FPGAs Arwa Ben Dhia,Lirida Naviner,P. Matherat Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM), Jun 2012, Marseille, France Communication dans un congrès hal-02411877v1
Reliability estimation methods : Tradeoffs between complexity and accuracy Samuel Nascimento Pagliarini,Denis Teixeira Franco,Lirida Naviner,Jean-François Naviner Southern Simposium of Microelectronics, Apr 2012, Sao Miguel das Missoes, RS, Brazil Communication dans un congrès hal-02288322v1
Selective Hardening Concerning Single and Multiple Faults Samuel Nascimento Pagliarini,Lirida Naviner,Jean-François Naviner Journées Nationales du Réseau Doctoral de Microélectronique (JNRDM), Jun 2012, Marseille, France Communication dans un congrès hal-02286334v1
Reliability Analysis of a Reed-Solomon Decoder Kaikai Liu,Tian Ban,Lirida Naviner,Jean-François Naviner IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Aug 2012, Boise, Idaho, United States Communication dans un congrès hal-02411876v1
Designing Digital Reliable Processors in Nanotechnologies Lirida Naviner NanoTechItaly, Nov 2012, Venice, Italy Communication dans un congrès hal-02411921v1
Green Solutions for Future LTE PMR Networks Xavier Pons Masbernart,Christophe Gruet,Frédéric Fraysse,Serge Contal,Lirida Naviner IEEE International Workshop on Computer Aided Modeling and Design of Communication Links and Networks (CAMAD), Sep 2012, Barcelona, Spain Communication dans un congrès hal-02411920v1
Exploring the Feasibility of Selective Hardening for Combinational Logic Samuel Nascimento Pagliarini,Gutemberg Gonçalves dos Santos Jr,Lirida Naviner,Jean-François Naviner European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF), Oct 2012, Cagliari, Italy Communication dans un congrès hal-02288323v1
Selective Hardening Methodology Concerning Multiple Faults Samuel Nascimento Pagliarini,Lirida Naviner,Jean-François Naviner IEEE Nuclear and Space Radiation Effects Conference, Jul 2012, Miami, Florida, United States Communication dans un congrès hal-02411864v1
Fault tolerant architectures in nanoelectronics: The progressive approach Tian Ban,Lirida Naviner Southern Simposium of Microelectronics, Apr 2012, Sao Miguel das Missoes, RS, Brazil Communication dans un congrès hal-02286332v1
Towards the Mitigation of Multiple Faults Induced by Single Event Effects: Combining Global TMR and Selective Hardening Samuel Nascimento Pagliarini,Lirida Naviner,Jean-François Naviner European Conference on Radiation and Its Effects on Components and Systems (RADECS), Sep 2012, Biarritz, France Communication dans un congrès hal-02286459v1
Signal Probability, Reliability and Error Bound of Majority Voter in TMR Tian Ban,Lirida Naviner IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Aug 2012, Boise, Idaho, United States Communication dans un congrès hal-02286333v1
Reliability and Hardening of FPGA Implementations face to Radiative Constraints Gutemberg Gonçalves dos Santos Jr,Lirida Naviner,J. F. Naviner Journées Nationales Electronique et Rayonnements Naturels au Niveau du Sol (RADSOL), Jun 2012, Paris, France Communication dans un congrès hal-02288324v1
Analyzing and Alleviating the Impact of Errors on an SRAM-based FPGA Cluster Arwa Ben Dhia,Lirida Naviner,P. Matherat IEEE International On-Line Testing Symposium (IOLTS), Jun 2012, Sitges, Spain. pp.31-36 Communication dans un congrès hal-01062799v1
A New Fault-Tolerant Architecture for CLBs in SRAM-based FPGAs Arwa Ben Dhia,Lirida Naviner,P. Matherat IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2012, Sevilla, Spain. pp.761-764 Communication dans un congrès hal-01062116v1
Selective Hardening Methodology for Combinational Logic Samuel Nascimento Pagliarini,Lirida Naviner,Jean-François Naviner IEEE Latin-American Test Workshop (LATW), Apr 2012, Quito, Ecuador. pp.6 Communication dans un congrès hal-00695808v1
Automatic Selective Hardening Against Soft Errors: a Cost-based and Regularity-aware Approach Samuel Nascimento Pagliarini,Arwa Ben Dhia,Lirida Naviner,J. F. Naviner IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2012, Sevilla, Spain. pp.753-756 Communication dans un congrès hal-01062119v1
Optimized Robust Digital Voter in TMR Designs Tian Ban,Lirida Naviner Proceedings of Colloque National GdR SoC-SiP, Jun 2011, Lyon, France Communication dans un congrès hal-00637642v1
Reliability analysis based on significance Lirida Naviner,Jean-Francois Naviner,Tian Ban,Gutemberg Goncalves dos Santos Junior Argentine School of Micro-Nanoelectronics Technology and Applications (EAMTA), Aug 2011, Buenos Aires, Argentina. http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6021291 Communication dans un congrès hal-00637373v1
An approach for efficient reliability improvement of digital circuits Gutemberg Goncalves dos Santos Junior,Elaine Crespo Marques,Lirida Naviner,Jean-Francois Naviner Colloque National GdR SoC-SiP, Jun 2011, Lyon, France Communication dans un congrès hal-00637375v1
Effective metrics for reliability analysis Elaine Crespo Marques,Gutemberg Goncalves dos Santos Junior,Lirida Naviner,Jean-Francois Naviner Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on, Aug 2010, Seattle, WA, United States. http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5548671&tag=1, ⟨10.1109/MWSCAS.2010.5548671⟩ Communication dans un congrès hal-00627132v1
A 65 nm CMOS versatile ADC using time interleaving and ΣΔ modulation for multi-mode receiver Ali Beydoun,Chadi Jabbour,Hussein Fakhoury,van Tam Nguyen,Lirida Navineret al. 2009 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA), Jun 2009, Toulouse, France. pp.1-4, ⟨10.1109/NEWCAS.2009.5290510⟩ Communication dans un congrès hal-03591883v1

Poster de conférence (2)

Opcode Analysis of Real Encryption-Based Microarchitectural Attacks Using gem5 Muhammad Awais,Mahreen Khan,Maria Mushtaq,Lirida Naviner,Jawad Haj Yahyaet al. 2025 Computing, Communications and IoT Applications (ComComAp), Dec 2025, Madrid, Spain. IEEE, pp.377-384, 2025, ⟨10.1109/ComComAp68359.2025.11353163⟩ Poster de conférence hal-05422102v1
Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using Gem5 Muhammad Awais,Maria Mushtaq,Lirida Naviner,Florent Bruguier,Jawad Hajet al. ACACES 2024 Poster Abstracts, Jul 2024, Fiuggi, Italy Poster de conférence hal-04709017v1

Proceedings/Recueil des communications (3)

Cryogenic In-MRAM Computing Yaoru Hou,We Ge,Yanan Guo,Lirida Naviner,You Wanget al. 2021 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), IEEE, pp.1-6, 2021, ⟨10.1109/NANOARCH53687.2021.9642238⟩ Proceedings/Recueil des communications hal-04420929v1
Compact thermal modeling of spin transfer torque magnetic tunnel junction You Wang,Hao Cai,Lirida Naviner,Yue Zhang,Jacques-Olivier Kleinet al. European Symposium on Reliability of Electron Devices, Failure Physics and Analysis 2015, Oct 2015, Toulouse, France. , 2015, ⟨10.1016/j.microrel.2015.06.029⟩ Proceedings/Recueil des communications istex hal-01216419v1
Compact model of magnetic tunnel junction with stochastic spin transfer torque switching for reliability analyses You Wang,Yue Zhang,Erya Deng,Jacques-Olivier Klein,Lirida Navineret al. European Symposium on Reliability of Electron Devices, Failure Physics and Analysis 2014, Sep 2014, Berlin, Germany. , 2014, ⟨10.1016/j.microrel.2014.07.019⟩ Proceedings/Recueil des communications istex hal-01216431v1

Chapitre d'ouvrage (3)

From DMO to D2D Xavier Pons Masbernart,Eric Georgeaux,Christophe Gruet,François Montaigne,Lirida Naviner Wireless Public Safety Networks: Overview and Challenges, ISTE Press & Elsivier, pp.9-126, 2015 Chapitre d'ouvrage hal-02287836v1
Reliability Aware AMS/RF Performance Optimization P. Maris Ferreira,Hao Cai,Lirida Naviner Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, IGI Global, 2014 Chapitre d'ouvrage hal-02286875v1
Reliability Aware AMS / RF Performance Optimization Pietro Maris Ferreira,Hao Cai,Lirida Naviner Mourad Fakhfakh, Esteban Tlelo-Cuautle, Maria Helena Fino. Performance Optimization Techniques in Analog, Mixed-Signal, and Radio-Frequency Circuit Design, 2014, ⟨10.4018/978-1-4666-6627-6.ch002⟩ Chapitre d'ouvrage hal-01222104v1

Brevet (3)

Procédé permettant d'établir une stratégie d'économie d'énergie de batterie de terminaux mobiles Christophe Gruet,Eric Georgeaux,Hugo Gromat,Xavier Pons Masbernart,Lirida Naviner France, N° de brevet: WO Patent App. PCT/EP2013/003,489. XP:Patent-14. 2014 Brevet hal-02412539v1
Procédé de Durcissement Logique par Partitionnement d'un Circuit Electronique Gutemberg Gonçalves dos Santos Jr,Lirida Naviner,Bastien Cousin,Gilles Deleuze,Laurent Crétinon France, N° de brevet: 1261439. GG:BREVET-12. 2012, pp.21 Brevet hal-02412523v1
Structure d'Atténuation de Bruit d'une Fonction Logique Combinatoire Kaikai Liu,Lirida Naviner,Jean-François Naviner France, N° de brevet: 1262053. KL:BREVET-12. 2012 Brevet hal-02412524v1