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Mathieu Faverge
Maître de conférences - Bordeaux INP, Enseirb-Matmeca
9
Documents
Affiliations actuelles
- 1124391
Identifiants chercheurs
- mfaverge
- IdRef : 140338217
- 0000-0002-2128-1230
Présentation
Je suis actuellement maître de conférence à l'ENSEIRB-MatMeca.
Je suis actuellement maître de conférence à l'ENSEIRB-MatMeca.
Publications
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On the design of parallel linear solvers for large scale problemsMini-Symposium on Recent advances in matrix computations for extreme-scale computers at ICIAM'15 conference, Aug 2015, Beijing, China
Communication dans un congrès
hal-01100987v1
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A task-based sparse direct solver suited for large scale hierarchical/heterogeneous architecturesSIAM Conference on Computational Science and Engineering (SIAM CSE 2015), Mar 2015, Salt Lake City, United States
Communication dans un congrès
hal-01100979v1
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Taking advantage of hybrid systems for sparse direct solvers via task-based runtimesHCW'2014 workshop of IPDPS, May 2014, Phoenix, United States. pp.29-38, ⟨10.1109/IPDPSW.2014.9⟩
Communication dans un congrès
hal-00987094v1
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Toward a supernodal sparse direct solver over DAG runtimesParallel Matrix Algorithms and Applications, Jun 2012, Londres, United Kingdom
Communication dans un congrès
hal-00769030v1
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A NUMA Aware Scheduler for a Parallel Sparse Direct SolverPMAA'08, 2008, Neuchâtel, Switzerland
Communication dans un congrès
inria-00344709v1
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Simul'Elec and PASTIX interface specifications[Rapport Technique] RT-0458, INRIA Bordeaux; AlgoTech; INRIA. 2015
Rapport
hal-01142204v1
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Taking advantage of hybrid systems for sparse direct solvers via task-based runtimes[Research Report] RR-8446, INRIA. 2014, pp.25
Rapport
hal-00925017v2
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Sparse direct solvers with accelerators over DAG runtimes[Research Report] RR-7972, INRIA. 2012, pp.11
Rapport
hal-00700066v2
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A NUMA Aware Scheduler for a Parallel Sparse Direct Solver[Research Report] RR-7498, INRIA. 2010, pp.22
Rapport
inria-00549827v1
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