Mathieu Faverge Maître de conférences - Bordeaux INP, Enseirb-Matmeca

Identifiants chercheurs

IdHAL :

mfaverge

ORCID :

0000-0002-2128-1230

IdRef :

140338217

Présentation

Je suis actuellement maître de conférence à l'ENSEIRB-MatMeca.

Publications

Article dans une revue (13)

Programming Heterogeneous Architectures Using Hierarchical Tasks Mathieu Faverge,Nathalie Furmento,Abdou Guermouche,Gwenolé Lucas,Raymond Namystet al. Concurrency and Computation: Practice and Experience, In press, 35 (25), ⟨10.1002/cpe.7811⟩ Article dans une revue hal-04088833v2
Efficient Parallel Solution of the 3D Stationary Boltzmann Transport Equation for Diffusive Problems Salli Moustafa,François Févotte,Mathieu Faverge,Laurent Plagne,Pierre Ramet Journal of Computational Physics, 2019, ⟨10.1016/j.jcp.2019.03.019⟩ Article dans une revue hal-02080624v1
Sparse supernodal solver using block low-rank compression: Design, performance and analysis Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman International Journal of Computational Science and Engineering, 2018, 27, pp.255 - 270. ⟨10.1016/J.JOCS.2018.06.007⟩ Article dans une revue hal-01824275v1
Evaluation of Dataflow Programming Models for Electronic Structure Theory Heike Jagode,Anthony Danalis,Reazul Hoque,Mathieu Faverge,Jack Dongarra Concurrency and Computation: Practice and Experience, In press, pp.23 Article dans une revue hal-01725804v1
Asynchronous Task-Based Polar Decomposition on Single Node Manycore Architectures Dalal Sukkari,Hatem Ltaief,Mathieu Faverge,David Keyes IEEE Transactions on Parallel and Distributed Systems, 2017, XX, ⟨10.1109/TPDS.2017.2755655⟩ Article dans une revue hal-01585079v1
Achieving High Performance on Supercomputers with a Sequential Task-based Programming Model Emmanuel Agullo,Olivier Aumage,Mathieu Faverge,Nathalie Furmento,Florent Pruvostet al. IEEE Transactions on Parallel and Distributed Systems, In press, ⟨10.1109/TPDS.2017.2766064⟩ Article dans une revue hal-01618526v1
Reordering Strategy for Blocking Optimization in Sparse Linear Solvers Grégoire Pichon,Mathieu Faverge,Pierre Ramet,Jean Roman SIAM Journal on Matrix Analysis and Applications, 2017, SIAM Journal on Matrix Analysis and Applications, 38 (1), pp.226 - 248. ⟨10.1137/16M1062454⟩ Article dans une revue hal-01485507v2
Mixing LU and QR factorization algorithms to design high-performance dense linear algebra solvers Mathieu Faverge,Julien Herrmann,Julien Langou,Bradley Lowery,Yves Robertet al. Journal of Parallel and Distributed Computing, 2015, IPDPS 2014 Selected Papers on Numerical and Combinatorial Algorithms, 85, pp.15. ⟨10.1016/j.jpdc.2015.06.007⟩ Article dans une revue hal-01107457v1
A Survey of Recent Developments in Parallel Implementations of Gaussian Elimination Simplice Donfack,Jack Dongarra,Mathieu Faverge,Mark Gates,Jakub Kurzaket al. Concurrency and Computation: Practice and Experience, 2014, 27 (5), pp.1292-1309. ⟨10.1002/cpe.3306⟩ Article dans une revue istex hal-00986948v1
Achieving Numerical Accuracy and High Performance using Recursive Tile LU Factorization Jack J. Dongarra,Mathieu Faverge,Hatem Ltaief,Piotr Luszczek Concurrency and Computation: Practice and Experience, 2013, 26 (6), pp.1408-1431. ⟨10.1002/cpe.3110⟩ Article dans une revue istex hal-00865472v1
PaRSEC: A programming paradigm exploiting heterogeneity for enhancing scalability George Bosilca,Aurélien Bouteiller,Anthony Danalis,Mathieu Faverge,Thomas Héraultet al. Computing in Science and Engineering, 2013, 15 (6), pp.36-45. ⟨10.1109/MCSE.2013.98⟩ Article dans une revue hal-00930217v1
Hierarchical QR factorization algorithms for multi-core clusters Jack Dongarra,Mathieu Faverge,Thomas Hérault,Mathias Jacquelin,Julien Langouet al. Parallel Computing, 2013, 39 (4-5), pp.212-232. ⟨10.1016/j.parco.2013.01.003⟩ Article dans une revue istex hal-00809770v1
LU Factorization with Partial Pivoting for a Multicore System with Accelerators Jakub Kurzak,Piotr Luszczek,Mathieu Faverge,Jack J. Dongarra IEEE Transactions on Parallel and Distributed Systems, 2012, 99 (PrePrints), pp.1. ⟨10.1109/TPDS.2012.242⟩ Article dans une revue hal-00809657v1

Communication dans un congrès (67)

Managing Explicit Communications Within a Sequential Task Flow Paradigm Brieuc Nicolas,Nathalie Furmento,Samuel Thibault,Mathieu Faverge,Abdou Guermoucheet al. WAMTA 2026 - Workshop on Asynchronous Many-Task Systems and Applications, Feb 2026, Garching bei München, Germany Communication dans un congrès hal-05538493v1
Algebraic hierarchical partitioning to improve H-matrix compression Dimitri Walther,Mathieu Faverge,Matthieu Lecouvez,Pierre Ramet PP 2026 - SIAM Conference on Parallel Processing for Scientific Computing, SIAM, Mar 2026, Berlin, Germany Communication dans un congrès hal-05411444v1
Batching the tasks of the LU factorization with partial pivoting on top of runtime systems Alycia Lisito,Mathieu Faverge,Matthieu Kuhn,Florent Pruvost,Pierre Ramet COMPAS 2025 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jun 2025, Bordeaux, France Communication dans un congrès hal-05148627v1
Improving energy efficiency of HPC applications using unbalanced GPU power capping Albert d'Aviau de Piolant,Hayfa Tayeb,Bérenger Bramas,Mathieu Faverge,Abdou Guermoucheet al. HCW (Ipdps workshop), Jun 2025, Milan (Italie), Italy Communication dans un congrès hal-04883872v2
Scalable and portable LU factorization with partial pivoting on top of runtime systems Alycia Lisito,Mathieu Faverge,Matthieu Kuhn,Florent Pruvost,Pierre Ramet IPDPS25 - 39th IEEE International Parallel and Distributed Processing Symposium, Jun 2025, Milan, Italy Communication dans un congrès hal-04984070v1
Contraction de tenseurs au-dessus de supports d'exécutions Application à la méthode Coupled-Cluster Brieuc Nicolas,Mathieu Faverge,Thomas Herault COMPAS 2025 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jun 2025, Bordeaux, France Communication dans un congrès hal-05137639v1
Comparative Study of Mixed-Precision and Low-Rank Compression Techniques in Sparse Direct Solvers Brieuc Nicolas,Mathieu Faverge,Pierre Ramet,Alycia Lisito,Mohamed Kherraz 2024 SIAM Conference on Applied Linear Algebra, Society for Industrial and Applied Mathematics, May 2024, Paris, France Communication dans un congrès hal-04585047v1
Enhancing sparse direct solver scalability through runtime system automatic data partition Alycia Lisito,Mathieu Faverge,Grégoire Pichon,Pierre Ramet WAMTA 2024 - Workshop on Asynchronous Many-Task Systems and Applications 2024, Feb 2024, Knoxville, United States. pp.105-110, ⟨10.1007/978-3-031-61763-8_10⟩ Communication dans un congrès hal-04527103v1
Dynamic Tasks Scheduling with Multiple Priorities on Heterogeneous Computing Systems Hayfa Tayeb,Bérenger Bramas,Mathieu Faverge,Abdou Guermouche HCW 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), May 2024, San franscisco, CA, United States. pp.31-40, ⟨10.1109/IPDPSW63119.2024.00014⟩ Communication dans un congrès hal-04498634v1
On the Arithmetic Intensity of Distributed-Memory Dense Matrix Multiplication Involving a Symmetric Input Matrix (SYMM) Emmanuel Agullo,Alfredo Buttari,Olivier Coulaud,Lionel Eyraud-Dubois,Mathieu Favergeet al. IPDPS 2023 - 37th International Parallel and Distributed Processing Symposium, IEEE, May 2023, St. Petersburg, FL, United States. pp.357-367 Communication dans un congrès hal-04093162v1
New parallel features in the sparse solver PaStiX Alycia Lisito,Mathieu Faverge,Pierre Ramet Sparse Days 2023, Jun 2023, Toulouse, France Communication dans un congrès hal-04589448v1
Programming Heterogeneous Architectures Using Hierarchical Tasks Mathieu Faverge,Nathalie Furmento,Abdou Guermouche,Gwenolé Lucas,Raymond Namystet al. HeteroPar 2022 - twentieth international workshop, Aug 2022, Glasgow, United Kingdom. pp.12, ⟨10.1007/978-3-031-31209-0_7⟩ Communication dans un congrès hal-03789625v1
Programmation des architectures hétérogènes à l'aide de tâches hiérarchiques Mathieu Faverge,Nathalie Furmento,Abdou Guermouche,Gwenolé Lucas,Samuel Thibaultet al. COMPAS 2022 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jul 2022, Amiens, France Communication dans un congrès hal-03773486v1
MulTreePrio: Scheduling task-based applications for heterogeneous computing systems Hayfa Tayeb,Bérenger Bramas,Abdou Guermouche,Mathieu Faverge COMPAS 2022 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jul 2022, Amiens, France Communication dans un congrès hal-03763824v1
Deciding Non-Compressible Blocks in Sparse Direct Solvers using Incomplete Factorization Esragul Korkmaz,Mathieu Faverge,Grégoire Pichon,Pierre Ramet HiPC 2021 - 28th IEEE International Conference on High Performance Computing, Data, and Analytics, Dec 2021, Bangalore, India. pp.1-10, ⟨10.1109/HiPC53243.2021.00024⟩ Communication dans un congrès hal-03361299v1
Tiled Algorithms for Efficient Task-Parallel H-Matrix Solvers Rocío Carratalá-Sáez,Mathieu Faverge,Grégoire Pichon,Guillaume Sylvand,Enrique S Quintana-Ortí PDSEC 2020 - 21st IEEE International Workshop on Parallel and Distributed Scientific and Engineering Computing, May 2020, News Orleans, United States. pp.1-10 Communication dans un congrès hal-02513433v1
Recent Developments Around the Block Low-Rank PaStiX Solver Grégoire Pichon,Mathieu Faverge,Pierre Ramet PP 2020 - SIAM Conference on Parallel Processing for Scientific Computing, Feb 2020, Seattle, United States Communication dans un congrès hal-03140189v1
Exploiting Generic Tiled Algorithms Toward Scalable H-Matrices Factorizations on Top of Runtime Systems Rocío Carratalá-Sáez,Mathieu Faverge,Grégoire Pichon,Enrique Salvador Quintana-Ortí,Guillaume Sylvand SIAM PP20 - SIAM Conference on Parallel Processing for Scientific Computing, Feb 2020, Seattle, United States Communication dans un congrès hal-03149953v1
Improving mapping for sparse direct solvers: A trade-off between data locality and load balancing Changjiang Gou,Ali Al Zoobi,Anne Benoit,Mathieu Faverge,Loris Marchalet al. EuroPar 2020 - 26th International European Conference on Parallel and Distributed Computing, Aug 2020, Warsaw / Virtual, Poland. pp.1-16 Communication dans un congrès hal-02973315v1
Leveraging Task-Based Polar Decomposition Using PARSEC on Massively Parallel Systems Dalal Sukkari,Hatem Ltaief,David Keyes,Mathieu Faverge IEEE Cluster 2019, Sep 2019, Albuquerque, United States Communication dans un congrès hal-02272946v1
Block Low-rank Algebraic Clustering for Sparse Direct Solvers Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman SIAM Conference on Computational Science and Engineering (CSE19), Feb 2019, Spokane, United States Communication dans un congrès hal-01956962v1
Rank Revealing QR Methods for Sparse Block Low Rank Solvers Esragul Korkmaz,Mathieu Faverge,Grégoire Pichon,Pierre Ramet Sparse Days 2019, Jul 2019, Toulouse, France Communication dans un congrès hal-02326070v1
Rank Revealing QR Methods for Sparse Block Low Rank Solvers Esragul Korkmaz,Mathieu Faverge,Grégoire Pichon,Pierre Ramet COMPAS 2019 - Conférence d'informatique en Parallélisme, Architecture et Système, Jun 2019, Anglet, France Communication dans un congrès hal-02326084v1
Exploiting Parameterized Task-graph in Sparse Direct Solvers Mathieu Faverge,Grégoire Pichon,Pierre Ramet SIAM Conference on Computational Science and Engineering (CSE19), Feb 2019, Spokane, United States Communication dans un congrès hal-01956963v1
Supernodes ordering to enhance Block Low-Rank compression in sparse direct solvers Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman PMAA 2018 - 10th International Workshop on Parallel Matrix Algorithms and Applications, Jun 2018, Zurich, Switzerland Communication dans un congrès hal-01956960v1
Utilisation de la compression Block Low-Rank pour accélérer un solveur direct creux supernodal Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman COMPAS 2018 - Conférence d'informatique en Parallélisme, Architecture et Système, Jul 2018, Toulouse, France Communication dans un congrès hal-01956959v1
Sparse Supernodal Solver exploiting Low-Rankness Property Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman Sparse Days 2017, Sep 2017, Toulouse, France Communication dans un congrès hal-01585622v1
Sparse Supernodal Solver Using Block Low-Rank Compression Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman 18th IEEE International Workshop on Parallel and Distributed Scientific and Engineering Computing (PDSEC 2017), Jun 2017, Orlando, United States Communication dans un congrès hal-01502215v1
Bidiagonalization and R-Bidiagonalization: Parallel Tiled Algorithms, Critical Paths and Distributed-Memory Implementation Mathieu Faverge,Julien Langou,Yves Robert,Jack Dongarra IPDPS'17 - 31st IEEE International Parallel and Distributed Processing Symposium , May 2017, Orlando, United States Communication dans un congrès hal-01484113v1
Sparse Supernodal Solver Using Hierarchical Compression over Runtime System Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman SIAM Conference on Computation Science and Engineering (CSE'17), Feb 2017, Atlanta, United States Communication dans un congrès hal-01421379v1
Impact of Blocking Strategies for Sparse Direct Solvers on Top of Generic Runtimes Grégoire Pichon,Mathieu Faverge,Pierre Ramet,Jean Roman SIAM Conference on Computation Science and Engineering (CSE'17), Feb 2017, Atlanta, United States Communication dans un congrès hal-01421384v1
Exploiting Modern Manycore Architecture in Sparse Direct Solver with Runtime Systems Grégoire Pichon,Mathieu Faverge,Pierre Ramet SIAM Conference on Computation Science and Engineering (CSE'17), Feb 2017, Atlanta, United States Communication dans un congrès hal-01421383v1
Exploiting Kepler architecture in sparse direct solver with runtime systems Mathieu Faverge,Grégoire Pichon,Pierre Ramet 9th International Workshop on Parallel Matrix Algorithms and Applications (PMAA'2016), Jul 2016, Bordeaux, France Communication dans un congrès hal-01421372v1
Exploiting H-Matrices in Sparse Direct Solvers Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman SIAM Conference on Parallel Processing for Scientific Computing (SIAM PP 2016), Apr 2016, Paris, France Communication dans un congrès hal-01251812v1
Impact of Blocking Strategies for Sparse Direct Solvers on Top of Generic Runtimes Grégoire Pichon,Mathieu Faverge,Pierre Ramet,Jean Roman SIAM Conference on Parallel Processing for Scientific Computing (SIAM PP 2016), Apr 2016, Paris, France Communication dans un congrès hal-01251808v1
Sparse Supernodal Solver Using Hierarchical Compression Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman Workshop on Fast Direct Solvers, Nov 2016, Purdue, United States Communication dans un congrès hal-01421368v1
On the use of low rank approximations for sparse direct solvers Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman SIAM Annual Meeting (AN'16), Jul 2016, Boston, United States Communication dans un congrès hal-01421376v1
A task-based sparse direct solver suited for large scale hierarchical/heterogeneous architectures Xavier Lacoste,Mathieu Faverge,Pierre Ramet SIAM Conference on Computational Science and Engineering (SIAM CSE 2015), Mar 2015, Salt Lake City, United States Communication dans un congrès hal-01100979v1
Blocking strategy optimizations for sparse direct linear solver on heterogeneous architectures Mathieu Faverge,Grégoire Pichon,Pierre Ramet,Jean Roman Sparse Days, Jun 2015, Saint Girons, France Communication dans un congrès hal-01187881v1
3D Cartesian Transport Sweep for Massively Parallel Architectures with PARSEC Salli Moustafa,Mathieu Faverge,Laurent Plagne,Pierre Ramet IEEE International Parallel & Distributed Processing Symposium (IPDPS 2015), May 2015, Hyderabad, India. pp.581-590, ⟨10.1109/IPDPS.2015.75⟩ Communication dans un congrès hal-01078362v1
Hierarchical DAG Scheduling for Hybrid Distributed Systems Wei Wu,Aurelien Bouteiller,George Bosilca,Mathieu Faverge,Jack Dongarra IEEE International Parallel & Distributed Processing Symposium (IPDPS 2015), May 2015, Hyderabad, India Communication dans un congrès hal-01078359v1
Divide and Conquer Symmetric Tridiagonal Eigensolver for Multicore Architectures Grégoire Pichon,Azzam Haidar,Mathieu Faverge,Jakub Kurzak IEEE International Parallel & Distributed Processing Symposium (IPDPS 2015), May 2015, Hyderabad, India Communication dans un congrès hal-01078356v3
On the use of H-Matrix Arithmetic in PaStiX: a Preliminary Study Mathieu Faverge,Grégoire Pichon,Pierre Ramet,Jean Roman Workshop on Fast Direct Solvers, Jun 2015, Toulouse, France Communication dans un congrès hal-01187882v1
On the design of parallel linear solvers for large scale problems Xavier Lacoste,Mathieu Faverge,Pierre Ramet Mini-Symposium on Recent advances in matrix computations for extreme-scale computers at ICIAM'15 conference, Aug 2015, Beijing, China Communication dans un congrès hal-01100987v1
Parallel 3D Sweep Kernel with PARSEC Salli Moustafa,Mathieu Faverge,Laurent Plagne,Pierre Ramet HPCC Workshop on HPC-CFD in Energy/Transport Domains, Aug 2014, Paris, France Communication dans un congrès hal-01078364v1
Overview of Distributed Linear Algebra on Hybrid Nodes over the StarPU Runtime Emmanuel Agullo,Olivier Aumage,Mathieu Faverge,Nathalie Furmento,Florent Pruvostet al. SIAM Conference on Parallel Processing for Scientific Computing (SIAM PP 2014), Feb 2014, Portland, Oregon, United States Communication dans un congrès hal-00978602v1
Taking advantage of hybrid systems for sparse direct solvers via task-based runtimes Xavier Lacoste,Mathieu Faverge,Pierre Ramet,Samuel Thibault,George Bosilca HCW'2014 workshop of IPDPS, May 2014, Phoenix, United States. pp.29-38, ⟨10.1109/IPDPSW.2014.9⟩ Communication dans un congrès hal-00987094v1
Toward parallel scalable linear solvers suited for large scale hierarchical parallel platforms Emmanuel Agullo,Mathieu Faverge,Luc Giraud,Abdou Guermouche,Pierre Rametet al. World Congress on Computational Mechanics, Jul 2014, Barcelona, Spain Communication dans un congrès hal-00987110v1
Harnessing clusters of hybrid nodes with a sequential task-based programming model Emmanuel Agullo,Olivier Aumage,Mathieu Faverge,Nathalie Furmento,Florent Pruvostet al. International Workshop on Parallel Matrix Algorithms and Applications (PMAA 2014), Jul 2014, Lugano, Switzerland Communication dans un congrès hal-01283949v1
Designing LU-QR hybrid solvers for performance and stability Mathieu Faverge,Julien Herrmann,Julien Langou,Bradley Lowery,Yves Robertet al. IEEE International Parallel & Distributed Processing Symposium (IPDPS 2014), May 2014, Phoenix, United States Communication dans un congrès hal-00930238v1
Implementing a systolic algorithm for QR factorization on multicore clusters with PaRSEC Guillaume Aupy,Mathieu Faverge,Yves Robert,Jakub Kurzak,Piotr Luszczeket al. PROPER 2013 - 6th Workshop on Productivity and Performance, Aug 2013, Aachen, Germany Communication dans un congrès hal-00844492v1
Linear Algebra Libraries with DAG Runtimes on GPUs George Bosilca,Aurélien Bouteiller,Mathieu Faverge,Thomas Hérault SIAM Conference on Computational Science and Engineering (SIAM CSE 2013), Feb 2013, Boston, United States Communication dans un congrès hal-00934573v1
Fine Grain Scheduling for Sparse Solver on Manycore Architectures Mathieu Faverge,Pierre Ramet SIAM Conference on Parallel Processing for Scientific Computing (SIAM PP 2012), Feb 2012, Savannah, United States Communication dans un congrès hal-00769026v1
Hierarchical QR factorization algorithms for multi-core cluster systems Jack Dongarra,Mathieu Faverge,Thomas Herault,Julien Langou,Yves Robert IPDPS'2012, the 26th IEEE International Parallel and Distributed Processing Symposium, May 2012, Shanghai, China. ⟨10.1109/IPDPS.2012.62⟩ Communication dans un congrès hal-00764022v1
Toward a supernodal sparse direct solver over DAG runtimes George Bosilca,Mathieu Faverge,Xavier Lacoste,Ichitaro Yamazaki,Pierre Ramet Parallel Matrix Algorithms and Applications, Jun 2012, Londres, United Kingdom Communication dans un congrès hal-00769030v1
LU Factorization with Partial Pivoting for a Multi-CPU, Multi-GPU Shared Memory System Jakub Kurzak,P. Luszczek,Mathieu Faverge,Jack J. Dongarra VECPAR 2012 - 10th International Meeting on High-Performance Computing for Computational Science, Jul 2012, Kobe, Japan Communication dans un congrès hal-00809654v1
Exploiting Fine-Grain Parallelism in Recursive LU Factorization Jack J. Dongarra,Mathieu Faverge,Hatem Ltaief,Piotr Luszczek Proceedings of ParCo 2011, Aug 2011, Ghent, Belgium Communication dans un congrès hal-00809755v1
Distibuted Dense Numerical Linear Algebra Algorithms on massively parallel architectures: DPLASMA George Bosilca,Aurélien Bouteiller,Anthony Danalis,Mathieu Faverge,Azzam Haidaret al. Proceedings of the 25th IEEE International Symposium on Parallel \& Distributed Processing Workshops and Phd Forum (IPDPSW'11), PDSEC 2011, May 2011, Anchorage, United States. pp.1432--1441 Communication dans un congrès hal-00809680v1
High Performance Matrix Inversion Based on LU Factorization for Multicore Architectures Jack J. Dongarra,Mathieu Faverge,Hatem Ltaief,Piotr Luszczek Proceedings of MTAGS11, Nov 2011, Seattle, United States Communication dans un congrès hal-00809750v1
An open source tool chain for performance analysis Kevin Coulomb,Augustin Degomme,Mathieu Faverge,François Trahay 5th Parallel Tools Workshop, Sep 2011, Dresden, Germany Communication dans un congrès hal-00707236v1
QR Factorization on a Multicore Node Enhanced with Multiple GPU Accelerators Emmanuel Agullo,Cédric Augonnet,Jack Dongarra,Mathieu Faverge,Hatem Ltaiefet al. 25th IEEE International Parallel & Distributed Processing Symposium, May 2011, Anchorage, United States. ⟨10.1109/IPDPS.2011.90⟩ Communication dans un congrès inria-00547614v1
EZTrace: a generic framework for performance analysis François Trahay,François Rue,Mathieu Faverge,Yutaka Ishikawa,Raymond Namystet al. IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid), May 2011, Newport Beach, CA, United States Communication dans un congrès inria-00587216v1
LU Factorization for Accelerator-based Systems Emmanuel Agullo,Cédric Augonnet,Jack Dongarra,Mathieu Faverge,Julien Langouet al. 9th ACS/IEEE International Conference on Computer Systems and Applications (AICCSA 11), Jun 2011, Sharm El-Sheikh, Egypt Communication dans un congrès hal-00654193v1
Vers un solveur de systèmes linéaires creux adapté aux machines NUMA Mathieu Faverge RenPar'19, Sep 2009, Toulouse, France Communication dans un congrès inria-00416496v1
Dynamic Scheduling for sparse direct Solver on NUMA architectures Mathieu Faverge,Pierre Ramet PARA'08, May 2008, Trondheim, Norway Communication dans un congrès inria-00344026v1
A NUMA Aware Scheduler for a Parallel Sparse Direct Solver Mathieu Faverge,Xavier Lacoste,Pierre Ramet PMAA'08, 2008, Neuchâtel, Switzerland Communication dans un congrès inria-00344709v1
A NUMA Aware Scheduler for a Parallel Sparse Direct Solver Mathieu Faverge,Pierre Ramet Workshop on Massively Multiprocessor and Multicore Computers, INRIA, Feb 2009, Rocquencourt, France. 5p Communication dans un congrès inria-00416502v1

Poster de conférence (2)

Partitionnement hiérarchique pour la simulation électromagnétique d'objets 3D complexes Dimitri Walther,Mathieu Faverge,Matthieu Lecouvez,Pierre Ramet COMPAS 2025 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jun 2025, Bordeaux, France. Poster de conférence cea-05132586v1
Scalable and Portable LU Factorization with Partial Pivoting on top of Runtime Systems Alycia Lisito,Mathieu Faverge,David Goudin,Matthieu Kuhn,Pierre Ramet JCAD 2024 - journée calculs et données, Nov 2024, Bordeaux, France Poster de conférence hal-04867213v1

Document associé à des manifestations scientifiques (3)

Sparse supernodal solver using block low-rank compression: Design, performance and analysis Grégoire Pichon,Eric Darve,Mathieu Faverge,Esragul Korkmaz,Pierre Rametet al. JOREK development meeting, Nov 2019, Cadarache, France Document associé à des manifestations scientifiques hal-02326407v1
Utilisation de la compression low-rank pour réduire la complexité du solveur PaStiX Grégoire Pichon,Mathieu Faverge,Pierre Ramet,Jean Roman JCAD 2018 - Journées Calcul et Données, Oct 2018, Lyon, France Document associé à des manifestations scientifiques hal-01956928v1
Sparse supernodal solver with low-rank compression for solving the frequency-domain Maxwell equations discretized by a high order HDG method Grégoire Pichon,Eric Darve,Mathieu Faverge,Stéphane Lanteri,Pierre Rametet al. Journées jeunes chercheur-e-s - Résolution de problèmes d’ondes harmoniques de grande taille, Nov 2017, PARIS, France. pp.1-55, 2017 Document associé à des manifestations scientifiques hal-01660653v1

Chapitre d'ouvrage (1)

Multithreading in the PLASMA Library Jakub Kurzak,Piotr Luszczek,Asym Yarkhan,Mathieu Faverge,Julien Langouet al. Mohamed Ahmed, Reda A. Ammar, Sanguthevar Rajasekaran. "Handbook of Multi and Many-Core Processing: Architecture, Algorithms, Programming, and Applications, Chapman and Hall/CRC, 2014 Chapitre d'ouvrage hal-00809774v1

Rapport (23)

Programming Heterogeneous Architectures Using Hierarchical Tasks Mathieu Faverge,Nathalie Furmento,Abdou Guermouche,Gwenolé Lucas,Raymond Namystet al. [Research Report] RR-9466, Inria Bordeaux Sud-Ouest. 2022, pp.21 Rapport (rapport de recherche) hal-03609275v2
Reaching the Quality of SVD for Low-Rank Compression Through QR Variants Esragul Korkmaz,Mathieu Faverge,Grégoire Pichon,Pierre Ramet [Research Report] RR-9476, Inria Bordeaux - Sud Ouest. 2022, pp.43 Rapport (rapport de recherche) hal-03718312v4
Task-based randomized singular value decomposition and multidimensional scaling Emmanuel Agullo,Olivier Coulaud,Alexandre Denis,Mathieu Faverge,Alain Francet al. [Research Report] RR-9482, Inria Bordeaux - Sud Ouest; Inrae - BioGeCo. 2022, pp.37 Rapport hal-03773985v2
Deciding Non-Compressible Blocks in Sparse Direct Solvers using Incomplete Factorization Esragul Korkmaz,Mathieu Faverge,Grégoire Pichon,Pierre Ramet [Research Report] RR-9396, Inria Bordeaux - Sud Ouest. 2021, pp.16 Rapport (rapport de recherche) hal-03152932v2
Tiled Algorithms for Efficient Task-Parallel H-Matrix Solvers Rocío Carratalá-Sáez,Mathieu Faverge,Grégoire Pichon,Guillaume Sylvand,Enrique S Quintana-Ortí [Research Report] RR-9327, Inria. 2020 Rapport (rapport de recherche) hal-02489269v1
Improving mapping for sparse direct solvers: A trade-off between data locality and load balancing Changjiang Gou,Ali Al Zoobi,Anne Benoit,Mathieu Faverge,Loris Marchalet al. [Research Report] RR-9328, Inria Rhône-Alpes. 2020, pp.21 Rapport (rapport de recherche) hal-02491495v1
Supernodes ordering to enhance Block Low-Rank compression in sparse direct solvers Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman [Research Report] RR-9238, Inria Bordeaux Sud-Ouest. 2018, pp.1-31 Rapport (rapport de recherche) hal-01961675v1
Sparse Supernodal Solver Using Block Low-Rank Compression: design, performance and analysis Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman [Research Report] RR-9130, Inria Bordeaux Sud-Ouest. 2017, pp.1-32 Rapport (rapport de recherche) hal-01660665v1
Sparse Supernodal Solver Using Block Low-Rank Compression Grégoire Pichon,Eric Darve,Mathieu Faverge,Pierre Ramet,Jean Roman [Research Report] RR-9022, Inria Bordeaux Sud-Ouest. 2017, pp.24 Rapport (rapport de recherche) hal-01450732v3
Efficient Parallel Solution of the 3D Stationary Boltzmann Transport Equation for Diffusive Problems Salli Moustafa,François Févotte,Mathieu Faverge,Laurent Plagne,Pierre Ramet [Research Report] RR-9116, Inria; EDF Lab. 2017, pp.22 Rapport (rapport de recherche) hal-01630208v2
Bidiagonalization with Parallel Tiled Algorithms Mathieu Faverge,Julien Langou,Yves Robert,Jack Dongarra [Research Report] RR-8969, INRIA. 2016 Rapport (rapport de recherche) hal-01389232v2
Asynchronous Task-Based Polar Decomposition on Manycore Architectures Dalal Sukkari,Hatem Ltaief,Mathieu Faverge,David Keyes [Research Report] KAUST. 2016 Rapport (rapport de recherche) hal-01387575v1
Reordering strategy for blocking optimization in sparse linear solvers Grégoire Pichon,Mathieu Faverge,Pierre Ramet,Jean Roman [Research Report] RR-8860, Inria Bordeaux Sud-Ouest; LaBRI - Laboratoire Bordelais de Recherche en Informatique; Bordeaux INP; Université de Bordeaux. 2016, pp.26 Rapport (rapport de recherche) hal-01276746v2
Achieving High Performance on Supercomputers with a Sequential Task-based Programming Model Emmanuel Agullo,Olivier Aumage,Mathieu Faverge,Nathalie Furmento,Florent Pruvostet al. [Research Report] RR-8927, Inria Bordeaux Sud-Ouest; Bordeaux INP; CNRS; Université de Bordeaux; CEA. 2016, pp.27 Rapport (rapport de recherche) hal-01332774v1
Simul'Elec and PASTIX interface specifications Maher Alaya,Mathieu Faverge,Xavier Lacoste,Alexandre Péré-Laperne,Jacques Péré-Laperneet al. [Rapport Technique] RT-0458, INRIA Bordeaux; AlgoTech; INRIA. 2015 Rapport (rapport technique) hal-01142204v1
Taking advantage of hybrid systems for sparse direct solvers via task-based runtimes Xavier Lacoste,Mathieu Faverge,Pierre Ramet,Samuel Thibault,George Bosilca [Research Report] RR-8446, INRIA. 2014, pp.25 Rapport (rapport de recherche) hal-00925017v2
Implementing a Systolic Algorithm for QR Factorization on Multicore Clusters with PaRSEC Guillaume Aupy,Mathieu Faverge,Yves Robert,Jakub Kurzak,Piotr Luszczeket al. [Research Report] RR-8390, INRIA. 2013, pp.16 Rapport (rapport de recherche) hal-00879248v1
On Algorithmic Variants of Parallel Gaussian Elimination: Comparison of Implementations in Terms of Performance and Numerical Properties Simplice Donfack,Jack Dongarra,Mathieu Faverge,Mark Gates,Jakub Kurzaket al. [Research Report] 2013 Rapport (rapport de recherche) hal-00867837v1
Sparse direct solvers with accelerators over DAG runtimes Xavier Lacoste,Pierre Ramet,Mathieu Faverge,Yamazaki Ichitaro,Jack Dongarra [Research Report] RR-7972, INRIA. 2012, pp.11 Rapport (rapport de recherche) hal-00700066v2
Towards a Parallel Tile LDL Factorization for Multicore Architectures Dulceneia Becker,Mathieu Faverge,Jack J. Dongarra [Research Report] 2011 Rapport (rapport de recherche) hal-00809663v1
Achieving Numerical Accuracy and High Performance using Recursive Tile LU Factorization Jack J. Dongarra,Mathieu Faverge,Hatem Ltaief,Piotr Luszczek [Research Report] 2011 Rapport (rapport de recherche) hal-00809765v1
Distibuted Dense Numerical Linear Algebra Algorithms on Massively Parallel Architectures: DPLASMA George Bosilca,Aurélien Bouteiller,Anthony Danalis,Mathieu Faverge,Azzam Haidaret al. [Research Report] 2010 Rapport (rapport de recherche) hal-00809712v1
A NUMA Aware Scheduler for a Parallel Sparse Direct Solver Mathieu Faverge,Xavier Lacoste,Pierre Ramet [Research Report] RR-7498, INRIA. 2010, pp.22 Rapport (rapport de recherche) inria-00549827v1

Thèse (1)

Ordonnancement hybride statique-dynamique en algèbre linéaire creuse pour de grands clusters de machines NUMA et multi-cœurs Mathieu Faverge Modélisation et simulation. Université Sciences et Technologies - Bordeaux I, 2009. Français. ⟨NNT : ⟩ Thèse tel-00453997v1