Pierre Boulet Pierre Boulet, professeur d'informatique à l'Université de Lille

Identifiants chercheurs

IdHAL :

pboulet

ORCID :

0000-0002-0373-4478

IdRef :

069782644

ResearcherID :

http://www.researcherid.com/rid/K-7600-2015

Publications

Article dans une revue (34)

Rethinking Adversarial Attacks on Neuromorphic Models Soukaina Aji,Pierre Boulet,Ihsen Alouani,Mohammed Bouassida Neuromorphic Computing and Engineering, In press Article dans une revue hal-05410229v1
ModNEF : An Open Source Modular Neuromorphic Emulator for FPGA for Low-Power In-Edge Artificial Intelligence Aurélie Saulquin,Mazdak Fatahi,Pierre Boulet,Samy Meftali ACM Transactions on Architecture and Code Optimization, 2025, ⟨10.1145/3730581⟩ Article dans une revue hal-05033844v1
Event-driven nearshore and shoreline coastline detection on SpiNNaker neuromorphic hardware Mazdak Fatahi,Pierre Boulet,Giulia D’angelo Neuromorphic Computing and Engineering, 2024, 4 (3), pp.034012. ⟨10.1088/2634-4386/ad76d5⟩ Article dans une revue hal-04699880v1
Morphometrics and machine learning discrimination of the middle Eocene radiolarian species Podocyrtis chalara, Podocyrtis goetheana and their morphological intermediates Francisco Pinto,Veronica Carlsson,Mathias Meunier,Bert Van Bocxlaer,Hammouda Elbezet al. Marine Micropaleontology, In press, pp.102293. ⟨10.1016/j.marmicro.2023.102293⟩ Article dans une revue hal-04215322v1
Convolutional neural network application on a new middle Eocene radiolarian dataset Veronica Carlsson,Taniel Danelian,Martin Tetard,Mathias Meunier,Pierre Bouletet al. Marine Micropaleontology, 2023, 183, pp.102268. ⟨10.1016/j.marmicro.2023.102268⟩ Article dans une revue hal-04207164v1
Progressive Compression and Weight Reinforcement for Spiking Neural Networks Hammouda Elbez,Kamel Benhaoua,Philippe Devienne,Pierre Boulet Concurrency and Computation: Practice and Experience, 2022, ⟨10.1002/cpe.6891⟩ Article dans une revue hal-02737057v1
Artificial intelligence applied to the classification of eight middle Eocene species of the genus Podocyrtis (polycystine radiolaria) Veronica Carlsson,Taniel Danelian,Pierre Boulet,Philippe Devienne,Aurelien Laforgeet al. Journal of Micropalaeontology, 2022, 41 (2), pp.165-182. ⟨10.5194/jm-41-165-2022⟩ Article dans une revue hal-03962996v1
Tour de France&quot; data for the improvement of energy consumption in devices powered by limited energy sources Khalil Ibrahim Hamzaoui,Soufiane Dahmani,Pierre Boulet Data in Brief, 2020, 33, pp.106334. ⟨10.1016/j.dib.2020.106334⟩ Article dans une revue hal-02558636v2
The Parallel Multi-Mode Digraph Task Model for Energy-Aware Real-Time Heterogeneous Multi-Core Systems Houssam-Eddine Zahaf,Giuseppe Lipari,Marko Bertogna,Pierre Boulet IEEE Transactions on Computers, 2019, 68 (10), pp.1511-1524. ⟨10.1109/TC.2019.2909886⟩ Article dans une revue hal-02407176v1
Measurement-based Methodology for Modeling the Energy Consumption of Mobile Devices Khalil Ibrahim Hamzaoui,Mohammed Berrajaa,Mostafa Azizi,Giuseppe Lipari,Pierre Boulet International Journal of Reasoning-based Intelligent Systems, In press Article dans une revue hal-02243352v1
Unsupervised visual feature learning with spike-timing-dependent plasticity: How far are we from traditional feature learning approaches? Pierre Falez,Pierre Tirilly,Ioan Marius Bilasco,Philippe Devienne,Pierre Boulet Pattern Recognition, 2019, 93, pp.418-429. ⟨10.1016/j.patcog.2019.04.016⟩ Article dans une revue hal-02146284v1
Rate-coded DBN: An online strategy for spike-based deep belief networks Mazdak Fatahi,Mahyar Shahsavari,Mahmood Ahmadi,Arash Ahmadi,Pierre Bouletet al. Biologically Inspired Cognitive Architectures, 2018, 24, pp.59 - 69. ⟨10.1016/j.bica.2018.04.009⟩ Article dans une revue hal-01808815v1
Parameter Exploration to Improve Performance of Memristor-Based Neuromorphic Architectures Mahyar Shahsavari,Pierre Boulet IEEE Transactions on Multi-Scale Computing Systems, 2017, Oct.-Dec. 1 2018, 4 (4), ⟨10.1109/TMSCS.2017.2761231⟩ Article dans une revue hal-01615032v1
DynMapNoCSIM : A Dynamic Mapping SIMULATOR for Network on Chip based MPSoC Mohammed Kamel Benhaoua,Amitkumar Singh,Abou El Hassan Benyamina,Pierre Boulet Journal of Digital Information Management, 2015, 13 (1), pp.45--54 Article dans une revue hal-01198992v1
Unconventional digital computing approach: memristive nanodevice platform Mahyar Shahsavari,M Faisal Nadeem,S Arash Ostadzadeh,Philippe Devienne,Pierre Boulet Physica Status Solidi C: Current Topics in Solid State Physics, 2015, Issue physica status solidi (c) physica status solidi (c) Special Issue: E-MRS 2014 Spring Meeting – Symposium E • E-MRS 2014 Spring Meeting – Symposium F • E-MRS 2014 Spring Meeting – Symposium S, 12 (1-2), pp.222 - 228. ⟨10.1002/pssc.201400069⟩ Article dans une revue istex hal-01116577v1
Progressive and explicit refinement of scheduling for multidimensional data-flow applications using UML MARTE Calin Glitia,Julien Deantoni,Frédéric Mallet,Jean-Vivien Millo,Pierre Bouletet al. Design Automation for Embedded Systems, 2015, 19 (1-2), pp.1-33. ⟨10.1007/s10617-014-9140-y⟩ Article dans une revue lirmm-01912854v1
Heuristic for Accelerating Run-Time Task Mapping in NoC-based Heterogeneous MPSoCs Mohammed Kamel Benhaoua,Amit Kumar Singh,Abou El Hassan Benyamin,Akash Kumar,Pierre Boulet Journal of Digital Information Management, 2014, 12 (5), pp.298--308 Article dans une revue hal-01198994v1
Heuristics for Routing and Spiral Run-time Task Mapping in NoC-based Heterogeneous MPSOCs Abbou El Hassen Benyamina,Mohammed Kamel Benhaoua,Pierre Boulet International Journal of Computer Science Issues, 2013, 10 (4), pp.233--238 Article dans une revue hal-01198995v1
System level modeling methodology of NoC design from UML-MARTE to VHDL Majdi Elhaji,Pierre Boulet,Abdelkrim Zitouni,Samy Meftali,Jean-Luc Dekeyseret al. Design Automation for Embedded Systems, 2012, pp.1--27. ⟨10.1007/s10617-012-9101-2⟩ Article dans une revue hal-00797601v1
Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: advantages, limitations and alternatives Imran Rafiq Quadri,Abdoulaye Gamatié,Pierre Boulet,Samy Meftali,Jean-Luc Dekeyser Journal of Systems Architecture, 2012, ⟨10.1016/j.sysarc.2012.01.001⟩ Article dans une revue istex hal-00666014v1
Progressive and explicit refinement of scheduling for multidimensional data-flow applications using uml marte Calin Glitia,Julien Deantoni,Frédéric Mallet,Jean-Vivien Millo,Pierre Bouletet al. Design Automation for Embedded Systems, 2012, 16 (2), pp.137-169. ⟨10.1007/s10617-012-9093-y⟩ Article dans une revue istex hal-00727239v1
Modélisation et analyse de systèmes embarqués ou temps-réel avec le profil UML MARTE Pierre Boulet Techniques de l'Ingénieur, 2011, IN120 Article dans une revue inria-00587386v1
Repetitive model refactoring strategy for the design space exploration of intensive signal processing applications Calin Glitia,Pierre Boulet,Eric Lenormand,Michel Barreteau Journal of Systems Architecture, 2011, 57 (9), pp.815-829. ⟨10.1016/j.sysarc.2010.12.002⟩ Article dans une revue inria-00605069v1
Model-Driven Engineering and Formal Validation of High-Performance Embedded Systems Abdoulaye Gamatié,Eric Rutten,Huafeng Yu,Pierre Boulet,Jean-Luc Dekeyser Scalable Computing : Practice and Experience, 2009, 10 (2) Article dans une revue inria-00565260v1
Array-OL with delays, a domain specific specification language for multidimensional intensive signal processing Calin Glitia,Philippe Dumont,Pierre Boulet Multidimensional Systems and Signal Processing, 2009, 21 (2), pp.105--131. ⟨10.1007/s11045-009-0085-4⟩ Article dans une revue istex inria-00522751v1
Synchronous Modeling and Analysis of Data Intensive Applications Abdoulaye Gamatié,Eric Rutten,Huafeng Yu,Pierre Boulet,Jean-Luc Dekeyser EURASIP Journal on Embedded Systems, 2008, 2008 (1), pp.561863. ⟨10.1155/2008/561863⟩ Article dans une revue hal-00784459v1
Multi-objective Mapping for NoC Architecture Abou El Hassan Benyamina,Pierre Boulet Journal of Digital Information Management, 2007, 5 (6), pp.378--384 Article dans une revue inria-00565156v1
Towards Distributed Process Networks with CORBA Abdelkader Amar,Pierre Boulet,Jean-Luc Dekeyser Parallel and Distributed Computing Practices, 2002, 5 (4) Article dans une revue inria-00565180v1
SPPoC: manipulation automatique de polyèdres pour la compilation Pierre Boulet,Xavier Redon Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, 2001, 20 (8), pp.1019-1048 Article dans une revue inria-00565187v1
Static Tiling for Heterogeneous Computing Platforms Pierre Boulet,Jack J. Dongarra,Yves Robert,Frédéric Vivien Parallel Computing, 1999, 25 (5), pp.547-568 Article dans une revue inria-00565004v1
Algorithmic Issues on Heterogeneous Computing Platforms Pierre Boulet,Jack J. Dongarra,Fabrice Rastello,Yves Robert,Frédéric Vivien Parallel Processing Letters, 1999, 9 (2), pp.197-213 Article dans une revue inria-00565003v1
Loop parallelization algorithms: From parallelism extraction to code generation Pierre Boulet,Alain Darte,Georges-André Silber,Frédéric Vivien Parallel Computing, 1998, 24 (3-4), pp.421--444 Article dans une revue inria-00565000v1
Evaluating array expressions on massively parallel machines with communication/computation overlap Vincent Bouchitté,Pierre Boulet,Alain Darte,Yves Robert International Journal of Supercomputer Applications and High Performance Computing, 1995, 9 (3), pp.205-219 Article dans une revue inria-00564991v1
(Pen)-ultimate tiling? Pierre Boulet,Alain Darte,Tanguy Risset,Yves Robert Integration, the VLSI Journal, 1994, 17, pp.33-51 Article dans une revue inria-00564996v1

Communication dans un congrès (71)

Asynchronous Multi-fidelity Hyperparameter Optimization Of Spiking Neural Networks Thomas Firmin,Pierre Boulet,El-Ghazali Talbi International Conference on Neuromorphic Systems (ICONS 2024), Jul 2024, Washington, United States Communication dans un congrès hal-04781629v1
[Invited] Ultra low power Cochlea for biodiversity monitoring Francois Danneville,Larach Hicham,Pierre Boulet,Philippe Devienne,Hervé Glotinet al. Colloque BIOCOMP 2023, Nov 2023, Banyuls - sur - Mer, France Communication dans un congrès hal-04463709v2
How to Integrate Environmental Challenges in Computing Curricula? Anne-Laure Ligozat,Kevin Marquet,Aurélie Bugeau,Julien Lefèvre,Pierre Bouletet al. SIGCSE 2022: The 53rd ACM Technical Symposium on Computer Science Education, Mar 2022, Providence, United States. pp.899-905, ⟨10.1145/3478431.3499280⟩ Communication dans un congrès hal-03606210v1
Artificial Intelligence and Micropaleontology: a case study from the Eocene genus Podocyrtis Veronica Carlsson,Taniel Danelian,Pierre Boulet,Philippe Devienne,Hammouda Elbezet al. 27e édition de la Réunion des Sciences de la Terre, SGF, CNRS, Laboratoire de Géologie de Lyon ou l’étude de la Terre, des planètes et de l’environnement, Nov 2021, Lyon, France Communication dans un congrès hal-03587759v1
VS2N : Interactive Dynamic Visualization and Analysis Tool for Spiking Neural Networks Hammouda Elbez,Mohammed Kamel Benhaoua,Philippe Devienne,Pierre Boulet Content-Based Multimedia Indexing, Jun 2021, Lille, France Communication dans un congrès hal-03267042v1
Multi-layered Spiking Neural Network with Target Timestamp Threshold Adaptation and STDP Pierre Falez,Pierre Tirilly,Ioan Marius Bilasco,Philippe Devienne,Pierre Boulet International Joint Conference on Neural Networks (IJCNN), Jul 2019, Budapest, Hungary Communication dans un congrès hal-02146289v1
Mastering the Output Frequency in Spiking Neural Networks Pierre Falez,Pierre Tirilly,Ioan Marius Bilasco,Philippe Devienne,Pierre Boulet International Joint Conference on Neural Networks (IJCNN), Jul 2018, Rio de Janeiro, Brazil Communication dans un congrès hal-01741500v1
Visualization Techniques in SNN Simulators Hammouda Elbez,Kamel Benhaoua,Philippe Devienne,Pierre Boulet 3rd International Conference on Multimedia Information Processing, CITIM’2018, Oct 2018, Mascara, Algeria Communication dans un congrès hal-02887481v1
Impact of Increasing Number of Neurons on Performance of Neuromorphic Architecture Mahyar Shahsavari,Pierre Boulet,Asadollah Shahbahrami,Said Hamdioui CADS 2017 - 19th CSI International Symposium on Computer Architecture & Digital Systems, Dec 2017, Kish, Iran Communication dans un congrès hal-01633418v1
An Experimental Methodology for Modeling the Energy Consumption of Mobile Devices Khalil Ibrahim Hamzaoui,Mohammed Berrajaa,Mostafa Azizi,Giuseppe Lipari,Pierre Boulet First international conference on Embedded & Distributed Systems, EDiS’2017, Dec 2017, Oran, Algeria Communication dans un congrès hal-01723503v1
Flexible Simulation for Neuromorphic Circuit Design: Motion Detection Case Study Pierre Falez,Philippe Devienne,Pierre Tirilly,Marius Bilasco,Christophe Loyezet al. Conférence d’informatique en Parallélisme, Architecture et Système (ComPAS), Jun 2017, Nice Sophia Antipolis, France Communication dans un congrès hal-01538449v1
Combining a Volatile and Nonvolatile Memristor in Artificial Synapse to Improve Learning in Spiking Neural Networks Mahyar Shahsavari,Pierre Falez,Pierre Boulet NANOARCH 2016 - 12th ACM/IEEE International Symposium on Nanoscale Architectures, Jul 2016, Beijing, China. ⟨10.1145/2950067.2950090⟩ Communication dans un congrès hal-01368954v1
Modeling Parallel Real-time Tasks with Di-Graphs Houssam Eddine Zahaf,Abou El Hassan Benyamina,Richard Olejnik,Giuseppe Lipari,Pierre Boulet RTNS '16 - Proceedings of the 24th International Conference on Real-Time Networks and Systems , Oct 2016, Brest, France. pp.349-358, ⟨10.1145/2997465.2997475⟩ Communication dans un congrès hal-01393159v1
MID: A MetaCASE Tool For A Better Reuse Of Visual Notations Amine El Kouhen,Abdelouahed Gherbi,Cedric Dumoulin,Pierre Boulet,Sébastien Gerard 8th System Analysis and Modelling conference (SAM 2014), Sep 2014, Valencia, Spain. pp.16-31, ⟨10.1007/978-3-319-11743-0_2⟩ Communication dans un congrès hal-01011899v1
Specifez vos éditeurs de diagrammes à l'aide de composants réutilisables Amine El Kouhen,Cedric Dumoulin,Sébastien Gerard,Pierre Boulet 2ème Conférence en Ingénierie Logiciele (CIEL'13), Université de Lorraine - LORIA, Apr 2013, Nancy, France Communication dans un congrès hal-00801235v1
A Component-Based Approach for Specifying Reusable Visual Languages Amine El Kouhen,Sébastien Gerard,Cedric Dumoulin,Pierre Boulet 2013 IEEE Symposium on Visual Languages and Human-Centric Computing, Allen Cypher, Sep 2013, San José, CA, United States. pp.135-138, ⟨10.1109/VLHCC.2013.6645257⟩ Communication dans un congrès hal-00860909v1
A Component-Based Approach for Specifying DSML's Concrete Syntax Amine El Kouhen,Cedric Dumoulin,Sébastien Gerard,Pierre Boulet 2nd Workshop on Graphical Modeling Language Development (GMLD 2013), Jul 2013, Montpellier, France. pp.3-11, ⟨10.1145/2489820.2489822⟩ Communication dans un congrès hal-00829173v1
An Optimized Compilation of UML State Machines Asma Charfi Smaoui,Chokri Mraidha,Pierre Boulet ISORC - 15th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Apr 2012, Shenzhen, China Communication dans un congrès hal-00676943v1
Harnessing the Power of GPUs without Losing Abstractions in SaC and ArrayOL: A Comparative Study Jing Guo,Antonio Wendell de Oliveira Rodrigues,Jerarajan Thiyagalingam,Frédéric Guyomarch,Pierre Bouletet al. HIPS 2011, 16th International Workshop on High-Level Parallel Programming Models and Supportive Environments, May 2011, Anchorage (Alaska), United States Communication dans un congrès inria-00569100v1
Modeling Networks-on-Chip at System Level with the MARTE UML profile Majdi Elhaji,Pierre Boulet,Rached Tourki,Abdelkrim Zitouni,Jean-Luc Dekeyseret al. M-BED'2011, Mar 2011, Grenoble, France Communication dans un congrès inria-00569077v1
Does Code Generation Promote or Prevent Optimizations? Asma Charfi,Chokri Mraidha,Sébastien Gérard,François Terrier,Pierre Boulet ISORC 2010 - 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, May 2010, Parador of Carmona, Spain. pp.75--79, ⟨10.1109/ISORC.2010.25⟩ Communication dans un congrès inria-00522661v1
Architecture Exploration for Efficient Data Transfer and Storage in Data-Parallel Applications Rosilde Corvino,Abdoulaye Gamatié,Pierre Boulet Euro-Par - 16th International Euro-Par Conference - 2010, Aug 2010, Ischia, Italy. pp.101--116, ⟨10.1007/978-3-642-15277-1_11⟩ Communication dans un congrès inria-00522786v1
Toward optimized code generation through model-based optimization Asma Charfi,Chokri Mraidha,Sébastien Gerard,François Terrier,Pierre Boulet DATE 2010 - Design, Automation and Test in Europe Conference and Exhibition, Mar 2010, Dresden, Germany. pp.1313--1316, ⟨10.1109/DATE.2010.5457010⟩ Communication dans un congrès inria-00522657v1
An MDE approach for modeling network on chip topologies Majdi Elhaji,Pierre Boulet,Samy Meftali,Abdelkrim Zitouni,Jean-Luc Dekeyseret al. Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2010 5th International Conference on, Mar 2010, Hammamet, Tunisia. ⟨10.1109/DTIS.2010.5487596⟩ Communication dans un congrès inria-00526629v1
Modeling of Configurations for Embedded System Implementations in MARTE Imran Rafiq Quadri,Abdoulaye Gamatié,Pierre Boulet,Jean-Luc Dekeyser 1st workshop on Model Based Engineering for Embedded Systems Design - Design, Automation and Test in Europe (DATE 2010), Mar 2010, Dresden, Germany Communication dans un congrès inria-00486845v1
Mapping Real Time Applications on NoC Architecture with Hybrid Multi-objective Algorithm Abou El Hassan Benyamina,Pierre Boulet,Abdelkader Aroui,S. Eltar,Karima Dellal META 2010 - The International Conference on Metaheuristics and Nature Inspired Computing, Oct 2010, Djerba Island, Tunisia Communication dans un congrès inria-00523969v1
Interaction between inter-repetition dependences and high-level transformations in Array-OL Calin Glitia,Pierre Boulet Conference on Design and Architectures for Signal and Image Processing (DASIP 2009), 2009, Sophia Antipolis, France Communication dans un congrès inria-00565261v1
Gaspard2: from MARTE to SystemC Simulation Rabie Ben Atitallah,Philippe Marquet,Éric Piel,Samy Meftali,Smail Niaret al. Proceeedings of the DATE'08 workshop on Modeling and Analyzis of Real-Time and Embedded Systems with the MARTE UML profile, Mar 2008, Washington, United States Communication dans un congrès inria-00524373v1
An Hybrid algorithm for Mapping on NoC Architectures Abou El Hassan Benyamina,Pierre Boulet 2nd International Conference on Metaheuristics and Nature Inspired Computing, META'08, 2008, Hammamet, Tunisia Communication dans un congrès inria-00565153v1
High Level Loop Transformations for Multidimensional Signal Processing Embedded Applications Calin Glitia,Pierre Boulet International Symposium on Systems, Architectures, MOdeling, and Simulation (SAMOS VIII), 2008, Samos, Greece Communication dans un congrès inria-00565154v1
Using the UML Profile for MARTE to MPSoC Co-Design Jean-Luc Dekeyser,Abdoulaye Gamatié,Anne Etien,Rabie Ben Atitallah,Pierre Boulet First International Conference on Embedded Systems & Critical Applications (ICESCA'08), May 2008, Tunis, Tunisia Communication dans un congrès inria-00524363v1
Using An MDE Approach for Modeling of Interconnection networks Imran Rafiq Quadri,Pierre Boulet,Samy Meftali,Jean-Luc Dekeyser The International Symposium on Parallel Architectures, Algorithms and Networks Conference (ISPAN 08), 2008, Sydney, Australia Communication dans un congrès inria-00565155v1
Model-Based Testing of the ERTMS System with SysML and MARTE Souha Kamoun,Pierre Boulet MoDeVVa'07, 2007, Nashville, United States Communication dans un congrès inria-00565159v1
Une approche modèle pour la génération de scénarios de tests : Application au système ERTMS/ETCS Souha Kamoun,Pierre Boulet Workshop International : Logistique and Transport 2007, 2007, Sousse, Tunisie Communication dans un congrès inria-00565158v1
Multi-objective Mapping for NoC Architectures Abou El Hassan Benyamina,Pierre Boulet 1st International Conference on Digital Communications and Computer Applications, 2007, Irbid, Jordan. pp.132-139 Communication dans un congrès inria-00565162v1
Repetitive Allocation Modeling with MARTE Pierre Boulet,Philippe Marquet,Éric Piel,Julien Taillard Forum on specification and design languages (FDL'07), 2007, Barcelona, Spain Communication dans un congrès inria-00565160v1
Synchronous Modeling of Data-Intensive Applications Huafeng Yu,Abdoulaye Gamatié,Eric Rutten,Pierre Boulet,Jean-Luc Dekeyser International Open Workshop on Synchronous Programming (Synchron 2006), 2006, Alpe d'Huez, France Communication dans un congrès inria-00565163v1
Vers des transformations d'applications à parallélisme de données en équations synchrones Huafeng Yu,Abdoulaye Gamatié,Eric Rutten,Pierre Boulet,Jean-Luc Dekeyser 9ème édition de SYMPosium en Architectures nouvelles de machines, Oct 2006, Perpignan, France Communication dans un congrès inria-00124125v1
UML2 Profile for Modeling Controlled Data Parallel Applications Ouassila Labbani,Jean-Luc Dekeyser,Pierre Boulet,Eric Rutten Forum on specification and Design Languages (FDL'06), 2006, Darmstadt, Germany Communication dans un congrès inria-00565164v1
Model Driven Engineering for Regular MPSoC Co-design Pierre Boulet,Arnaud Cuccuru,Jean-Luc Dekeyser,Ashish Meena ReCoSoC-05, 2005, Montpellier, France Communication dans un congrès inria-00565173v1
Mode-Automata based Methodology for Scade Ouassila Labbani,Jean-Luc Dekeyser,Pierre Boulet Hybrid Systems: Computation and Control (HSCC05), Mar 2005, Zurich, Switzerland Communication dans un congrès inria-00000912v1
Traceability and Interoperability at Different Levels of Abstraction in Model Transformations Lossan Bondé,Pierre Boulet,Jean-Luc Dekeyser Forum on Specification and Design Languages, FDL'05, 2005, Lausanne, Switzerland Communication dans un congrès inria-00565170v1
The case for Globally Irregular Locally Regular Algorithm Architecture Adequation Pierre Boulet,Ashish Meena Journées Francophones sur l'Adéquation Algorithme Architecture (JFAAA'05), 2005, Dijon, France Communication dans un congrès inria-00565175v1
Towards UML 2 Extensions for Compact Modeling of Regular Complex Topologies - A partial answer to the MARTE RFP Arnaud Cuccuru,Jean-Luc Dekeyser,Philippe Marquet,Pierre Boulet MoDELS/UML 2005, ACM/IEEE 8th International Conference on Model Driven Engineering Languages and Systems, 2005, Montego Bay, Jamaica. pp.445-459 Communication dans un congrès inria-00565168v1
Introducing Control in the Gaspard2 Data-Parallel Metamodel: Synchronous Approach Ouassila Labbani,Jean-Luc Dekeyser,Pierre Boulet,Eric Rutten International Workshop MARTES: Modeling and Analysis of Real-Time and Embedded Systems, Oct 2005, Montego Bay, Jamaica Communication dans un congrès inria-00000911v1
Why to do Without Model Driven Architecture in Embedded System Codesign? Jean-Luc Dekeyser,Philippe Marquet,Samy Meftali,Cédric Dumoulin,Pierre Bouletet al. The first annual IEEE BENELUX/DSP Valley Signal Processing Symposium, (SPS-DARTS 2005), 2005, Antwerp, Belgium Communication dans un congrès inria-00565174v1
Projection of the Array-OL Specification Language onto the Kahn Process Network Computation Model Abdelkader Amar,Pierre Boulet,Philippe Dumont International Symposium on Parallel Architectures, Algorithms, and Networks, 2005, Las Vegas, Nevada, United States Communication dans un congrès inria-00565167v1
Model Driven Scheduling Framework for Multiprocessor SoC Design Ashish Meena,Pierre Boulet Workshop on Scheduling for Parallel Computing (SPC 2005), 2005, Poznan, Poland Communication dans un congrès inria-00565169v1
Model Driven Engineering for SoC Co-Design Jean-Luc Dekeyser,Pierre Boulet,Philippe Marquet,Samy Meftali NEWCAS'05, IEEE, 2005, Québec, Canada Communication dans un congrès inria-00565172v1
Regular Hardware Architecture Modeling with UML2 Arnaud Cuccuru,Pierre Boulet,Jean-Luc Dekeyser FDL04, 2004, Lille, France Communication dans un congrès inria-00565176v1
MDA for SoC Design, UML to SystemC Experiment Cedric Dumoulin,Pierre Boulet,Arnaud Cuccuru,Jean-Luc Dekeyser,Philippe Marquetet al. UML-SOC'04-International Workshop on UML for SoC Design, Jan 2004, unknown, United States Communication dans un congrès hal-00943559v1
Sophocles: Cyber-Enterprise for System-on-Chip Distributed Simulation -- Model Unification Pierre Boulet,Jean-Luc Dekeyser,Cédric Dumoulin,Philippe Marquet,Philippe Kajfaszet al. IFIP International Workshop on IP Based System-on-Chip Design, 2003, Grenoble, France Communication dans un congrès inria-00565177v1
MDA for SoC Design, Intensive Signal Processing Experiment Cédric Dumoulin,Pierre Boulet,Jean-Luc Dekeyser,Philippe Marquet FDL'03, ECSI, 2003, Frankfurt, Germany Communication dans un congrès inria-00565179v1
MDA for SoC Embedded Design, Intensive Signal Processing Experiment Pierre Boulet,Jean-Luc Dekeyser,Cédric Dumoulin,Philippe Marquet SIVOES-MDA, 2003, San Francisco, United States Communication dans un congrès inria-00565178v1
Assembling Dynamic Components for Metacomputing using CORBA Abdelkader Amar,Pierre Boulet,Jean-Luc Dekeyser Parallel Computing, 2001, Naples, Italy Communication dans un congrès inria-00565181v1
Visual Data-parallel Programming for Signal Processing Applications Pierre Boulet,Jean-Luc Dekeyser,Jean-Luc Levaire,Philippe Marquet,Julien Soulaet al. 9th Euromicro Workshop on Parallel and Distributed Processing, PDP 2001, 2001, Mantova, Italy. pp.105--112 Communication dans un congrès inria-00565183v1
A Visual Development Environment for Meta-Computing Applications Pierre Boulet,Jean-Luc Dekeyser,Florent Devin,Philippe Marquet HCI International 2001, 9th Int'l Conf. on Human-Computer Interaction, 2001, New Orleans, Lousiana, United States Communication dans un congrès inria-00565182v1
Parallelization of 3D Magnetostatic Code Using High Performance Fortran Emmanuel Cagniot,Thomas Brandes,Jean-Luc Dekeyser,Francis Piriou,Pierre Bouletet al. International Conference on Parallel Computing in Electrical Engineering, PARELEC'2000, 2000, Trois-Rivières, Quebec, Canada. pp.181--185 Communication dans un congrès inria-00565185v1
High Level Parallelization of a 3D Electromagnetic Simulation Code With Irregular Communication Patterns Emmanuel Cagniot,Thomas Brandes,Jean-Luc Dekeyser,Francis Piriou,Pierre Bouletet al. 4th International Meeting on Vector and Parallel Processing (VECPAR'2000), 2000, Porto, Portugal. pp.519--528 Communication dans un congrès inria-00565184v1
Parallélisation d'un code 3D Magnétostatique avec le Langage de Programmation High Performance Fortran Emmanuel Cagniot,Jean-Luc Dekeyser,Pierre Boulet,Thomas Brandes,Francis Piriouet al. Conférence Européenne sur les Méthodes Numériques en Éléctomagnétisme, NUMELEC'2000 (poster session), 2000, Poitiers, France. pp.184-185 Communication dans un congrès inria-00565186v1
Une approche à la SQL du traitement de données intensif dans Gaspard Pierre Boulet,Jean-Luc Dekeyser,Alain Demeure,Florent Devin,Philippe Marquet RenPar'11, Rencontres Francophones du Parallélisme des Architectures et des Systèmes, 1999, Rennes, France Communication dans un congrès inria-00565188v1
Parallelization of a Fortran 90 Program for Electromagnetic Problems Emmanuel Cagniot,Thomas Brandes,Jean-Luc Dekeyser,Francis Piriou,Pierre Bouletet al. 3rd Annual HPF User Group Meeting, HUG'99, 1999, Redondo Beach, CA, United States Communication dans un congrès inria-00565189v1
Communication Pre-evaluation in HPF Pierre Boulet,Xavier Redon Euro-Par'98, 1998, Southampton, United Kingdom. pp.263-272 Communication dans un congrès inria-00565190v1
Scanning polyhedra without DO-loops Pierre Boulet,Paul Feautrier PACT'98, 1998, Paris, France. pp.4-11 Communication dans un congrès inria-00564990v1
Code generation in Bouclettes Pierre Boulet,Michèle Dion Proceedings of the Fifth Euromicro Workshop on Parallel and Distributed Processing, 1997, London, United Kingdom. pp.273--280 Communication dans un congrès inria-00565001v1
Bouclettes: A Fortran Loop Parallelizer Pierre Boulet HPCN 96, 1996, Bruxelles, Belgium. pp.784-791 Communication dans un congrès inria-00564993v1
Evaluation of Automatic Parallelization Strategies for HPF Compilers Pierre Boulet,Thomas Brandes HPCN 96, 1996, Bruxelles, Belgium. pp.778-783 Communication dans un congrès inria-00564994v1
Heuristics for the evaluation of array expressions on state-of-the-art massively parallel machines Vincent Bouchitte,Pierre Boulet,Alain Darte,Yves Robert Algorithms and Parallel VLSI Architectures III, 1995, Unknown, pp.319-330 Communication dans un congrès hal-00857100v1
Evaluating array expressions on massively parallel machines with communication/computation overlap Vincent Bouchitte,Pierre Boulet,Alain Darte,Yves Robert Parallel Processing: CONPAR94 - VAPP VI, 1994, Unknown, pp.713-724 Communication dans un congrès hal-00857085v1
Experimental Evaluation of Affine Schedules for Matrix Multiplication on the MasPar Architecture Pierre Boulet,José A.B. Fortes Proceedings MPCS'94, 1994, Ischia, Italy. pp.452--459 Communication dans un congrès inria-00565005v1
(Pen)-ultimate tiling? Pierre Boulet,Alain Darte,Tanguy Risset,Yves Robert Proceedings of the IEEE Scalable High Performance Computing Conference, 1994, Knoxville, TN, United States. pp.568-576 Communication dans un congrès inria-00564995v1

Chapitre d'ouvrage (8)

Spiking Neural Computing in Memristive Neuromorphic Platforms Mahyar Shahsavari,Philippe Devienne,Pierre Boulet Springer Nature, Handbook of Memristor Networks, , In press, 978-3-319-76375-0. ⟨10.1007/978-3-319-76375-0_25⟩ Chapitre d'ouvrage hal-02172472v1
Static and Dynamic Mapping Heuristics for Multiprocessor Systems-on-Chip A. H. Benyamina,Pierre Boulet,K. Benhaoua Gamatié, Abdoulaye. Computing in Research and Development in Africa, Springer International Publishing, pp.229--247, 2014, 978-3-319-08238-7 978-3-319-08239-4 Chapitre d'ouvrage hal-01198993v1
Design Space Exploration for Efficient Data Intensive Computing on SoCs Rosilde Corvino,Abdoulaye Gamatié,Pierre Boulet Borko Furht and Armando Escalante. Handbook of Data Intensive Computing, Springer, 2011 Chapitre d'ouvrage inria-00637012v1
UML2 Profile for Modeling Controlled Data Parallel Applications Ouassila Labbani,Jean-Luc Dekeyser,Pierre Boulet,Eric Rutten Huss, Sorin Alexander. Advances in Design and Specification Languages for SoCs, Selected contributions from FDL'06, Springer, 2007, ChDL Chapitre d'ouvrage inria-00565161v1
Model Driven Engineering for System-on-Chip Design Pierre Boulet,Cédric Dumoulin,Antoine Honoré Jean-Philippe Babau and Joël Champeau and Sébastien Gérard. From MDD concepts to experiments and illustrations, ISTE, Hermes science and Lavoisier, 2006, 1-905209-59-0 Chapitre d'ouvrage inria-00565165v1
Towards Distributed Process Networks with CORBA Abdelkader Amar,Pierre Boulet,Jean-Luc Dekeyser Frédéric Desprez. Algorithms and Tools for Parallel Computing On Heterogeneous Clusters, Nova Science Publishers, Inc, 2006 Chapitre d'ouvrage inria-00565166v1
Model Driven Architecture for Intensive Embedded Systems Lossan Bondé,Pierre Boulet,Arnaud Cuccuru,Jean-Luc Dekeyser,Cédric Dumoulinet al. Sébastien Gérard and Jean-Philippe Babeau and Joël Champeau. Model Driven Engineering for Distributed Embedded Real-Time Systems, ISTE, Hermes science and Lavoisier, 2005, 1-905209-32-0 Chapitre d'ouvrage inria-00565171v1
Evaluating Array Expressions on Massively Parallel Machines with Communication/Computation Overlap Vincent Bouchitté,Pierre Boulet,Alain Darte,Yves Robert B. Buchberger and J. Volkert. Parallel Processing: CONPAR 94-VAPP VI, 854, Springer Verlag, pp.713-724, 1994, LNCS Chapitre d'ouvrage inria-00564992v1

Ouvrages (1)

Advances in Design and Specification Languages for SoCs Selected Contributions from FDL'04 Pierre Boulet Pierre Boulet. Kluwer Academic Publishers, pp.303, 2005, 0-387-26149-4. ⟨10.1007/b136935⟩ Ouvrages inria-00585558v1

Autre publication scientifique (2)

MultimodalBirds Jonathan Courtois,Jérémy Pinguet,Valentin Meunier,Fahd Chtioui,Aurélie Saulquinet al. 2026, ⟨10.5281/zenodo.17633386⟩ Autre publication scientifique hal-05540404v1
Consommation énergétique des technologies blockchain Pierre Boulet 2021 Autre publication scientifique hal-03514983v1

Logiciel (1)

Convolutional Spiking Neural Network Simulator (CSNN) Pierre Falez,Pierre Tirilly,Ioan Marius Bilasco,Devienne Philippe,Pierre Boulet 2024, ⟨swh:1:dir:d7f51c14135d5db826ff4e440621a3d21136913d;origin=https://gitlab.univ-lille.fr/bioinsp/falez-csnn-simulator;visit=swh:1:snp:8ed8bf7b7cd230015bd2d21f87d43f326b5db74a;anchor=swh:1:rev:4438b1bcb3c2d46094f4518e8d70c07d886ac381⟩ Logiciel hal-04410960v1

Poster de conférence (2)

Playing the Pinball game with Spiking Neural Networks Mazdak Fathai,Pierre Boulet,Chiara Bartolozzi,Giulia D Angelo Neuromorphic Computing for Development and Learning Workshop (NCDL), Sep 2025, Prague, Czech Republic Poster de conférence hal-05544060v1
N2S3, a Simulator for the Architecture Exploration of Neuromorphic Accelerators Mahyar Shahsavari,Philippe Devienne,Pierre Boulet NeuComp 2015, Mar 2015, Grenoble, France. 2015 Poster de conférence hal-01240444v1

Rapport (30)

Digital transformation of certificates issued by universities for European competitiveness Pierre Boulet,Perrine de Coëtlogon,Émilie Thébault,Patrice van de Velde,Cyril Murie Université de Lille. 2025 Rapport (rapport technique) hal-04979478v1
La transformation numérique des attestations émises par les universités au service de la compétitivité européenne Pierre Boulet,Perrine de Coëtlogon,Émilie Thébault,Patrice van de Velde,Cyril Murie Université de Lille. 2025 Rapport (rapport technique) hal-04959657v1
Production et valorisation des logiciels issus de la recherche publique française Isabelle Blanc,Pierre Boulet,Guy Courbebaisse,Michel Daydé,Sébastien Gérardet al. Comité pour la science ouverte. 2024 Rapport hal-04844037v1
Les technologies blockchain au service du secteur public Perrine de Coëtlogon,Marc Durand,Maxime Jeantet,Claire Génin,Romuald Ramonet al. [Rapport de recherche] Université de Lille (2018-..). 2021 Rapport (rapport de recherche) hal-03232816v2
Référentiel de connaissances pour un numérique éco-responsable Pierre Boulet,Sylvain Bouveret,Aurélie Bugeau,Frenoux Emmanuelle,Julien Lefevreet al. [Rapport de recherche] EcoInfo. 2020 Rapport (rapport de recherche) hal-02954188v1
N2S3, an Open-Source Scalable Spiking Neuromorphic Hardware Simulator Pierre Boulet,Philippe Devienne,Pierre Falez,Guillermo Polito,Mahyar Shahsavariet al. [Research Report] Université de Lille 1, Sciences et Technologies; CRIStAL UMR 9189. 2017 Rapport (rapport de recherche) hal-01432133v2
Memristor nanodevice for unconventional computing:review and applications Mahyar Shahsavari,Pierre Boulet [Research Report] Université de Lille 1, Sciences et Technologies; CRIStAL UMR 9189. 2016 Rapport (rapport de recherche) hal-01480614v1
PMS+: Un outil pour les processus de production de logiciels Amen Souissi,Cedric Dumoulin,Pierre Boulet [Rapport de recherche] 2013, pp.9 Rapport (rapport de recherche) hal-00802213v1
Evaluation of Modeling Tools Adaptation Amine El Kouhen,Cedric Dumoulin,Sébastien Gérard,Pierre Boulet 2012 Rapport hal-00706701v2
Modélisation centrée sur les processus métier pour la génération complète de portails collaboratifs Amen Souissi,Pierre Boulet,Cedric Dumoulin,Michael Launay [Rapport de recherche] 2011 Rapport (rapport de recherche) inria-00638298v1
Repetitive Model Refactoring for Design Space Exploration of Intensive Signal Processing Applications Calin Glitia,Pierre Boulet,Eric Lenormand,Michel Barreteau [Research Report] 2009, pp.21 Rapport (rapport de recherche) inria-00465456v1
Formal Semantics of Array-OL, a Domain Specific Language for Intensive Multidimensional Signal Processing Pierre Boulet [Research Report] RR-6467, INRIA. 2008, pp.33 Rapport (rapport de recherche) inria-00261178v2
High Level Loop Transformations for Systematic Signal Processing Embedded Applications Calin Glitia,Pierre Boulet [Research Report] RR-6469, INRIA. 2008, pp.27 Rapport (rapport de recherche) inria-00262023v2
Gaspard2 UML profile documentation Rabie Ben Atitallah,Pierre Boulet,Arnaud Cuccuru,Jean-Luc Dekeyser,Antoine Honoréet al. [Technical Report] RT-0342, INRIA. 2007, pp.45 Rapport (rapport technique) inria-00171137v2
Modeling of Topologies of Interconnection Networks based on Multidimensional Multiplicity Imran Rafiq Quadri,Pierre Boulet,Jean-Luc Dekeyser [Research Report] RR-6201, INRIA. 2007 Rapport (rapport de recherche) inria-00149527v4
Array-OL Revisited, Multidimensional Intensive Signal Processing Specification Pierre Boulet [Research Report] RR-6113, INRIA. 2007, pp.24 Rapport (rapport de recherche) inria-00128840v3
Introducing Control in the Gaspard2 Data-Parallel Metamodel: Synchronous Approach Ouassila Labbani,Jean-Luc Dekeyser,Pierre Boulet,Eric Rutten [Research Report] RR-5794, INRIA. 2006, pp.49 Rapport (rapport de recherche) inria-00070228v1
Synchronous Modeling of Data Intensive Applications Abdoulaye Gamatié,Eric Rutten,Huafeng Yu,Pierre Boulet,Jean-Luc Dekeyser [Research Report] RR-5876, INRIA. 2006, pp.21 Rapport (rapport de recherche) inria-00001216v1
Another Multidimensional Synchronous Dataflow: Simulating Array-OL in Ptolemy II Philippe Dumont,Pierre Boulet [Research Report] RR-5516, INRIA. 2005, pp.19 Rapport (rapport de recherche) inria-00070490v1
Projection of the Array-OL Specification Language onto the Kahn Process Network Computation Model Abdelkader Amar,Pierre Boulet,Pierre Dumont [Research Report] RR-5515, INRIA. 2005, pp.18 Rapport (rapport de recherche) inria-00070491v1
Distributed Process Networks Using Half FIFO Queues in CORBA Abdelkader Amar,Pierre Boulet,Jean-Luc Dekeyser,Frans Theeuwen [Research Report] RR-4765, INRIA. 2003 Rapport (rapport de recherche) inria-00071821v1
UML 2.0 Structure Diagram for Intensive Signal Processing Application Specification Cedric Dumoulin,Pierre Boulet,Jean-Luc Dekeyser,Philippe Marquet [Research Report] RR-4766, INRIA. 2003 Rapport (rapport de recherche) inria-00071820v1
Tiling for Heterogeneous Computing Platforms. Pierre Boulet,Jack Dongarra,Yves Robert,Frédéric Vivien [Research Report] LIP RR-1998-08, Laboratoire de l'informatique du parallélisme. 1998, 2+18p Rapport (rapport de recherche) hal-02102006v1
Loop parallelization algorithms: from parallelism extraction to code generation Pierre Boulet,Alain Darte,Georges-André Silber,Frédéric Vivien [Research Report] 97--17, 1997 Rapport (rapport de recherche) hal-00856896v1
Loop parallelization algorithms : from parallelism extraction to code generation. Pierre Boulet,Alain Darte,Georges-Andre Silber,Frédéric Vivien [Research Report] LIP RR-1997-17, Laboratoire de l'informatique du parallélisme. 1997, 2+30p Rapport (rapport de recherche) hal-02101883v1
Evaluation of automatic parallelization strategies for HPF compilers Pierre Boulet,Thomas Brandes [Research Report] LIP RR-1995-44, Laboratoire de l'informatique du parallélisme. 1995, 2+13p Rapport (rapport de recherche) hal-02101799v1
The bouclettes loop parallelizer. Pierre Boulet [Research Report] LIP RR-1995-40, Laboratoire de l'informatique du parallélisme. 1995, 2+13p Rapport (rapport de recherche) hal-02102082v1
Code generation in bouclettes. Pierre Boulet,Michèle Dion [Research Report] LIP RR-1995-43, Laboratoire de l'informatique du parallélisme. 1995, 2+21p Rapport (rapport de recherche) hal-02101995v1
Reference Manual of the Bouclettes Parallelizer Pierre Boulet,Michèle Dion,Eric Lequiniou,Tanguy Risset [Technical Report] 1994 Rapport (rapport technique) inria-00565002v1
Reference manual of the Bouclettes parallelizer Pierre Boulet,Michèle Dion,Eric Lequiniou,Tanguy Risset [Research Report] LIP TR-94-04, Laboratoire de l'informatique du parallélisme. 1994, 2+28p Rapport (rapport de recherche) hal-02102691v1

Pré-publication, Document de travail (1)

Parallel Hyperparameter Optimization Of Spiking Neural Networks Thomas Firmin,Pierre Boulet,El-Ghazali Talbi 2023 Pré-publication, Document de travail (preprint/prepublication) hal-04464394v1

Thèse (1)

Outils pour la parallélisation automatique Pierre Boulet Génie logiciel [cs.SE]. Ecole normale supérieure de lyon - ENS LYON, 1996. Français. ⟨NNT : ⟩ Thèse tel-00564899v1

HDR (1)

Contributions aux environnements de programmation pour le calcul intensif Pierre Boulet Génie logiciel [cs.SE]. Université des Sciences et Technologie de Lille - Lille I, 2002 HDR tel-00564904v1