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Serge Bernard

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Présentation

**RESEARCH** ============ Analog and Mixed-Signal Testing =============================== - Design-for-Testability (DfT), - 'Built-In-Self-Test (BIST), - Analog-to-Digital Converter Testing, - System-in-Package (SiP) Testing. - Built-in-Self Repair (BISR) Integrated Circuit Design for Medical Applications ================================================== - Neural Stimulator for Functional Electrical Stimulation (FES), - Physiological Signal Recording (ElectroNeuroGram: ENG). - Medical devices development in the field of ophtalmology and vision based equipments. Dependability ============= - Dependability at system level - Dependability for Analog and mixed signal circuits Professional Status =================== - 2014-... : Head of the micorlectronic department - LIRMM - 2010-2014 : Deputy Head of the micorlectronic department - LIRMM - 2006-… : Head & Scientific Co-director of [ISyTest](http://www.lirmm.fr/isytest): Institute for System Testing (joint institute [LIRMM](http://www.lirmm.fr/)/[NXP](http://www.nxp.com/)) - 2001-... : CNRS Researcher in the Microelectronics department of LIRMM. Education ========= - 2010 – HDR “Habilitation à Diriger les Recherches”. in Microelectronics, University of Montpellier, France. - 2001 - Ph.D. in Microelectronics, University of Montpellier, France. - 1999 - Master in Microelectronics, University of Montpellier, France. - 1998 - “Agrégation de Génie Electrique” high-level competitive examination for recruiting teachers - 1997 - M.S. in Electrical Engineering, University of Paris VI(Orsay), France. - **ACTIVITIES** -------------- - **General chair** ----------------- - Design of Circuits and Integrated System (DCIS’2012), à Avignon. **Program chair** ----------------- - IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era, (DTIS’11), Athènes, Grèce, 4-7 avril 2011. **Organization of Special sessions** ------------------------------------ - “biomedical circuits and systems”, basée sur des papiers invités, à IEEE International Symposium of Electronic Design, Test & Applications, (DELTA’10), Ho Chi Minh City, Vietnam, 13-15 janvier 2010. **Local Chair** --------------- - IEEE International Workshop on Silicon Debug and Diagnosis, (SDD’04) Ajaccio, France, 26-27 mai 2004. **Organization commitee** ------------------------- - IEEE International Mixed-Signal, Sensor and System Test Workshop (IMS3TW’10), La Grande Motte, France, juin 2010, - IEEE European Test Symposium (ETS’04), Ajaccio, France, 23-26 mai 2004, - IEEE International Workshop on Silicon Debug and Diagnosis (SDD’04) Ajaccio, France, 26-27 mai 2004, - International Conference on Field Programmable Logic and Application (FPL’02), Montpellier (La Grande-Motte), France 2-4 septembre 2002, - IFIP International Conference on Very Large Scale Integration The Global System on Chip Design & CAD Conference (VLSI-SOC’01), Montpellier, France, 3-5 décembre 2001, - IEEE International Mixed-Signal Test Workshop (IMSTW’00), Montpellier (La Grande- Motte), France, 15-17 juin 2000. -
**RESEARCH** ============ Analog and Mixed-Signal Testing =============================== - Design-for-Testability (DfT), - 'Built-In-Self-Test (BIST), - Analog-to-Digital Converter Testing, - System-in-Package (SiP) Testing. - Built-in-Self Repair (BISR) Integrated Circuit Design for Medical Applications ================================================== - Neural Stimulator for Functional Electrical Stimulation (FES), - Physiological Signal Recording (ElectroNeuroGram: ENG). - Medical devices development in the field of ophtalmology and vision based equipments. Dependability ============= - Dependability at system level - Dependability for Analog and mixed signal circuits Professional Status =================== - 2014-... : Head of the micorlectronic department - LIRMM - 2010-2014 : Deputy Head of the micorlectronic department - LIRMM - 2006-… : Head & Scientific Co-director of [ISyTest](http://www.lirmm.fr/isytest): Institute for System Testing (joint institute [LIRMM](http://www.lirmm.fr/)/[NXP](http://www.nxp.com/)) - 2001-... : CNRS Researcher in the Microelectronics department of LIRMM. Education ========= - 2010 – HDR “Habilitation à Diriger les Recherches”. in Microelectronics, University of Montpellier, France. - 2001 - Ph.D. in Microelectronics, University of Montpellier, France. - 1999 - Master in Microelectronics, University of Montpellier, France. - 1998 - “Agrégation de Génie Electrique” high-level competitive examination for recruiting teachers - 1997 - M.S. in Electrical Engineering, University of Paris VI(Orsay), France. - **ACTIVITIES** -------------- - **General chair** ----------------- - Design of Circuits and Integrated System (DCIS’2012), à Avignon. **Program chair** ----------------- - IEEE International Conference on Design & Technology of Integrated Systems in Nanoscale Era, (DTIS’11), Athènes, Grèce, 4-7 avril 2011. **Organization of Special sessions** ------------------------------------ - “biomedical circuits and systems”, basée sur des papiers invités, à IEEE International Symposium of Electronic Design, Test & Applications, (DELTA’10), Ho Chi Minh City, Vietnam, 13-15 janvier 2010. **Local Chair** --------------- - IEEE International Workshop on Silicon Debug and Diagnosis, (SDD’04) Ajaccio, France, 26-27 mai 2004. **Organization commitee** ------------------------- - IEEE International Mixed-Signal, Sensor and System Test Workshop (IMS3TW’10), La Grande Motte, France, juin 2010, - IEEE European Test Symposium (ETS’04), Ajaccio, France, 23-26 mai 2004, - IEEE International Workshop on Silicon Debug and Diagnosis (SDD’04) Ajaccio, France, 26-27 mai 2004, - International Conference on Field Programmable Logic and Application (FPL’02), Montpellier (La Grande-Motte), France 2-4 septembre 2002, - IFIP International Conference on Very Large Scale Integration The Global System on Chip Design & CAD Conference (VLSI-SOC’01), Montpellier, France, 3-5 décembre 2001, - IEEE International Mixed-Signal Test Workshop (IMSTW’00), Montpellier (La Grande- Motte), France, 15-17 juin 2000. -

Publications

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Improvement of Active-Input Current Mirrors Using Adaptive Biasing Technique

Mohan Julien , Serge Bernard , Fabien Soulier , Vincent Kerzérho , Guy Cathébras
DCIS 2018 - 33rd Conference on Design of Circuits and Integrated Systems, Nov 2018, Lyon, France. ⟨10.1109/DCIS.2018.8681474⟩
Communication dans un congrès lirmm-02287704v1

Formal analysis of bandwidth enhancement for high-performance active-input current mirror

Mohan Julien , Serge Bernard , Fabien Soulier , Vincent Kerzérho , Guy Cathébras
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2017, Palma de Mallorca, Spain. ⟨10.1109/DTIS.2017.7930162⟩
Communication dans un congrès lirmm-01710201v1

Formal analysis of high-performance stabilized active-input current mirror

Mohan Julien , Serge Bernard , Fabien Soulier , Vincent Kerzérho , Guy Cathébras
ISCAS: International Symposium on Circuits and Systems, May 2017, Baltimore, MD, United States. ⟨10.1109/ISCAS.2017.8051012⟩
Communication dans un congrès lirmm-01710205v1