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Vincent Beroulle

7
Documents

Présentation

Vincent Beroulle received an Engineer Degree from the National Polytechnical Institute of Grenoble (INPG) in 1996, and a Master's Degree and a Ph.D. in Microelectronics from the University of Montpellier II, respectively in 1999 and 2002. He is currently a Professor at the Grenoble Institute of Technology. He is head of the LCIS laboratory. His main interest concerns the security and safety of complex integrated circuits and systems. In particular, his work deals with fault modeling and fault injection with emulation platforms with a specific focus on IoT and RFID technologies.

Publications

35706

Comparison of RTL Fault Models for the Robustness Evaluation of Aerospace FPGA devices

Romain Champon , Vincent Beroulle , Athanasios Papadimitriou , David Hély , Gilles Grenevrier
22nd IEEE international Symposium on On-Line Testing and Robust System Design (IOLTS 2016), Jul 2016, San Feliu de Guiwols, Spain
Communication dans un congrès hal-01391000v1

Validation of RTL laser fault injection model with respect to layout information

Athanasios Papadimitriou , Marios Tampas , David Hély , Vincent Beroulle , Paolo Maistri
Hardware Oriented Security and Trust (HOST 2016), May 2015, Washington,, United States. ⟨10.1109/HST.2015.7140241⟩
Communication dans un congrès hal-01392792v1

A multiple fault injection methodology based on cone partitioning towards RTL modeling of laser attacks

Athanasios Papadimitriou , David Hely , Vincent Beroulle , Paolo Maistri , Régis Leveugle
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014, Mar 2014, Dresden, Germany. pp.1-4, ⟨10.7873/DATE2014.219⟩
Communication dans un congrès hal-00981848v1
Image document

Laser-Induced Fault Effects in Security-Dedicated Circuits

Vincent Beroulle , Philippe Candelier , Stephan de Castro , Giorgio Di Natale , Jean-Max Dutertre
VLSI-SoC: Very Large Scale Integration and System-on-Chip, Oct 2014, Playa del Carmen, Mexico. pp.220-240, ⟨10.1007/978-3-319-25279-7_12⟩
Communication dans un congrès hal-01383737v1

On error models for RTL security evaluations

Pierre Vanhauwaert , Paolo Maistri , Régis Leveugle , Athanasios Papadimitriou , David Hely
9th Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS) 2014, May 2014, Santorini, Greece. pp.1-6
Communication dans un congrès hal-01010314v1