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Vincent Beroulle
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Documents
Présentation
Vincent Beroulle received an Engineer Degree from the National Polytechnical Institute of Grenoble (INPG) in 1996, and a Master's Degree and a Ph.D. in Microelectronics from the University of Montpellier II, respectively in 1999 and 2002. He is currently a Professor at the Grenoble Institute of Technology. He is head of the LCIS laboratory. His main interest concerns the security and safety of complex integrated circuits and systems. In particular, his work deals with fault modeling and fault injection with emulation platforms with a specific focus on IoT and RFID technologies.
Publications
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A Review on Evaluation and Configuration of Fault Injection Attack Instruments to Design Attack Resistant MCU-Based IoT ApplicationsElectronics, 2020, 9 (7), pp.1153. ⟨10.3390/electronics9071153⟩
Article dans une revue
hal-02953431v1
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Sensitivity to Laser Fault Injection: CMOS FD-SOI vs. CMOS bulkIEEE Transactions on Device and Materials Reliability, 2019, 19 (1), pp.6-15. ⟨10.1109/TDMR.2018.2886463⟩
Article dans une revue
hal-01971932v1
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Hardware Security Vulnerability Assessment to Identify the Potential Risks in A Critical Embedded Application2020 IEEE 26th International Symposium on On-Line Testing and Robust System Design (IOLTS), Jul 2020, Napoli, France. pp.1-6, ⟨10.1109/IOLTS50870.2020.9159739⟩
Communication dans un congrès
hal-02953435v1
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Power of Prediction: Advantages of Deep Learning Modeling as Replacement for Traditional PUF CRP EnrollmentTrueDevice2020, Mar 2020, Grenoble, France
Communication dans un congrès
hal-02954099v1
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