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Vincent Beroulle
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Documents
Présentation
Vincent Beroulle received an Engineer Degree from the National Polytechnical Institute of Grenoble (INPG) in 1996, and a Master's Degree and a Ph.D. in Microelectronics from the University of Montpellier II, respectively in 1999 and 2002. He is currently a Professor at the Grenoble Institute of Technology. He is head of the LCIS laboratory. His main interest concerns the security and safety of complex integrated circuits and systems. In particular, his work deals with fault modeling and fault injection with emulation platforms with a specific focus on IoT and RFID technologies.
Publications
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Cross-layer analysis of clock glitch fault injection while fetching variable-length instructionsJournal of Cryptographic Engineering, 2024, ⟨10.1007/s13389-024-00352-6⟩
Article dans une revue
hal-04557324v1
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Cross-Layer Inference Methodology for Microarchitecture-aware Fault ModelsMicroelectronics Reliability, 2022, 139, ⟨10.1016/j.microrel.2022.114841⟩
Article dans une revue
hal-03848691v1
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Sensitivity to Laser Fault Injection: CMOS FD-SOI vs. CMOS bulkIEEE Transactions on Device and Materials Reliability, 2019, 19 (1), pp.6-15. ⟨10.1109/TDMR.2018.2886463⟩
Article dans une revue
hal-01971932v1
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Analysis of laser-induced errors: RTL fault models versus layout locality characteristicsMicroprocessors and Microsystems: Embedded Hardware Design , 2016, ⟨10.1016/j.micpro.2016.01.018⟩
Article dans une revue
hal-01299277v1
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Non-Invasive Attack on Ring Oscillator-based PUFs through Localized X-Ray IrradiationIEEE International Symposium on Hardware Oriented Security and Trust (HOST 2024), May 2024, Washington, DC, United States
Communication dans un congrès
hal-04521587v1
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Modeling Thermal Effects For Biasing PUFs29th IEEE European Test Symposium (ETS 2024), May 2024, The Hague, Netherlands
Communication dans un congrès
hal-04532564v1
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Experimental Evaluation of Delayed-Based Detectors Against Power-off AttackIEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS 2023), Jul 2023, Crete, Greece. ⟨10.1109/IOLTS59296.2023.10224876⟩
Communication dans un congrès
hal-04193277v1
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Microarchitectural Insights into Unexplained Behaviors under Clock Glitch Fault Injection22nd Smart Card Research and Advanced Application Conference (CARDIS 2023), Nov 2023, Amsterdam, Netherlands. pp.1-20
Communication dans un congrès
hal-04273995v1
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A Study of High Temperature Effects on Ring Oscillator based Physical Unclonable Functions29th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2023), Jul 2023, Chania, Greece
Communication dans un congrès
hal-04169632v1
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Microarchitecture-aware Fault Models: Experimental Evidence and Cross-Layer Inference MethodologyInternational Conference on Design & Technology of Integrated System in Nanoscale Era (DTIS 2021), Jun 2021, Apulia (virtual), Italy
Communication dans un congrès
hal-03272932v1
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The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacksIOLTS: International On-Line Testing Symposium, Jul 2018, Platja d’Aro, Spain. pp.214-219, ⟨10.1109/IOLTS.2018.8474230⟩
Communication dans un congrès
emse-01856000v1
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Laser fault injection at the CMOS 28 nm technology node: an analysis of the fault modelFDTC: Fault Diagnosis and Tolerance in Cryptography, Sep 2018, Amsterdam, Netherlands. pp.1-6, ⟨10.1109/FDTC.2018.00009⟩
Communication dans un congrès
emse-01856008v1
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On the development of a new countermeasure on a laser attack RTL fault modelDesign, Automation and Test in Europe Conference (DATE'16), Mar 2016, Dresden, Germany
Communication dans un congrès
hal-01414728v1
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On Fault Injections for Early Security Evaluation vs. Laser-based Attacks1st IEEE International Verification and Security Workshop, Jul 2016, St Feliu de Guixols, Spain. pp.33-38
Communication dans un congrès
hal-01444970v1
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Validation of RTL laser fault injection model with respect to layout informationIEEE International Symposium on Hardware Oriented Security and Trust (HOST'15), May 2015, McLean, VA, United States. pp.78-81
Communication dans un congrès
hal-01393414v1
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Analysis of laser-induced errors: RTL fault model versus layout locality characteristicsThird Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE'15), Mar 2015, Grenoble, France
Communication dans un congrès
hal-01393406v1
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Validation of RTL laser fault injection model with respect to layout informationHardware Oriented Security and Trust (HOST 2016), May 2015, Washington,, United States. ⟨10.1109/HST.2015.7140241⟩
Communication dans un congrès
hal-01392792v1
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A multiple fault injection methodology based on cone partitioning towards RTL modeling of laser attacksDesign, Automation and Test in Europe Conference and Exhibition (DATE), 2014, Mar 2014, Dresden, Germany. pp.1-4, ⟨10.7873/DATE2014.219⟩
Communication dans un congrès
hal-00981848v1
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FPGA emulation of laser attacks against secure deep submicron integrated circuitsSecond Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE'14), May 2014, Paderborn, Germany
Communication dans un congrès
hal-01132405v1
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Laser-Induced Fault Effects in Security-Dedicated CircuitsVLSI-SoC: Very Large Scale Integration and System-on-Chip, Oct 2014, Playa del Carmen, Mexico. pp.220-240, ⟨10.1007/978-3-319-25279-7_12⟩
Communication dans un congrès
hal-01383737v1
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On error models for RTL security evaluations9th Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS) 2014, May 2014, Santorini, Greece. pp.1-6
Communication dans un congrès
hal-01010314v1
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FPGA emulation of laser attacks against secure deep submicron integrated circuits7ème Colloque du GdR SoC-SiP, Jun 2013, Lyon, France
Communication dans un congrès
hal-01400108v1
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