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Vincent Beroulle

24
Documents

Présentation

Vincent Beroulle received an Engineer Degree from the National Polytechnical Institute of Grenoble (INPG) in 1996, and a Master's Degree and a Ph.D. in Microelectronics from the University of Montpellier II, respectively in 1999 and 2002. He is currently a Professor at the Grenoble Institute of Technology. He is head of the LCIS laboratory. His main interest concerns the security and safety of complex integrated circuits and systems. In particular, his work deals with fault modeling and fault injection with emulation platforms with a specific focus on IoT and RFID technologies.

Publications

844286

A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application

Xuan-Tu Tran , Yvain Thonnart , Jean Durupt , Vincent Beroulle , Chantal Robach
The 2nd ACM/IEEE International Symposium on Networks-on-Chip, Apr 2008, Newcastle, United Kingdom. pp. 149-158
Communication dans un congrès hal-00331239v1

Functional Verification of RTL Designs driven by Mutation Testing metrics

Youssef Serrestou , Vincent Beroulle , Chantal Robach
10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, 2007. DSD 2007., Aug 2007, Lubeck, Germany. pp.222-227, ⟨10.1109/DSD.2007.4341472⟩
Communication dans un congrès hal-00254470v1

Implementation of a Design-for-Test Architecture for Asynchronous Networks-on-Chip

Xuan-Tu Tran , Jean Durupt , Yvain Thonnard , François Bertrand , Chantal Robach
The 1st ACM/IEEE International Symposium on Networks-on-Chip (NOCS 2007), May 2007, Princeton, New Jersey, United States. pp.100
Communication dans un congrès hal-00187291v1

Génération de vecteurs de test pour les systèmes analogiques mixtes et RF

Y. Joannon , V. Beroulle , Chantal Robach , S. Tedjini , J.L. Carbonero
"Ecole d'hiver Francophone sur les Technologies de Conception des systèmes embarqués Hétérogènes", Jan 2007, France
Communication dans un congrès hal-00261818v1
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Choice of a high level fault model for the Optimization of Validation Test Set reused for Manufacturing Test

Yves Joannon , Vincent Beroulle , Chantal Robach , Smail Tedjini , Jean-Louis Carbonero
IMSTW'07, Jun 2007, Porto, Portugal. pp.66 - 71
Communication dans un congrès hal-00250422v1

Impact of Hardware Emulation on the verification quality improvement

Youssef Serrestou , Vincent Beroulle , Chantal Robach
Very Large Scale Integration, 2007. VLSI - SoC 2007. IFIP International Conference on, Oct 2007, Atlanta, United States. pp.218-223, ISBN: 978-1-4244-1710-0
Communication dans un congrès hal-00218169v1
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How to Implement an Asynchronous Test Wrapper for Network-on-Chip Nodes

Xuan Tu Tran , Jean Durupt , François Bertrand , Vincent Beroulle , Chantal Robach
The 12th IEEE European Test Symposium (ETS 2007), May 2007, Freiburg, Germany. pp.Tran07HTI
Communication dans un congrès hal-00166373v1
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Génération de vecteurs de test pour les systèmes analogiques mixtes et RF

Yves Joannon , Vincent Beroulle , Chantal Robach , Smail Tedjini , Jean-Louis Carbonero
Ecole d'hiver Francophone sur les Technologies de Conception des systèmes embarqués Hétérogènes (FETCH 2007), Jan 2007, Villard-de-Lans, France. pp.1
Communication dans un congrès hal-00250410v1
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Using of Behavioral level AMS & RF Simulation for Validation Test Set Optimization

Yves Joannon , Vincent Beroulle , Chantal Robach , Smail Tedjini , Jean-Louis Carbonero
WTW'07, May 2007, Berkeley, United States. pp.62-67
Communication dans un congrès hal-00250420v1
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Qualification of Behavioral Level Design Validation for AMS&RF SoCs

Yves Joannon , Vincent Beroulle , Chantal Robach , Smail Tedjini , Jean-Louis Carbonero
VLSI SOC'07, Oct 2007, Atlanta, United States. pp.100 - 106
Communication dans un congrès hal-00250426v1
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A DfT Architecture for Asynchronous Networks-on-Chip

Xuan Tu Tran , Jean Durupt , François Bertrand , Vincent Beroulle , Chantal Robach
The 11th IEEE European Test Symposium, May 2006, Southampton, United Kingdom. pp.219-224, ⟨10.1109/ETS.2006.3⟩
Communication dans un congrès hal-00142999v1

IP Validation using Genetic Algorithms guided by Mutation Testing

Youssef Serrestou , Vincent Beroulle , Chantal Robach
Conference on Design of Circuit and Integrated Systems, Nov 2006, Barcelone, Spain. pp.CD
Communication dans un congrès hal-00254467v1
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Qualification et génération de vecteurs pour la validation et le test de production de systèmes analogiques, mixtes et RF

Yves Joannon , Vincent Beroulle , Chantal Robach , Smail Tedjini , Jean-Louis Carbonero
GdR SoC-SiP, 2006, ¨Paris, France. pp.1
Communication dans un congrès hal-00250407v1

Qualification au niveau comportemental de stimuli pour la validation de conception de SoCs AMS&RF

V. Beroulle , Y. Joannon , J.L. Carbonero , S. Tedjini , Chantal Robach
Groupe de Recherche Test des SoC-SiP, Dec 2006, France
Communication dans un congrès hal-00261815v1
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Behavioral modeling of W-CDMA transceiver with VHDL-AMS language

Yves Joannon , Vincent Beroulle , Rami Khouri , Chantal Robach , Smail Tedjini
DDECS'06, Apr 2006, Prague, Czech Republic. pp.113 - 118
Communication dans un congrès hal-00250397v1

Modélisation comportementale d'un émetteur récepteur WCDMA en VHDL-AMS

Y. Joannon , V. Beroulle , R. Khouri , Chantal Robach , S. Tedjini
9e Journées Nationales du Réseau Doctoral en Microélectronique, May 2006, Rennes, France. pp.000
Communication dans un congrès hal-00261811v1

Behavorial modeling of WCDMA transceiver with VHDL-AMS language

Y. Joannon , V. Beroulle , R. Khouri , Chantal Robach , S. Tedjini
IEEE Workshop on Design and Diangostics of Electronic Circuits and Systems, 2006, Pragues, Czech Republic. pp.113-118
Communication dans un congrès hal-00261825v1

Design-for-Test of Asynchronous Networks-on-Chip

Xuan Tu Tran , Vincent Beroulle , Jean Durupt , Chantal Robach , François Bertrand
IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Apr 2006, Prague, Czech Republic. pp. 163-167
Communication dans un congrès hal-00218149v1
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Modélisation comportementale d'un émetteur récepteur W-CDMA en VHDL-AMS

Yves Joannon , Vincent Beroulle , Rami Khouri , Smail Tedjini , Chantal Robach
JNRDM'06, May 2006, Rennes, France. pp.1
Communication dans un congrès hal-00250399v1

How to Improve a set of design validation data by using mutation-based test

Youssef Serrestou , Chantal Robach , Vincent Beroulle
2006 IEEE Design and Diagnostics of Electronic Circuits and systems, Apr 2006, Prague, Czech Republic. pp.75-76
Communication dans un congrès hal-00254378v1
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Software-Based Testing of Sequential VHDL Descriptions

Mathieu Scholivé , Vincent Beroulle , Chantal Robach , Marie-Lise Flottes , Bruno Rouzeyre
8th IEEE European Test Workshop (ETW), May 2003, Maastricht, Netherlands. pp.199-200
Communication dans un congrès lirmm-00269437v1