Abdoulaye Gamatié
Présentation
Publications
Publications
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Design and Optimization of Solar-Powered Embedded Systems with Uppaal StrategoDATE 2026 - Design, Automation and Test in Europe Conference, Apr 2026, Verone, Italy |
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Run-time Energy-Efficiency Optimization for AI and HPC WorkloadsSC Workshops 2025 - Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis, Nov 2025, St Louis, MO, United States. pp.1970-1979, ⟨10.1145/3731599.3767560⟩ |
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Carbon-Neutral Computing at the Edge: Scalable Greedy—LP Optimization of Green Data CentersMCSoC 2025 - IEEE 18th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, Dec 2025, Singapour, Singapore. pp.678-685, ⟨10.1109/MCSoC67473.2025.00110⟩ |
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Pour un renouvellement durable des processeurs de calculComPAS 2024 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jul 2024, Nantes, France |
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Energy-efficient Hardware Reuse for Sustainable Data CentresEco-ES 2023 - Workshop on Eco-design and circular economy of Electronic Systems@DATE 2023, Apr 2023, Antwerp, Belgium |
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Towards Sustainable Low Carbon Emission Mini Data CentresComPAS 2023 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jul 2023, Annecy, France |
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A Generative AI for Heterogeneous Network-on-Chip Design Space PruningDATE 2022 - 25th Design, Automation and Test in Europe Conference and Exhibition, Mar 2022, Antwerp, Belgium. pp.1135-1138, ⟨10.23919/DATE54114.2022.9774721⟩ |
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Modeling and Analysis for Energy-Driven Computing using Statistical Model-CheckingDATE 2021 - 24th Design, Automation and Test in Europe Conference and Exhibition, Feb 2021, Grenoble (Virtual), France. pp.980-985, ⟨10.23919/DATE51398.2021.9474224⟩ |
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Highly-Adaptive Mixed-Precision MAC Unit for Smart and Low-Power Edge ComputingNEWCAS 2021 - 19th IEEE International New Circuits and Systems Conference, Jun 2021, Toulon (virtual), France. pp.1-4, ⟨10.1109/NEWCAS50681.2021.9462745⟩ |
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GANNoC: A Framework for Automatic Generation of NoC Topologies using Generative Adversarial NetworksRAPIDO 2021 - 13th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, Jan 2021, Budapest, Hungary. pp.51-58, ⟨10.1145/3444950.3447283⟩ |
L’impact énergétique des flux de données numériquesColloque Energie du CNRS, Cellule énergie du CNRS, Dec 2021, Paris, France |
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Online Learning for Dynamic Control of OpenMP WorkloadsMOCAST 2020 - 9th International Conference on Modern Circuits and Systems Technologies, Sep 2020, Bremen, Germany. ⟨10.1109/MOCAST49295.2020.9200292⟩ |
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Évaluation de deux architectures matérielles dédiées à l'inférence basée sur des réseaux de neurones convolutifsComPAS 2020 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jun 2020, Lyon, France |
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A Flexible Power Crossbar-based Architecture for Software-Defined Power DomainsEPE’20 ECCE Europe, Sep 2020, Lyon (virtual), France |
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Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on InputsSBESC 2020 - 10th Brazilian Symposium on Computing Systems Engineering, Nov 2020, Virtual, Brazil. ⟨10.1109/SBESC51047.2020.9277863⟩ |
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Versatile Software Framework for the Monitoring and Control of Distributed Computing SystemsEDiS 2020 - 2nd International Conference on Embedded & Distributed Systems, Apr 2020, Oran, Algeria. pp.117-122, ⟨10.1109/EDiS49545.2020.9296483⟩ |
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Energy-Efficient Machine Learning on FPGA for Edge Devices: a Case StudyComPAS 2020 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jun 2020, Lyon, France |
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Compiler-assisted adaptive program scheduling in big.LITTLE systemsPPoPP 2019 - 24th Symposium on Principles and Practice of Parallel Programming, Feb 2019, Washington, United States. pp.429-430, ⟨10.1145/3293883.3301493⟩ |
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Exploration of Energy-Proportional Distributed Systems13e Colloque National du GDR SoC², Jun 2019, Montpellier, France |
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Automatic Energy-Efficiency Monitoring of OpenMP WorkloadsReCoSoC 2019 - 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, Jul 2019, York, United Kingdom. pp.43-50, ⟨10.1109/ReCoSoC48741.2019.9034988⟩ |
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Compile-Time Silent-Store Elimination for Energy Efficiency: an Analytic Evaluation for Non-Volatile Cache MemoryRAPIDO: Rapid Simulation and Performance Evaluation, HiPEAC, Jan 2018, Manchester, United Kingdom. pp.1-8, ⟨10.1145/3180665.3180666⟩ |
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A Compiler-Centric Infra-Structure for Whole-Board Energy Measurement on Heterogeneous Android SystemsReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jul 2018, Lille, France. ⟨10.1109/ReCoSoC.2018.8449378⟩ |
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Performance and Energy Assessment of Last-Level Cache Replacement PoliciesEDiS: Embedded and Distributed Systems, Dec 2017, Oran, Algeria. ⟨10.1109/EDIS.2017.8284032⟩ |
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Improving the Performance of STT-MRAM LLC through Enhanced Cache Replacement PolicyARCS: Architecture of Computing Systems, Apr 2018, Braunschweig, Germany. pp.168-180, ⟨10.1007/978-3-319-77610-1_13⟩ |
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Using multifunctional standardized stack as universal spintronic technology for IoTDATE 2018 - 21st Design, Automation and Test in Europe Conference and Exhibition, Mar 2018, Dresden, Germany. pp.931-936, ⟨10.23919/DATE.2018.8342143⟩ |
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Evaluation of Heterogeneous Multicore Cluster Architectures Designed for Mobile ComputingReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jul 2018, Lille, France. ⟨10.1109/ReCoSoC.2018.8449376⟩ |
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Energy-Efficient Memory Mappings based on Partial WCET Analysis and Multi-Retention Time STT-RAMRTNS: Real-Time Networks and Systems, Oct 2018, Poitiers, France. pp.148-158, ⟨10.1145/3273905.3273908⟩ |
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How Could Compile-Time Program Analysis help Leveraging Emerging NVM Features?EDiS: Embedded and Distributed Systems, Dec 2017, Oran, Algeria. pp.1-6, ⟨10.1109/EDIS.2017.8284031⟩ |
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Partial Worst-Case Execution Time AnalysisComPAS 2018 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jul 2018, Toulouse, France |
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Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworksDATE 2018 - 21st Design, Automation and Test in Europe Conference and Exhibition, Mar 2018, Dresden, Germany. pp.103-108, ⟨10.23919/DATE.2018.8341987⟩ |
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Distributed and Dynamic Shared-Buffer Router for High-Performance InterconnectNOCS 2017 - 11th IEEE/ACM International Symposium on Networks-on-Chip, Oct 2017, Seoul, South Korea. pp.1-8, ⟨10.1145/3130218.3130223⟩ |
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Efficient Programming for Multicore Processor Heterogeneity: OpenMP versus OmpSsOpenSuCo, Jun 2017, Frankfurt, Germany |
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ElasticSimMATE: a Fast and Accurate gem5 Trace-Driven Simulator for Multicore SystemsReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jul 2017, Madrid, Spain. ⟨10.1109/ReCoSoC.2017.8016146⟩ |
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Embedded systems to high performance computing using STT-MRAMDATE 2017 - 20th Design, Automation and Test in Europe Conference and Exhibition, Mar 2017, Lausanne, Switzerland. pp.536-541, ⟨10.23919/DATE.2017.7927046⟩ |
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MAGPIE: System-level Evaluation of Manycore Systems with Emerging Memory TechnologiesEMS: Emerging Memory Solutions, Mar 2017, Lausanne, Switzerland |
Roundabout: A Network-on-Chip router with adaptive buffer sharingNEWCAS 2017 - 15th IEEE International New Circuits and Systems Conference, Jun 2017, Strasbourg, France. pp.65-68, ⟨10.1109/NEWCAS.2017.8010106⟩ |
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Scalable and Power-Efficient Implementation of an Asynchronous Router with Buffer SharingDSD 2017 - 20th Euromicro Conference on Digital System Design, Aug 2017, Vienna, Australia. pp.171-178, ⟨10.1109/DSD.2017.55⟩ |
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Design space exploration for complex automotive applications: an engine control system case studyRAPIDO: Rapid Simulation and Performance Evaluation, Jan 2016, Prague, Czech Republic. ⟨10.1145/2852339.2852341⟩ |
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Flot automatique d’évaluation pour l’exploration d’architectures à base de mémoires non volatilesComPAS 2016 - Conférence francophone d'informatique en Parallélisme, Architecture et Système, Jul 2016, Lorient, France |
Model-Based Design and Analysis of Automotive Applications on Multicore platforms: an Effective Approach
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OpenMP scheduling on ARM big.LITTLE architectureMULTIPROG 2016 - 9th International Workshop on Programmability and Architectures for Heterogeneous Multicores, HIPEAC, Jan 2016, Prague, Czech Republic |
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Speed and Accuracy Dilemma in NoC Simulation: What about Memory Impact?ReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jun 2016, Tallinn, Estonia |
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Loop Optimization in Presence of STT-MRAM Caches: a Study of Performance-Energy TradeoffsPATMOS: Power and Timing Modeling, Optimization and Simulation, Sep 2016, Bremen, Germany. pp.162-169, ⟨10.1109/PATMOS.2016.7833682⟩ |
Performance Prediction of Application Mapping in Manycore Systems with Artificial Neural NetworksMCSoC: Embedded Multicore/Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.185-192, ⟨10.1109/MCSoC.2016.17⟩ |
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Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy ExplorationMCSoC: Embedded Multicore/Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.201-208, ⟨10.1109/MCSoC.2016.20⟩ |
Dealing with Energy-Efficiency in Next-Generation Compute Systems
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A Workflow for Fast Evaluation of Mapping Heuristics Targeting Cloud InfrastructuresDREAMCloud: Dynamic Resource Allocation and Management in Embedded, High Performance and Cloud Computing, Jan 2016, Prague, Czech Republic |
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Potential Applications Based on NVM Emerging TechnologiesDATE 2015 - 18th Design, Automation and Test in Europe Conference and Exhibition, Mar 2015, Grenoble, France. pp.1012-1017, ⟨10.7873/DATE.2015.1120⟩ |
For a Design Continuum to Build Next Generation Energy-Efficient Compute NodesEDiS: Embedded and Distributed Systems, Nov 2015, Oran, Algeria |
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A trace-driven approach for fast and accurate simulation of manycore architecturesASP-DAC: Asia and South Pacific Design Automation Conference, Jan 2015, Chiba, Tokyo, Japan. pp.707-712, ⟨10.1109/ASPDAC.2015.7059093⟩ |
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An Integrated Framework for Model-Based Design and Analysis of Automotive Multi-Core SystemsFDL: Forum on specification & Design Languages, Sep 2015, Barcelona, Spain |
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Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE ArchitecturesISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.551-556, ⟨10.1109/ISVLSI.2015.28⟩ |
Discrete Control-Based Design of Adaptive and Autonomic Computing SystemsICDCIT: International Conference on Distributed Computing and Internet Technology, Feb 2015, Bhubaneswar, India. ⟨10.1007/978-3-319-14977-6_6⟩ |
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Emerging Non-volatile Memory Technologies Exploration Flow for Processor ArchitectureISVLSI 2015 - International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.460-465, ⟨10.1109/ISVLSI.2015.126⟩ |
On the Performance Exploration of 3D NoCs with Resistive-Open TSVsISVLSI 2015 - International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.579-584, ⟨10.1109/ISVLSI.2015.49⟩ |
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Performance exploration of partially connected 3D NoCs under manufacturing variabilityNEWCAS 2014 - 12th IEEE International New Circuits and Systems Conference, Jun 2014, Trois-Rivieres, QC, Canada. pp.61-64, ⟨10.1109/NEWCAS.2014.6933985⟩ |
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Abstract clock-based approaches in the programming, design and analysis of embedded systemsResearch school ER02, ENS Lyon, Jan 2014, Lyon, France |
Autonomic Management of Dynamically Partially Reconfigurable FPGA Architectures Using Discrete ControlICAC: International Conference on Autonomic Computing, Jun 2013, San Jose CA, United States |
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Discrete Control for Reconfigurable FPGA-based Embedded SystemsDCDS: Dependable Control of Discrete Systems, Sep 2013, York, United Kingdom |
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Transformation-based Exploration of Data-Parallel Architecture for Customizable Hardware: A JPEG Encoder Case StudyEuromicro Conference on Digital System Design (DSD 2012), Sep 2012, Cesme, Izmir, Turkey |
CLASSY: a clock analysis system for rapid prototyping of embedded applications on MPSoCsProceedings of the 15th International Workshop on Software and Compilers for Embedded Systems, May 2012, St. Goar, Germany. pp.3--12, ⟨10.1145/2236576.2236577⟩ |
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Design of streaming applications on MPSoCs using abstract clocksDesign, Automation & Test in Europe Conference & Exhibition (DATE), 2012, Mar 2012, Dresden, France. pp.763-768 |
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Design of Streaming Applications on MPSoCs using Abstract ClocksDesign, Automation and Test in Europe Conference (DATE'2012), Mar 2012, Dresden, Germany |
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Design Space Exploration in Application-Specific Hardware Synthesis for Multiple Communicating Nested LoopsInternational Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XII), Jul 2012, Samos, Greece |
Abstract Clocks for the DSE of Data-Intensive Applications on MPSoCs10th IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA), Jul 2012, Leganés, Madrid, Spain. pp.729 -736 |
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SMT based false causal loop detection during code synthesis from Polychronous specifications9th IEEE/ACM International Conference on Formal Methods and Models for Codesign (MEMOCODE), Jul 2011, Cambridge, United Kingdom. ⟨10.1109/MEMCOD.2011.5970517⟩ |
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Static analysis of synchronous programs in signal for efficient design of multi-clocked embedded systemsACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems, LCTES 2011, Apr 2011, Chicago, IL, United States. pp.71-80, ⟨10.1145/1967677.1967688⟩ |
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Safe Design of Dynamically Reconfigurable Embedded Systems2nd Workshop on Model Based Engineering for Embedded Systems Design (M-BED2011), Mar 2011, France. pp.00 -- 00 |
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Operational Semantics of the Marte Repetitive Structure Modeling Concepts for Data-Parallel Applications Design9th International Symposium on Parallel and Distributed Computing (ISPDC'2010), Jul 2010, Istanbul, Turkey |
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Architecture Exploration for Efficient Data Transfer and Storage in Data-Parallel ApplicationsEuro-Par - 16th International Euro-Par Conference - 2010, Aug 2010, Ischia, Italy. pp.101--116, ⟨10.1007/978-3-642-15277-1_11⟩ |
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Modeling of Configurations for Embedded System Implementations in MARTE1st workshop on Model Based Engineering for Embedded Systems Design - Design, Automation and Test in Europe (DATE 2010), Mar 2010, Dresden, Germany |
Correct and Energy-Efficient Design of SoCs: the H.264 Encoder Case StudyInternational Symposium on System-on-Chip (SoC'2010), Sep 2010, Tampere, Finland |
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A Generic Formal Model for RTOS: Synchronous Approach for Rapid Virtual Prototyping10th African Conference on Research in Computer Science and Applied Mathematics (CARI'2010), Oct 2010, Yamoussoukro, Côte d’Ivoire |
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Tutorial: Using the UML profile for MARTE to MPSoC co-design dedicated to signal processingColloque International Télécom'2009 & 6èmes JFMMA, Mar 2009, Agadir, Morocco |
A Case Study on Controller Synthesis for Data-Intensive Embedded SystemsInternational Conference on Embedded Software and Systems (ICESS), May 2009, Hangzhou, China. pp.75-82, ⟨10.1109/ICESS.2009.12⟩ |
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MARTE-based Design of a Multimedia Application and Formal AnalysisFDL 2008, Sep 2008, Stuttgart, Germany. pp.6 |
Using the UML Profile for MARTE to MPSoC Co-DesignFirst International Conference on Embedded Systems & Critical Applications (ICESCA'08), May 2008, Tunis, Tunisia |
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Vers des transformations d'applications à parallélisme de données en équations synchrones9ème édition de SYMPosium en Architectures nouvelles de machines, Oct 2006, Perpignan, France |
Synchronous Modeling of Data-Intensive ApplicationsInternational Open Workshop on Synchronous Programming (Synchron 2006), 2006, Alpe d'Huez, France |
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Polychronous mode automataEMSOFT '06, Oct 2006, Seoul, South Korea. pp.83-92, ⟨10.1145/1176887.1176900⟩ |
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Toward Static Analysis of SIGNAL Programs using Interval TechniquesSynchronous Languages, Applications, and Programming (SLAP 2006), Mar 2006, Vienna, Austria. pp.SLAP 2006 |
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Conception synchrone d'applications avioniques par raffinement de modèles13th INTERNATIONAL CONFERENCE ON REAL-TIME SYSTEMS, Apr 2005, Paris, France. pp.00 -- 00 |
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An Example of Synchronous Design of Embedded Real-Time Systems based on IMA10th International Conference on Real-time and Embedded Computing Systems and Applications (RTCSA 2004), Aug 2004, Gothenburg, Sweden. pp.RTCSA 2004 |
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A Behavioral Type Inference System for Compositional System-on-Chip DesignFourth International Conference on Application of Concurrency to System Design (ACSD'04), Jun 2004, Hamilton, Ontario, Canada. pp.47-56, ⟨10.1109/CSD.2004.1309115⟩ |
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The SIGNAL Approach to the Design of System Architectures10th IEEE International Conference and Workshop on the Engineering of Computer-Based Systems (ECBS'03), Apr 2003, Huntsville, Alabama, United States. pp.80-88, ⟨10.1109/ECBS.2003.1194786⟩ |
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Synchronous modeling of avionics applications using the SIGNAL language9th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2003), May 2003, Toronto, Canada. pp.144-151, ⟨10.1109/RTTAS.2003.1203046⟩ |
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A Scalable Two-Step Approach to Optimize Data and Energy Migrations in Mini Data Centers for Carbon-Neutral ComputingDAC 2025 - Design Automation Conference, Jun 2025, Moscone West, San Francisco, United States |
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Energy-Efficiency Metric for Real-Time Monitoring of OpenMP Programs Executing on Multicore Systems13e Colloque National du GDR SoC², Jun 2019, Montpellier, France |
Multithreading for Compute Accelerators Through Distributed Shared Memory DesignDAC: Design Automation Conference, Jun 2014, San Francisco, United States. IEEE Design Automation Conference, 2014, Work-in-Progress Session |
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Computing in Research and Development in AfricaAbdoulaye Gamatié. Springer International Publishing Switzerland, 1, 2015, 978-3-319-08238-7 (Print) 978-3-319-08239-4 (Online). ⟨10.1007/978-3-319-08239-4⟩ |
Modélisation des systèmes réactifs MSR 2011Abdoulaye Gamatié and Étienne Craye. Lavoisier, 45/1-3, pp.268, 2011, Journal Européen des Systèmes Automatisés |
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Designing Embedded Systems with the SIGNAL Programming Language: Synchronous, Reactive SpecificationSpringer, New York, pp.260, 2009, 978-1-4419-0940-4 |
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Models for Co-Design of Heterogeneous Dynamically Reconfigurable SoCsNicolescu, Gabriela; O'Connor, Ian; Piguet, Christian. Heterogeneous Embedded Systems - Design Theory and Practice, Springer, 26 p., 2012 |
Design Space Exploration for Efficient Data Intensive Computing on SoCsBorko Furht and Armando Escalante. Handbook of Data Intensive Computing, Springer, 2011 |
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Specification of Data Intensive Applications with Data Dependency and Abstract ClocksBorko Furht and Armando Escalante. Handbook of Data Intensive Computing, Springer, 2011 |
Data Processing System with Energy TransferFrance, Patent n° : FR20160053238. 2016 |
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Modélisation polychrone et évaluation de systèmes temps réelSystèmes embarqués. Université Rennes 1, 2004. Français. ⟨NNT : ⟩ |
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Design and Analysis for Multi-Clock and Data-Intensive Applications on Multiprocessor Systems-on-ChipEmbedded Systems. Université des Sciences et Technologie de Lille - Lille I, 2012 |