Arnaud TISSERAND
Publications
Publications
Electrical Activity in Arithmetic Operations vs SecurityRAIM Meeting 2025: 16th Rencontres de l'Arithmétique en Informatique Mathématique, Nov 2025, Lyon, France |
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Arithmetic and Functional ActivityWRACH: Workshop on Randomness and Arithmetics for Cryptographic Hardware, Apr 2025, Roscoff, France |
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Arithmetic for Crypto in FPGA: HDL or HLS?WRACH : Workshop on Randomness and Arithmetics for Cryptographic Hardware, Jun 2023, Roscoff, France |
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A RISC-V Instruction Set Extension for Flexible Hardware/Software Protection of Cryptosystems Masked at High Orders66th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2023) "Reinventing Microelectronics", Aug 2023, Phoenix, AZ, United States |
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Using Hierarchical Approach to Speed-up RNS Base Extensions in Homomorphic Encryption ContextARITH: 2023 IEEE 30th International Symposium on Computer Arithmetic, Sep 2023, Portland, Oregon, United States |
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Processor Extensions for Hardware Instruction Replay against Fault Injection AttacksDDECS: 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2022, Prague, Czech Republic |
High-Level Synthesis for Hardware Implementation of Cryptography: Experience FeedbackJournées nationales du GDR Sécurité Informatique, Jun 2022, Paris, France |
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Experience Feedback on HLS Implementation of LWE PQC on FPGASécurité et intégrité des systèmes (GDR Sécu & SoC2), Nov 2021, Rennes, France |
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Hierarchical Approach in RNS Base Extension for Asymmetric CryptographyARITH: 2019 IEEE 26th Symposium on Computer Arithmetic, Jun 2019, Kyoto, Japan |
Hardware-Software Co-Design for Security: ECC Processor ExampleWorkshop on the Security of Software / Hardware Interfaces, Nov 2019, Rennes, France |
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FPGA Implementation and Comparison of Protections against SCAs for RLWE20th International Conference on Cryptology in India, Dec 2019, Hyderabad, India |
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Comparaison d'algorithmes de réduction modulaire en HLS sur FPGACompas: Conférence d'informatique en Parallélisme, Architecture et Système, Jun 2019, Anglet, France |
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Evaluation of Variable Bit-Width Units in a RISC-V Processor for Approximate ComputingCF'19: Proceedings of the 16th ACM International Conference on Computing Frontiers, Apr 2019, Alghero, Sardinia, Italy. ⟨10.1145/3310273.3323159⟩ |
Protection of Arithmetic Circuits against Physical Attacks30 ans du LIP, Nov 2018, Lyon, France. https://30anslip.sciencesconf.org/ |
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Microcontroller Implementation of Simultaneous Protections Against Observation and Perturbation Attacks for ECCSECRYPT: 15th International Conference on Security and Cryptography, Jul 2018, Porto, Portugal. pp.1-8, ⟨10.5220/0006884605700577⟩ |
Introduction to Physical AttacksJournée Captronic: La sécurité de l’objet connecté, Oct 2018, Nantes, France |
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Evaluation of Approximate Operators Case Study: Sobel Filter Application Executed on an Approximate RISC-V PlatformSAMOS: 18th International Conference on Embedded Computer Systems: Architectures, Modeling and Simlation, Jul 2018, Pythagorion, Greece. pp.146-149 |
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Hardware Architectures for HECCCryptArchi 2017: 15th International Workshops on Cryptographic architectures embedded in logic devices , Jun 2017, Smolenice, Slovakia |
An Efficient Framework for Design and Assessment of Arithmetic Operators with Reduced-Precision RedundancyConference on Design and Architectures for Signal and Image Processing (DASIP), Sep 2017, Dresden, Germany |
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Hardware Architectures Exploration for Hyper-Elliptic Curve CryptographyCrypto'Puces 2017- 6ème rencontre Crypto'Puces, du composant au système communicant embarqué, May 2017, Porquerolles, France. pp.31 |
ECC Protections against both Observation and Pertubation AttacksCryptArchi 2017: 15th International Workshops on Cryptographic architectures embedded in logic devices , Jun 2017, Smolenice, Slovakia |
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Power Consumption Analysis and Hardware Security"Risques, Société et Sécurité" (R2S). "Journée Thématique Consommation d'énergie dans les systèmes reconfigurables', Dec 2017, Cergy, France |
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Architecture level Optimizations for Kummer based HECC on FPGAsIndoCrypt 2017 - 18th International Conference on Cryptology in India, Dec 2017, Chennai, India. pp.44-64, ⟨10.1007/978-3-319-71667-1_3⟩ |
Hardware Support for Physical SecurityCRiSIS: 12th International Conference on Risks and Security of Internet and Systems, Sep 2017, Dinard, France |
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Hyper-Threaded Multiplier for HECCAsilomar Conference on Signals, Systems, and Computers, Oct 2017, Pacific Grove, CA, United States |
Embedding Crypto in SoCs: Threats and ProtectionsXIIème Colloque du GDR SoC-SiP, Jun 2017, Bordeaux, France. http://www.colloque2017-gdrsoc2.org/ |
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Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithmInternational Conference on Field-Programmable Technology (FPT), Dec 2016, Xi’an, China. ⟨10.1109/FPT.2016.7929535⟩ |
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Hybrid Position-Residues Number SystemARITH: 23rd Symposium on Computer Arithmetic, Jul 2016, Santa Clara, CA, United States |
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Asynchronous Charge Sharing Power Consistent Montgomery MultiplierASYNC: 21st IEEE International Symposium on Asynchronous Circuits and Systems, May 2015, Mountain View, Silicon Valley California, United States |
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Comparaison expérimentale d'architectures de crypto-processeurs pour courbes elliptiques et hyper-elliptiquesCompas: Conférence d’informatique en Parallélisme, Architecture et Système, Jun 2015, Lille, France |
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Full Hardware Implementation of Short Addition Chains Recoding for ECC Scalar MultiplicationCompas: Conférence d’informatique en Parallélisme, Architecture et Système, Jun 2015, Lille, France |
Fast Prototyping of a New Reconfigurable Architecture : Toward Tailored Space FPGAConférence d’informatique en Parallélisme, Architecture et Système (Compas), Jun 2015, Villeneuve d'Ascq, France. pp.10 |
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Small FPGA based Multiplication-Inversion Unit for Normal Basis Representation in $GF(2^m)$ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France |
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Fast and Secure Finite Field MultipliersDSD: Euromicro Conference on Digital System Design, Aug 2015, Funchal, Portugal. ⟨10.1109/DSD.2015.46⟩ |
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Single Base Modular Multiplication for Efficient Hardware RNS Implementations of ECCCHES: 17th International Workshop on Cryptographic Hardware and Embedded Systems, Sep 2015, Saint-Malo, France. pp.123-140, ⟨10.1007/978-3-662-48324-4_7⟩ |
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Exploration of Polynomial Multiplication Algorithms for Homomorphic Encryption SchemesInternational Conference on Reconfigurable Computing and FPGAs (ReConFig), Dec 2015, Cancun, Mexico. ⟨10.1109/ReConFig.2015.7393307⟩ |
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Hardware Accelerators for ECC and HECCECC: 19th Workshop on Elliptic Curve Cryptography, Sep 2015, Bordeaux, France |
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Hardware/Software Support for Securing Virtualization in Embedded Systems1st Symposium on Digital Trust in Auvergne, Dec 2014, Clermont-Ferrand, France |
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RNS Modular Multiplication through Reduced Base ExtensionsASAP - 25th IEEE International Conference on Application-specific Systems, Architectures and Processors, Jun 2014, Zurich, Switzerland. pp.57-62, ⟨10.1109/ASAP.2014.6868631⟩ |
Robust Sub-Powered Asynchronous LogicPATMOS - International Workshop on Power And Timing Modeling, Optimization and Simulation, Sep 2014, Palma de Mallorca, Spain. ⟨10.1109/PATMOS.2014.6951863⟩ |
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On-the-Fly Multi-Base Recoding for ECC Scalar Multiplication without Pre-ComputationsARITH - 21st IEEE International Symposium on Computer Arithmetic, Apr 2013, Austin, TX, United States. pp.219-228, ⟨10.1109/ARITH.2013.17⟩ |
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Improving Modular Inversion in RNS using the Plus-Minus MethodCHES - 15th Workshop on Cryptographic Hardware and Embedded Systems - 2013, Aug 2013, Santa Barbara, United States. pp.233-249, ⟨10.1007/978-3-642-40349-1_14⟩ |
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Opérateur matériel de tests de divisibilité par des petites constantes sur de très grands entiersComPAS'13 / SympA'15 - Symposium en Architectures nouvelles de machines, Jan 2013, Grenoble, France |
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Crypto-processeur ECC en RNS sur FPGA avec inversion modulaire rapideColloque national du GDR SoC-SiP - 2013, Jun 2013, Lyon, France |
Circuits for True Random Number Generation with On-Line Quality MonitoringRencontres Arithmetique de l'Informatique Mathématique, Jun 2012, Dijon, France |
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GF(2^m) Finite-Field Multipliers with Reduced Activity VariationsWAIFI - 4th International Workshop on Arithmetic of Finite Fields, Jul 2012, Bochum, Germany. pp.152-167, ⟨10.1007/978-3-642-31662-3_11⟩ |
Analysis of GF(2^233) Multipliers Regarding Elliptic Curve Cryptosystem ApplicationsPDeS - 11th IFAC/IEEE International Conference on Programmable Devices and Embedded Systems, May 2012, Brno, Czech Republic. pp.252-257, ⟨10.3182/20120523-3-CZ-3015.00052⟩ |
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A Comparison on FPGA of Modular Multipliers Suitable for Elliptic Curve Cryptography over GF(p) for Specific p Values21st International Conference on Field Programmable Logic and Applications (FPL), Sep 2011, Chania, Greece. pp.273-276, ⟨10.1109/FPL.2011.55⟩ |
Hardware Random Recoding: Redundant Representations of Numbers, Side Channel Analysis, Elliptic Curve CryptographyJournées "Codage et Cryptographie", Apr 2011, St Pierre d'Oléron, France |
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Multiplication in GF(2^m): area and time dependency/efficiency/complexity analysis10th International IFAC Workshop on Programmable Devices and Embedded Systems (PDeS), Oct 2010, Pszczyna, Poland |
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Arithmetic Level Countermeasures for ECC CoprocessorClaude Shannon Institute Workshop onCoding & Cryptography, May 2010, Cork, Ireland |
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Hardware implementation of DBNS recoding for ECC processor44rd Asilomar Conference on Signals, Systems and Computers, Nov 2010, Pacific Grove, California, United States. pp.1129-1133, ⟨10.1109/ACSSC.2010.5757580⟩ |
Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC14th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN), Sep 2010, Lyon, France |
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Low-Power Arithmetic Operators8ème journées d'études Faible Tension Faible Consommation, Jun 2009, Neuchâtel, Switzerland |
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Opérateurs arithmétiques sécurisésRAIM: 3ème Rencontres Arithmétique de l'Informatique Mathématique, Oct 2009, Lyon, France |
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Arithmetic operators for on-the-fly evaluation of TRNGsAdvanced Signal Processing Algorithms, Architectures and Implementations XVIII, Aug 2009, San Diego, United States. ⟨10.1117/12.826336⟩ |
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Power Consumption of GPUs from a Software Perspective9th International Conference on Computational Science, May 2009, Baton Rouge, Louisiana, United States. pp.914-923, ⟨10.1007/978-3-642-01970-8_92⟩ |
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Comparison of Modular Arithmetic Algorithms on GPUsParCo'09: International Conference on Parallel Computing, France. pp.N/A |
Function Approximation based on Estimated Arithmetic Operators43th Asilomar Conference on Signals, Systems and Computers, Oct 2009, Pacific Grove, California, United States |
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Redundant Number Systems for Reconfigurable Arithmetic Units7th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices, Jun 2009, Prague, Czech Republic |
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Error Detection for Borrow-Save Adders Dedicated to ECC UnitFDTC 2008 - 5th Workshop on Fault Diagnosis and Tolerance in Cryptography, Aug 2008, Washington, DC, United States. pp.77-86, ⟨10.1109/FDTC.2008.17⟩ |
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Fast and Accurate Activity Evaluation in Multipliers42th Asilomar Conference on Signals, Systems and Computers, Oct 2008, Pacific Grove, CA, United States. pp.757-761, ⟨10.1109/ACSSC.2008.5074510⟩ |
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Hardware Reciprocation using Degree-3 Polynomials but Only 1 Complete MultiplicationMWCAS/NEWCAS'07: 50th Internationall Midwest Symposium on Circuits & Systems/5th International Northeast Workshop on Circuits & Systems, Aug 2007, Montréal, Canada, pp.1-4, ⟨10.1109/MWSCAS.2007.4488593⟩ |
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SPA Resistant Elliptic Curve Cryptosystem using Addition ChainsITNG'07: 4th International Conference on Information Technology, Apr 2007, Las Vegas, Nevada, U.S.A., pp.995-1000, ⟨10.1109/ITNG.2007.185⟩ |
A Library for Prototyping the Computer Arithmetic Level in Elliptic Curve CryptographyAdvanced Signal Processing Algorithms, Architectures and Implementations XVII, Aug 2007, San Diego, California, United States. pp.1-9 (66970N), ⟨10.1117/12.733652⟩ |
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Amélioration de la sécurité des circuits intégrés par codage de l'informationJNRDM'07: 10ème Journées Nationales du Réseau Doctoral en Microélectronique, Lille, France |
Estimation rapide de l'activité parasite pour l'optimisation des arbres de réduction de multiplieursFTFC'07: 6ièmes Journées d'Etudes Faible Tension Faible Consommation, May 2007, Paris (France), pp.127-130 |
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Optimisation d'opérateurs arithmétiques matériels à base d'approximations polynomialesSYMPA'06 : 11ième SYMPosium en Architectures nouvelles de machines, Oct 2006, Perpignan (France), pp.130-141 |
New Identities and Transformations for Hardware Power OperatorsAdvanced Signal Processing Algorithms, Architectures and Implementations XVI, Aug 2006, San Diego, California, U.S.A., pp.1-10 (631307), ⟨10.1117/12.676244⟩ |
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Carry Prediction and Selection for Truncated MultiplicationSiPS'06: Workshop on Signal Processing Systems, Oct 2006, Banff, Canada, pp.339-344 |
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Multi-mode Operator for SHA-2 Hash FunctionsERSA: Engineering of Reconfigurable Systems and Algorithms, Jun 2006, Las Vegas, NV, United States. pp.207-210 |
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Automatic Generation of Low-Power Circuits for the Evaluation of Polynomials40th Asilomar Conference on Signals, Systems and Computers, Oct 2006, Pacific Grove, CA (USA), pp.2053-2057, ⟨10.1109/ACSSC.2006.355128⟩ |
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Hardware Operator for Simultaneous Sine and Cosine EvaluationICASSP'06: International Conference on Acoustics, Speech and Signal Processing, May 2006, Toulouse, France, pp.992-995, ⟨10.1109/ICASSP.2006.1660823⟩ |
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Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation TimeCCECE'06: Canadian Conference on Electrical and Computer Engineering, May 2006, pp.908-912, ⟨10.1109/CCECE.2006.277332⟩ |
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Function Evaluation on FPGAs using On-Line Arithmetic Polynomial ApproximationNEWCAS'06: 4th International Northeast Workshop on Circuits and Systems, Jun 2006, Gatineau, Canada. pp.21-24, ⟨10.1109/NEWCAS.2006.250959⟩ |
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Simple Seed Architectures for Reciprocal and Square-Root Reciprocal39th Asilomar Conference on Signals, Systems and Computers, Oct 2005, Pacific Grove, California, United States. pp.1167-1171 |
Comparison of Modular Multipliers on FPGAsAdvanced Signal Processing Algorithms, Architectures, and Implementations XVIII, Aug 2003, San Diego, United States. pp.490-498 |
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Evolvable platform for array processing: a one-chip approachMicroNeuro, Apr 1999, Granada, Spain, France |
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Field Programmable Processor ArraysICES, 1998, none, France. 12 p |
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Hardware Level Simulations of Fault Detection in RNS AcceleratorBITFLIP 2025, Nov 2025, Rennes, France. |
Finite Field Multiplier Architectures for Hyper-Elliptic Curve CryptographyColloque National du GDR SOC2, Jun 2017, Bordeaux, France. |
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Accurate Modeling of Fault Impact in Arithmetic CircuitsDASIP: Conference on Design and Architectures for Signal and Image Processing (Demo Night), Oct 2016, Rennes, France. , 2016 |
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Plateforme matérielle–logicielle à bas coût pour l'émulation de fautesColloque du GDR SoC-SiP, Jun 2016, Nantes, France. |
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Hardware and Arithmetic for Hyperelliptic Curves CryptographyCominLabs Days 2016, Nov 2016, Rennes, France. , 2016 |
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RNS Modular Computations for Cryptographic ApplicationsRAIM: 7ème Rencontre Arithmétique de l'Informatique Mathématique, Apr 2015, Rennes, France. , 2015 |
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Hardware and Arithmetic for Hyperelliptic Curves CryptographyRAIM: 7ème Rencontre Arithmétique de l'Informatique Mathématique, Apr 2015, Rennes, France. , 2015 |
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Introduction to the Special Section on Computer ArithmeticIEEE Transactions on Computers, 66 (12), pp.1991-1993, 2017, ⟨10.1109/TC.2017.2761278⟩ |
Proceedings of IEEE 22nd Symposium on Computer ArithmeticMuller, Jean-Michel; Tisserand, Arnaud; Villalba Moreno, Julio. IEEE, 2015, ⟨10.1109/ARITH.2015.1⟩ |
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Architecture des ordinateursLoïc Lagadec and Sébastien Pillement and Arnaud Tisserand. Hermes, 32, pp.150, 2013, Technique et science informatique, 9782746245679 |
Architectures reconfigurables FPGATechniques de l'Ingénieur. Technologies logicielles Architectures des systèmes, H 1 196, Techniques de l'Ingénieur, pp.1-22, 2012 |
Introduction to the Residue Number System (RNS)2025 |
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Cybersécurité et puces électroniques2019 |
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Logiciel libre : des principes à la pratique2019 |
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Introduction to Computer Arithmetic for Efficient Hardware Implementations2019, http://iramis.cea.fr/spec/Phocea/Vie_des_labos/Seminaires/index.php?type=10&y=2019 |
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Cybersécurité, attaques et protections des puces électroniques2017, https://armorscience.wordpress.com/conferences-et-cafes-science/annee-2016-2017/la-cybersecurite/ |
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Amélioration de la sécurité des circuits intégrés par codage de l'information2007 |
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Adéquation arithmétique architecture, problèmes et étude de casInformatique [cs]. Ecole normale supérieure de lyon - ENS LYON, 1997. Français. ⟨NNT : ⟩ |
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Étude et conception d'opérateurs arithmétiquesInformatique [cs]. Université Rennes 1, 2010 |
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Plateforme matérielle–logicielle d'émulation de fautes pour des opérateurs arithmétiquesCompas 2016 : Conférence d’informatique en Parallélisme, Architecture et Système, Jul 2016, Lorient, France. , pp.8 |
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Experimental Comparison of Crypto-processors Architectures for Elliptic and Hyper-Elliptic Curves CryptographyCryptArchi: 13th International Workshops on Cryptographic Architectures Embedded in Reconfigurable Devices, Jun 2015, Leuven, Belgium. |
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Circuits for True Random Number Generation with On-Line Quality MonitoringClaude Shannon Institut Workshop on Coding and Cryptography, Apr 2011, Cork, Ireland |