Arnaud TISSERAND

136
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Publications

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Lattice-based Cryptosystems on FPGA: Parallelization and Comparison using HLS

Timo Zijlstra , Karim Bigou , Arnaud Tisserand

IEEE Transactions on Computers, 2021, ⟨10.1109/TC.2021.3112052⟩

Article dans une revue hal-03347174v1
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Generation of Finely-Pipelined GF(P ) Multipliers for Flexible Curve based Cryptography on FPGAs

Gabriel Gallin , Arnaud Tisserand

IEEE Transactions on Computers, 2019, 68 (11), pp.1612-1622. ⟨10.1109/TC.2019.2920352⟩

Article dans une revue hal-02141260v1
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Computation of 2D 8x8 DCT Based on the Loeffler Factorization Using Algebraic Integer Encoding

Diego F. G. Coelho , Sushmabhargavi Nimmalapalli , Vassil Dimitrov , Arjuna Madanayake , Renato J. Cintra et al.

IEEE Transactions on Computers, 2018, 67 (12), pp.1692-1702. ⟨10.1109/TC.2018.2837755⟩

Article dans une revue hal-01797957v1

Hardware/Software co-Design of an Accelerator for FV Homomorphic Encryption Scheme using Karatsuba Algorithm

Vincent Migliore , Maria Mendez Real , Vianney Lapotre , Arnaud Tisserand , Caroline Fontaine et al.

IEEE Transactions on Computers, 2018, 67 (3), pp.335-347. ⟨10.1109/TC.2016.2645204⟩

Article dans une revue hal-01427639v1
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A High-Speed Accelerator for Homomorphic Encryption using the Karatsuba Algorithm

Vincent Migliore , Cédric Seguin , Maria Méndez Real , Vianney Lapotre , Arnaud Tisserand et al.

ACM Transactions on Embedded Computing Systems (TECS), 2017, 16 (5s), ⟨10.1145/3126558⟩

Article dans une revue hal-01630065v1
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Binary-Ternary Plus-Minus Modular Inversion in RNS

Karim Bigou , Arnaud Tisserand

IEEE Transactions on Computers, 2016, 65 (11), pp.3495-3501. ⟨10.1109/TC.2016.2529625⟩

Article dans une revue hal-01314268v1

Towards FHE in Embedded Systems: A Preliminary Co-Design Space Exploration of a HW/SW Very Large Multiplier

Abozaid Ghada , Arnaud Tisserand , El-Mahdy Ahmed , Wada Yasutaka

IEEE Embedded Systems Letters, 2015, 7 (3), ⟨10.1109/LES.2015.2436372⟩

Article dans une revue hal-01227724v1

Circuits électroniques pour la génération de nombres aléatoires

Arnaud Tisserand

Techniques de l'Ingénieur, 2014, H5215

Article dans une revue hal-01061471v1

Analiza algorytmow mnozenia w ciele GF(2^m)

Danuta Pamula , Edward Hrynkiewicz , Arnaud Tisserand

Pomiary, Automatyka, Kontrola = Measurement, Automation and Monitoring , 2011, 57 (1), pp.58-60

Article dans une revue inria-00576320v1

Optimisation d'opérateurs arithmétiques matériels à base d'approximations polynomiales

Romain Michard , Arnaud Tisserand , Nicolas Veyrat-Charvillon

Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, 2008, 27 (6), pp.699-718. ⟨10.3166/tsi.27.699-718⟩

Article dans une revue istex lirmm-00325689v1
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High-Performance Hardware Operators for Polynomial Evaluation

Arnaud Tisserand

International Journal of High Performance Systems Architecture (IJHPSA), 2007, 1 (1), pp.14-23. ⟨10.1504/IJHPSA.2007.013288⟩

Article dans une revue lirmm-00140930v1

Introduction aux représentations des nombres et opérateurs arithmétiques à basse consommation d'énergie

Arnaud Tisserand

Revue des Sciences et Technologies de l'Information - Série TSI : Technique et Science Informatiques, 2007, 26 (5), pp.639-646. ⟨10.3166/tsi.26.639-646⟩

Article dans une revue istex lirmm-00156037v1
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Multi-Mode Operator for SHA-2 Hash Functions

Ryan Glabb , Laurent Imbert , Graham A. Jullien , Arnaud Tisserand , Nicolas Veyrat-Charvillon

Journal of Systems Architecture, 2007, Special Issue on Embedded Hardware for Cryptosystems, 52 (2-3), pp.127-138. ⟨10.1016/j.sysarc.2006.09.006⟩

Article dans une revue lirmm-00126262v1
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SPA Resistant Elliptic Curve Cryptosystem Using Addition Chains

Andrew Byrne , Francis Crowe , William P. Marnane , Nicolas Méloni , Arnaud Tisserand et al.

International Journal of High Performance Systems Architecture (IJHPSA), 2007, 1 (2), pp.133-142. ⟨10.1504/IJHPSA.2007.015399⟩

Article dans une revue lirmm-00176433v1
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Comparison of Simple Power Analysis Attack Resistant Algorithms for an Elliptic Curve Cryptosystem

Andrew Byrne , Nicolas Méloni , Arnaud Tisserand , Emanuel Popovici , William P. Marnane

Journal of Computers (JCP), 2007, 2 (10), pp.52-62. ⟨10.4304/jcp.2.10.52-62⟩

Article dans une revue lirmm-00174648v1
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Hardware operators for function evaluation using sparse-coefficient polynomials

Jean-Michel Muller , Arnaud Tisserand , Serge Torres , Nicolas Brisebarre

Electronics Letters, 2006, 42 (25), pp.1441-1442. ⟨10.1049/el:20062373⟩

Article dans une revue lirmm-00125483v2
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Computing machine-efficient polynomial approximations

Jean-Michel Muller , Nicolas Brisebarre , Arnaud Tisserand

ACM Transactions on Mathematical Software, 2006, 32 (2), pp.236-256. ⟨10.1145/1141885.1141890⟩

Article dans une revue ensl-00086826v1
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Some Optimizations of Hardware Multiplication by Constant Matrices

Nicolas Boullis , Arnaud Tisserand

IEEE Transactions on Computers, 2005, 54 (10), pp.1271-1282. ⟨10.1109/TC.2005.168⟩

Article dans une revue lirmm-00113092v1
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Multipartite table methods

Florent de Dinechin , Arnaud Tisserand

IEEE Transactions on Computers, 2005, 54 (3), pp.319-330

Article dans une revue ensl-00542210v1

MLP computing and learning on FPGA using on-line arithmetic

Bernard Girau , Arnaud Tisserand

International Journal on System Research and Information Science, 1999, 21 p

Article dans une revue inria-00108064v1

Electrical Activity in Arithmetic Operations vs Security

Arnaud Tisserand

RAIM Meeting 2025: 16th Rencontres de l'Arithmétique en Informatique Mathématique, Nov 2025, Lyon, France

Communication dans un congrès hal-05347564v1

Arithmetic and Functional Activity

Arnaud Tisserand

WRACH: Workshop on Randomness and Arithmetics for Cryptographic Hardware, Apr 2025, Roscoff, France

Communication dans un congrès hal-05046198v1

Arithmetic for Crypto in FPGA: HDL or HLS?

Arnaud Tisserand

WRACH : Workshop on Randomness and Arithmetics for Cryptographic Hardware, Jun 2023, Roscoff, France

Communication dans un congrès hal-04126074v1
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A RISC-V Instruction Set Extension for Flexible Hardware/Software Protection of Cryptosystems Masked at High Orders

Fabrice Lozachmeur , Arnaud Tisserand

66th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2023) "Reinventing Microelectronics", Aug 2023, Phoenix, AZ, United States

Communication dans un congrès hal-04132900v1
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Using Hierarchical Approach to Speed-up RNS Base Extensions in Homomorphic Encryption Context

Morgane Vollmer , Karim Bigou , Arnaud Tisserand

ARITH: 2023 IEEE 30th International Symposium on Computer Arithmetic, Sep 2023, Portland, Oregon, United States

Communication dans un congrès hal-04206377v1
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Processor Extensions for Hardware Instruction Replay against Fault Injection Attacks

Noura Ait Manssour , Vianney Lapotre , Gogniat Guy , Arnaud Tisserand

DDECS: 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2022, Prague, Czech Republic

Communication dans un congrès hal-03599317v1

High-Level Synthesis for Hardware Implementation of Cryptography: Experience Feedback

Arnaud Tisserand

Journées nationales du GDR Sécurité Informatique, Jun 2022, Paris, France

Communication dans un congrès hal-03706731v1

Experience Feedback on HLS Implementation of LWE PQC on FPGA

Arnaud Tisserand

Sécurité et intégrité des systèmes (GDR Sécu & SoC2), Nov 2021, Rennes, France

Communication dans un congrès hal-03428621v1
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Hierarchical Approach in RNS Base Extension for Asymmetric Cryptography

Libey Djath , Karim Bigou , Arnaud Tisserand

ARITH: 2019 IEEE 26th Symposium on Computer Arithmetic, Jun 2019, Kyoto, Japan

Communication dans un congrès hal-02096353v1

Hardware-Software Co-Design for Security: ECC Processor Example

Arnaud Tisserand

Workshop on the Security of Software / Hardware Interfaces, Nov 2019, Rennes, France

Communication dans un congrès hal-02374396v1
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FPGA Implementation and Comparison of Protections against SCAs for RLWE

Timo Zijlstra , Karim Bigou , Arnaud Tisserand

20th International Conference on Cryptology in India, Dec 2019, Hyderabad, India

Communication dans un congrès hal-02309481v1
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Comparaison d'algorithmes de réduction modulaire en HLS sur FPGA

Libey Djath , Timo Zijlstra , Karim Bigou , Arnaud Tisserand

Compas: Conférence d'informatique en Parallélisme, Architecture et Système, Jun 2019, Anglet, France

Communication dans un congrès hal-02129095v1
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Evaluation of Variable Bit-Width Units in a RISC-V Processor for Approximate Computing

Geneviève Ndour , Tiago Trevisan Jost , Anca Molnos , Yves Durand , Arnaud Tisserand

CF'19: Proceedings of the 16th ACM International Conference on Computing Frontiers, Apr 2019, Alghero, Sardinia, Italy. ⟨10.1145/3310273.3323159⟩

Communication dans un congrès hal-02152410v1

Protection of Arithmetic Circuits against Physical Attacks

Arnaud Tisserand

30 ans du LIP, Nov 2018, Lyon, France. https://30anslip.sciencesconf.org/

Communication dans un congrès hal-01918194v1
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Microcontroller Implementation of Simultaneous Protections Against Observation and Perturbation Attacks for ECC

Audrey Lucas , Arnaud Tisserand

SECRYPT: 15th International Conference on Security and Cryptography, Jul 2018, Porto, Portugal. pp.1-8, ⟨10.5220/0006884605700577⟩

Communication dans un congrès hal-01826303v1

Introduction to Physical Attacks

Arnaud Tisserand

Journée Captronic: La sécurité de l’objet connecté, Oct 2018, Nantes, France

Communication dans un congrès hal-01918198v1
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Evaluation of Approximate Operators Case Study: Sobel Filter Application Executed on an Approximate RISC-V Platform

Geneviève Ndour , Tiago Trevisan Jost , Anca Molnos , Yves Durand , Arnaud Tisserand

SAMOS: 18th International Conference on Embedded Computer Systems: Architectures, Modeling and Simlation, Jul 2018, Pythagorion, Greece. pp.146-149

Communication dans un congrès hal-02055464v1
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Hardware Architectures for HECC

Gabriel Gallin , Arnaud Tisserand

CryptArchi 2017: 15th International Workshops on Cryptographic architectures embedded in logic devices , Jun 2017, Smolenice, Slovakia

Communication dans un congrès hal-01545625v1

An Efficient Framework for Design and Assessment of Arithmetic Operators with Reduced-Precision Redundancy

Imran Wali , Emmanuel Casseau , Arnaud Tisserand

Conference on Design and Architectures for Signal and Image Processing (DASIP), Sep 2017, Dresden, Germany

Communication dans un congrès hal-01586983v1
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Hardware Architectures Exploration for Hyper-Elliptic Curve Cryptography

Gabriel Gallin , Arnaud Tisserand

Crypto'Puces 2017- 6ème rencontre Crypto'Puces, du composant au système communicant embarqué, May 2017, Porquerolles, France. pp.31

Communication dans un congrès hal-01547034v1

ECC Protections against both Observation and Pertubation Attacks

Audrey Lucas , Arnaud Tisserand

CryptArchi 2017: 15th International Workshops on Cryptographic architectures embedded in logic devices , Jun 2017, Smolenice, Slovakia

Communication dans un congrès hal-01545752v1

Power Consumption Analysis and Hardware Security

Arnaud Tisserand

"Risques, Société et Sécurité" (R2S). "Journée Thématique Consommation d'énergie dans les systèmes reconfigurables', Dec 2017, Cergy, France

Communication dans un congrès hal-01657656v1
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Architecture level Optimizations for Kummer based HECC on FPGAs

Gabriel Gallin , Turku Ozlum Celik , Arnaud Tisserand

IndoCrypt 2017 - 18th International Conference on Cryptology in India, Dec 2017, Chennai, India. pp.44-64, ⟨10.1007/978-3-319-71667-1_3⟩

Communication dans un congrès hal-01614063v1

Hardware Support for Physical Security

Arnaud Tisserand

CRiSIS: 12th International Conference on Risks and Security of Internet and Systems, Sep 2017, Dinard, France

Communication dans un congrès hal-01591710v1
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Hyper-Threaded Multiplier for HECC

Gabriel Gallin , Arnaud Tisserand

Asilomar Conference on Signals, Systems, and Computers, Oct 2017, Pacific Grove, CA, United States

Communication dans un congrès hal-01620046v1

Embedding Crypto in SoCs: Threats and Protections

Arnaud Tisserand

XIIème Colloque du GDR SoC-SiP, Jun 2017, Bordeaux, France. http://www.colloque2017-gdrsoc2.org/

Communication dans un congrès hal-01539530v1
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Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithm

Vincent Migliore , Maria Mendez Real , Vianney Lapotre , Arnaud Tisserand , Caroline Fontaine et al.

International Conference on Field-Programmable Technology (FPT), Dec 2016, Xi’an, China. ⟨10.1109/FPT.2016.7929535⟩

Communication dans un congrès hal-01427642v1
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Hybrid Position-Residues Number System

Karim Bigou , Arnaud Tisserand

ARITH: 23rd Symposium on Computer Arithmetic, Jul 2016, Santa Clara, CA, United States

Communication dans un congrès hal-01314232v1
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Asynchronous Charge Sharing Power Consistent Montgomery Multiplier

Jiaoyan Chen , Arnaud Tisserand , Emanuel Popovici , Sorin Cotofana

ASYNC: 21st IEEE International Symposium on Asynchronous Circuits and Systems, May 2015, Mountain View, Silicon Valley California, United States

Communication dans un congrès hal-01176845v1
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Comparaison expérimentale d'architectures de crypto-processeurs pour courbes elliptiques et hyper-elliptiques

Gabriel Gallin , Arnaud Tisserand , Nicolas Veyrat-Charvillon

Compas: Conférence d’informatique en Parallélisme, Architecture et Système, Jun 2015, Lille, France

Communication dans un congrès hal-01171094v1
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Full Hardware Implementation of Short Addition Chains Recoding for ECC Scalar Multiplication

Julien Proy , Nicolas Veyrat-Charvillon , Arnaud Tisserand , Nicolas Méloni

Compas: Conférence d’informatique en Parallélisme, Architecture et Système, Jun 2015, Lille, France

Communication dans un congrès hal-01171095v1

Fast Prototyping of a New Reconfigurable Architecture : Toward Tailored Space FPGA

Chagun Basha Basheer Ahmed , Sébastien Pillement , Loïc Lagadec , Arnaud Tisserand

Conférence d’informatique en Parallélisme, Architecture et Système (Compas), Jun 2015, Villeneuve d'Ascq, France. pp.10

Communication dans un congrès hal-01153568v1
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Small FPGA based Multiplication-Inversion Unit for Normal Basis Representation in $GF(2^m)$

Jérémy Métairie , Arnaud Tisserand , Emmanuel Casseau

ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Jul 2015, Montpellier, France

Communication dans un congrès hal-01175712v1
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Fast and Secure Finite Field Multipliers

Danuta Pamula , Arnaud Tisserand

DSD: Euromicro Conference on Digital System Design, Aug 2015, Funchal, Portugal. ⟨10.1109/DSD.2015.46⟩

Communication dans un congrès hal-01169851v1
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Single Base Modular Multiplication for Efficient Hardware RNS Implementations of ECC

Karim Bigou , Arnaud Tisserand

CHES: 17th International Workshop on Cryptographic Hardware and Embedded Systems, Sep 2015, Saint-Malo, France. pp.123-140, ⟨10.1007/978-3-662-48324-4_7⟩

Communication dans un congrès hal-01199155v2
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Exploration of Polynomial Multiplication Algorithms for Homomorphic Encryption Schemes

Vincent Migliore , Maria Méndez Real , Vianney Lapotre , Arnaud Tisserand , Caroline Fontaine et al.

International Conference on Reconfigurable Computing and FPGAs (ReConFig), Dec 2015, Cancun, Mexico. ⟨10.1109/ReConFig.2015.7393307⟩

Communication dans un congrès hal-01273192v1
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Hardware Accelerators for ECC and HECC

Arnaud Tisserand

ECC: 19th Workshop on Elliptic Curve Cryptography, Sep 2015, Bordeaux, France

Communication dans un congrès hal-01207422v1
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Hardware/Software Support for Securing Virtualization in Embedded Systems

Franck Bucheron , Arnaud Tisserand , Louis Rilling

1st Symposium on Digital Trust in Auvergne, Dec 2014, Clermont-Ferrand, France

Communication dans un congrès hal-01095430v1
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RNS Modular Multiplication through Reduced Base Extensions

Karim Bigou , Arnaud Tisserand

ASAP - 25th IEEE International Conference on Application-specific Systems, Architectures and Processors, Jun 2014, Zurich, Switzerland. pp.57-62, ⟨10.1109/ASAP.2014.6868631⟩

Communication dans un congrès hal-01010961v1

Robust Sub-Powered Asynchronous Logic

Jiaoyan Chen , Arnaud Tisserand , Emanuel Popovici , S. D. Cotofana

PATMOS - International Workshop on Power And Timing Modeling, Optimization and Simulation, Sep 2014, Palma de Mallorca, Spain. ⟨10.1109/PATMOS.2014.6951863⟩

Communication dans un congrès hal-01063821v1
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On-the-Fly Multi-Base Recoding for ECC Scalar Multiplication without Pre-Computations

Thomas Chabrier , Arnaud Tisserand

ARITH - 21st IEEE International Symposium on Computer Arithmetic, Apr 2013, Austin, TX, United States. pp.219-228, ⟨10.1109/ARITH.2013.17⟩

Communication dans un congrès hal-00772613v1
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Improving Modular Inversion in RNS using the Plus-Minus Method

Karim Bigou , Arnaud Tisserand

CHES - 15th Workshop on Cryptographic Hardware and Embedded Systems - 2013, Aug 2013, Santa Barbara, United States. pp.233-249, ⟨10.1007/978-3-642-40349-1_14⟩

Communication dans un congrès hal-00825745v1
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Opérateur matériel de tests de divisibilité par des petites constantes sur de très grands entiers

Karim Bigou , Thomas Chabrier , Arnaud Tisserand

ComPAS'13 / SympA'15 - Symposium en Architectures nouvelles de machines, Jan 2013, Grenoble, France

Communication dans un congrès hal-00772703v2
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Crypto-processeur ECC en RNS sur FPGA avec inversion modulaire rapide

Karim Bigou , Arnaud Tisserand

Colloque national du GDR SoC-SiP - 2013, Jun 2013, Lyon, France

Communication dans un congrès hal-00830610v1

Circuits for True Random Number Generation with On-Line Quality Monitoring

Arnaud Tisserand

Rencontres Arithmetique de l'Informatique Mathématique, Jun 2012, Dijon, France

Communication dans un congrès hal-00747350v1
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GF(2^m) Finite-Field Multipliers with Reduced Activity Variations

Danuta Pamula , Arnaud Tisserand

WAIFI - 4th International Workshop on Arithmetic of Finite Fields, Jul 2012, Bochum, Germany. pp.152-167, ⟨10.1007/978-3-642-31662-3_11⟩

Communication dans un congrès hal-00716655v1

Analysis of GF(2^233) Multipliers Regarding Elliptic Curve Cryptosystem Applications

Danuta Pamula , Edward Hrynkiewicz , Arnaud Tisserand

PDeS - 11th IFAC/IEEE International Conference on Programmable Devices and Embedded Systems, May 2012, Brno, Czech Republic. pp.252-257, ⟨10.3182/20120523-3-CZ-3015.00052⟩

Communication dans un congrès hal-00702622v1
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A Comparison on FPGA of Modular Multipliers Suitable for Elliptic Curve Cryptography over GF(p) for Specific p Values

Mark Hamilton , William P. Marnane , Arnaud Tisserand

21st International Conference on Field Programmable Logic and Applications (FPL), Sep 2011, Chania, Greece. pp.273-276, ⟨10.1109/FPL.2011.55⟩

Communication dans un congrès inria-00633200v1

Hardware Random Recoding: Redundant Representations of Numbers, Side Channel Analysis, Elliptic Curve Cryptography

Thomas Chabrier , Danuta Pamula , Arnaud Tisserand

Journées "Codage et Cryptographie", Apr 2011, St Pierre d'Oléron, France

Communication dans un congrès inria-00591359v1

Multiplication in GF(2^m): area and time dependency/efficiency/complexity analysis

Danuta Pamula , Edward Hrynkiewicz , Arnaud Tisserand

10th International IFAC Workshop on Programmable Devices and Embedded Systems (PDeS), Oct 2010, Pszczyna, Poland

Communication dans un congrès inria-00536585v1

Arithmetic Level Countermeasures for ECC Coprocessor

Arnaud Tisserand , Thomas Chabrier , Danuta Pamula

Claude Shannon Institute Workshop onCoding & Cryptography, May 2010, Cork, Ireland

Communication dans un congrès inria-00484758v1
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Hardware implementation of DBNS recoding for ECC processor

Thomas Chabrier , Danuta Pamula , Arnaud Tisserand

44rd Asilomar Conference on Signals, Systems and Computers, Nov 2010, Pacific Grove, California, United States. pp.1129-1133, ⟨10.1109/ACSSC.2010.5757580⟩

Communication dans un congrès inria-00536587v1

Towards Automatic Accuracy Validation and Optimization of Fixed-Point Hardware Descriptions in SystemC

Arnaud Tisserand

14th GAMM-IMACS International Symposium on Scientific Computing, Computer Arithmetic and Validated Numerics (SCAN), Sep 2010, Lyon, France

Communication dans un congrès inria-00536554v1

Low-Power Arithmetic Operators

Arnaud Tisserand

8ème journées d'études Faible Tension Faible Consommation, Jun 2009, Neuchâtel, Switzerland

Communication dans un congrès inria-00384197v1

Opérateurs arithmétiques sécurisés

Arnaud Tisserand

RAIM: 3ème Rencontres Arithmétique de l'Informatique Mathématique, Oct 2009, Lyon, France

Communication dans un congrès inria-00438333v1

Arithmetic operators for on-the-fly evaluation of TRNGs

Renaud Santoro , Arnaud Tisserand , Olivier Sentieys , Sébastien Roy

Advanced Signal Processing Algorithms, Architectures and Implementations XVIII, Aug 2009, San Diego, United States. ⟨10.1117/12.826336⟩

Communication dans un congrès inria-00422143v1
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Power Consumption of GPUs from a Software Perspective

Caroline Collange , David Defour , Arnaud Tisserand

9th International Conference on Computational Science, May 2009, Baton Rouge, Louisiana, United States. pp.914-923, ⟨10.1007/978-3-642-01970-8_92⟩

Communication dans un congrès hal-00348672v2
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Comparison of Modular Arithmetic Algorithms on GPUs

Pascal Giorgi , Thomas Izard , Arnaud Tisserand

ParCo'09: International Conference on Parallel Computing, France. pp.N/A

Communication dans un congrès lirmm-00424288v2

Function Approximation based on Estimated Arithmetic Operators

Arnaud Tisserand

43th Asilomar Conference on Signals, Systems and Computers, Oct 2009, Pacific Grove, California, United States

Communication dans un congrès inria-00446527v1

Redundant Number Systems for Reconfigurable Arithmetic Units

Arnaud Tisserand

7th International Workshop on Cryptographic Architectures Embedded in Reconfigurable Devices, Jun 2009, Prague, Czech Republic

Communication dans un congrès inria-00399902v1
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Error Detection for Borrow-Save Adders Dedicated to ECC Unit

Julien Francq , Jean-Baptiste Rigaud , Pascal Manet , Assia Tria , Arnaud Tisserand

FDTC 2008 - 5th Workshop on Fault Diagnosis and Tolerance in Cryptography, Aug 2008, Washington, DC, United States. pp.77-86, ⟨10.1109/FDTC.2008.17⟩

Communication dans un congrès lirmm-00316796v1
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Fast and Accurate Activity Evaluation in Multipliers

Arnaud Tisserand

42th Asilomar Conference on Signals, Systems and Computers, Oct 2008, Pacific Grove, CA, United States. pp.757-761, ⟨10.1109/ACSSC.2008.5074510⟩

Communication dans un congrès lirmm-00348084v1
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Hardware Reciprocation using Degree-3 Polynomials but Only 1 Complete Multiplication

Arnaud Tisserand

MWCAS/NEWCAS'07: 50th Internationall Midwest Symposium on Circuits & Systems/5th International Northeast Workshop on Circuits & Systems, Aug 2007, Montréal, Canada, pp.1-4, ⟨10.1109/MWSCAS.2007.4488593⟩

Communication dans un congrès lirmm-00153370v1
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SPA Resistant Elliptic Curve Cryptosystem using Addition Chains

Andrew Byrne , Nicolas Méloni , Francis Crowe , William P. Marnane , Arnaud Tisserand et al.

ITNG'07: 4th International Conference on Information Technology, Apr 2007, Las Vegas, Nevada, U.S.A., pp.995-1000, ⟨10.1109/ITNG.2007.185⟩

Communication dans un congrès lirmm-00153368v1

A Library for Prototyping the Computer Arithmetic Level in Elliptic Curve Cryptography

Laurent Imbert , Agostinho Peirera , Arnaud Tisserand

Advanced Signal Processing Algorithms, Architectures and Implementations XVII, Aug 2007, San Diego, California, United States. pp.1-9 (66970N), ⟨10.1117/12.733652⟩

Communication dans un congrès lirmm-00153369v1
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Amélioration de la sécurité des circuits intégrés par codage de l'information

Julien Francq , Jean-Baptiste Rigaud , Pascal Manet , Jean-Claude Bajard , Arnaud Tisserand

JNRDM'07: 10ème Journées Nationales du Réseau Doctoral en Microélectronique, Lille, France

Communication dans un congrès lirmm-00182636v1

Estimation rapide de l'activité parasite pour l'optimisation des arbres de réduction de multiplieurs

Arnaud Tisserand

FTFC'07: 6ièmes Journées d'Etudes Faible Tension Faible Consommation, May 2007, Paris (France), pp.127-130

Communication dans un congrès lirmm-00149006v1
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Optimisation d'opérateurs arithmétiques matériels à base d'approximations polynomiales

Romain Michard , Arnaud Tisserand , Nicolas Veyrat-Charvillon

SYMPA'06 : 11ième SYMPosium en Architectures nouvelles de machines, Oct 2006, Perpignan (France), pp.130-141

Communication dans un congrès lirmm-00125520v1

New Identities and Transformations for Hardware Power Operators

Romain Michard , Arnaud Tisserand , Nicolas Veyrat-Charvillon

Advanced Signal Processing Algorithms, Architectures and Implementations XVI, Aug 2006, San Diego, California, U.S.A., pp.1-10 (631307), ⟨10.1117/12.676244⟩

Communication dans un congrès lirmm-00125518v1
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Carry Prediction and Selection for Truncated Multiplication

Romain Michard , Arnaud Tisserand , Nicolas Veyrat-Charvillon

SiPS'06: Workshop on Signal Processing Systems, Oct 2006, Banff, Canada, pp.339-344

Communication dans un congrès lirmm-00153366v1
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Multi-mode Operator for SHA-2 Hash Functions

Ryan Glabb , Laurent Imbert , Graham A. Jullien , Arnaud Tisserand , Nicolas Veyrat-Charvillon

ERSA: Engineering of Reconfigurable Systems and Algorithms, Jun 2006, Las Vegas, NV, United States. pp.207-210

Communication dans un congrès lirmm-00125521v1
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Automatic Generation of Low-Power Circuits for the Evaluation of Polynomials

Arnaud Tisserand

40th Asilomar Conference on Signals, Systems and Computers, Oct 2006, Pacific Grove, CA (USA), pp.2053-2057, ⟨10.1109/ACSSC.2006.355128⟩

Communication dans un congrès lirmm-00125519v1
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Hardware Operator for Simultaneous Sine and Cosine Evaluation

Arnaud Tisserand

ICASSP'06: International Conference on Acoustics, Speech and Signal Processing, May 2006, Toulouse, France, pp.992-995, ⟨10.1109/ICASSP.2006.1660823⟩

Communication dans un congrès lirmm-00125366v1
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Towards the System-on-Chip Realization of a Sensorless Vector Controller with Microsecond-order Computation Time

Rachid Beguenane , Jean-Gabriel Mailloux , Stephane Simard , Arnaud Tisserand

CCECE'06: Canadian Conference on Electrical and Computer Engineering, May 2006, pp.908-912, ⟨10.1109/CCECE.2006.277332⟩

Communication dans un congrès lirmm-00125485v1
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Function Evaluation on FPGAs using On-Line Arithmetic Polynomial Approximation

Rachid Beguenane , Stephane Simard , Arnaud Tisserand

NEWCAS'06: 4th International Northeast Workshop on Circuits and Systems, Jun 2006, Gatineau, Canada. pp.21-24, ⟨10.1109/NEWCAS.2006.250959⟩

Communication dans un congrès lirmm-00125517v1
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Simple Seed Architectures for Reciprocal and Square-Root Reciprocal

Jean-Michel Muller , Arnaud Tisserand , Milos Ercegovac

39th Asilomar Conference on Signals, Systems and Computers, Oct 2005, Pacific Grove, California, United States. pp.1167-1171

Communication dans un congrès ensl-00087002v1

Comparison of Modular Multipliers on FPGAs

Jean-Luc Beuchat , Laurent Imbert , Arnaud Tisserand

Advanced Signal Processing Algorithms, Architectures, and Implementations XVIII, Aug 2003, San Diego, United States. pp.490-498

Communication dans un congrès lirmm-00269573v1

Evolvable platform for array processing: a one-chip approach

Bernard Girau , Pierre Marchal , Pascal Nussbaum , Arnaud Tisserand , Hector Fabio Restrepo

MicroNeuro, Apr 1999, Granada, Spain, France

Communication dans un congrès inria-00098897v1

Field Programmable Processor Arrays

Pascal Nussbaum , Bernard Girau , Arnaud Tisserand

ICES, 1998, none, France. 12 p

Communication dans un congrès inria-00108032v1
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Hardware Level Simulations of Fault Detection in RNS Accelerator

Morgane Vollmer , Arnaud Tisserand , Karim Bigou

BITFLIP 2025, Nov 2025, Rennes, France.

Poster de conférence hal-05368416v1

Finite Field Multiplier Architectures for Hyper-Elliptic Curve Cryptography

Gabriel Gallin , Arnaud Tisserand

Colloque National du GDR SOC2, Jun 2017, Bordeaux, France.

Poster de conférence hal-01539852v1
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Accurate Modeling of Fault Impact in Arithmetic Circuits

Pierre Guilloux , Arnaud Tisserand

DASIP: Conference on Design and Architectures for Signal and Image Processing (Demo Night), Oct 2016, Rennes, France. , 2016

Poster de conférence hal-01404772v1
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Plateforme matérielle–logicielle à bas coût pour l'émulation de fautes

Pierre Guilloux , Arnaud Tisserand

Colloque du GDR SoC-SiP, Jun 2016, Nantes, France.

Poster de conférence hal-01346576v1
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Hardware and Arithmetic for Hyperelliptic Curves Cryptography

Arnaud Tisserand , Gabriel Gallin

CominLabs Days 2016, Nov 2016, Rennes, France. , 2016

Poster de conférence hal-01404755v1
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RNS Modular Computations for Cryptographic Applications

Karim Bigou , Arnaud Tisserand

RAIM: 7ème Rencontre Arithmétique de l'Informatique Mathématique, Apr 2015, Rennes, France. , 2015

Poster de conférence hal-01141347v1
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Hardware and Arithmetic for Hyperelliptic Curves Cryptography

Gabriel Gallin , Arnaud Tisserand , Nicolas Veyrat-Charvillon

RAIM: 7ème Rencontre Arithmétique de l'Informatique Mathématique, Apr 2015, Rennes, France. , 2015

Poster de conférence hal-01134020v1

Proceedings of IEEE 22nd Symposium on Computer Arithmetic

Jean-Michel Muller , Arnaud Tisserand , Julio Villalba Moreno

Muller, Jean-Michel; Tisserand, Arnaud; Villalba Moreno, Julio. IEEE, 2015, ⟨10.1109/ARITH.2015.1⟩

Ouvrages hal-01233867v1

Architecture des ordinateurs

Loïc Lagadec , Sébastien Pillement , Arnaud Tisserand

Loïc Lagadec and Sébastien Pillement and Arnaud Tisserand. Hermes, 32, pp.150, 2013, Technique et science informatique, 9782746245679

Ouvrages hal-00819668v1

Architectures reconfigurables FPGA

Olivier Sentieys , Arnaud Tisserand

Techniques de l'Ingénieur. Technologies logicielles Architectures des systèmes, H 1 196, Techniques de l'Ingénieur, pp.1-22, 2012

Chapitre d'ouvrage hal-00716772v1
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Small FPGA polynomial approximations with $3$-bit coefficients and low-precision estimations of the powers of x

Romain Michard , Arnaud Tisserand , Nicolas Veyrat-Charvillon

[Research Report] RR-5503, LIP RR-2005-8, INRIA, LIP. 2005, pp.13

Rapport (rapport de recherche) inria-00070504v1
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Simple Seed Architectures for Reciprocal and Square Root Reciprocal

Milos Ercegovac , Jean-Michel Muller , Arnaud Tisserand

RR-5720, INRIA. 2005, pp.25

Rapport inria-00070298v1
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High-Radix Floating-Point Division Algorithms for Embedded VLIW Integer Processors

Claude-Pierre Jeannerod , Saurabh-Kumar Raina , Arnaud Tisserand

[Research Report] LIP RR-2005-39, Laboratoire de l'informatique du parallélisme. 2005, 2+11p

Rapport (rapport de recherche) hal-02102220v1
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Étude statistique de l'activité de la fonction de sélection dans l'algorithme de E-méthode

Romain Michard , Nicolas Veyrat-Charvillon , Arnaud Tisserand

RR-5574, INRIA. 2005, pp.10

Rapport inria-00070432v1
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Division by Constant for the ST100 DSP Microprocessor

Jean-Michel Muller , Arnaud Tisserand , Benoît de Dinechin , Christophe Monat

[Research Report] RR-5340, LIP RR-2004-45, INRIA, LIP. 2004, pp.14

Rapport (rapport de recherche) inria-00070661v1
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FPGA Implementation of a Recently Published Signature Scheme

Jean-Luc Beuchat , Nicolas Sendrier , Arnaud Tisserand , Gilles Villard

[Research Report] RR-5158, LIP RR-2004-14, INRIA, LIP. 2004

Rapport (rapport de recherche) inria-00077045v1
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Evaluation de polynômes et de fractions rationnelles sur FPGA avec des opérateurs à additions et décalages en grande base

Romain Michard , Arnaud Tisserand , Nicolas Veyrat-Charvillon

[Rapport de recherche] RR-5437, LIP RR-2004-62, INRIA, LIP. 2004, pp.15

Rapport (rapport de recherche) inria-00070570v1
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A floating-point library for integer processors

C. Bertin , Nicolas Brisebarre , Benoît de Dinechin , Claude-Pierre Jeannerod , C. Monat et al.

[Research Report] RR-5268, INRIA. 2004, pp.17

Rapport (rapport de recherche) inria-00070730v1
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Génération automatique d'architectures de calcul pour des opérations linéaires : application à l'IDCT sur FPGA

Nicolas Boullis , Arnaud Tisserand

[Rapport de recherche] RR-4486, INRIA. 2002

Rapport (rapport de recherche) inria-00072102v1
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Small Multiplier-based Multiplication and Division Operators for Virtex-II Devices

Jean-Luc Beuchat , Arnaud Tisserand

[Research Report] RR-4494, INRIA. 2002

Rapport (rapport de recherche) inria-00072094v1
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Évaluation polynomiale en-ligne de fonctions élémentaires sur FPGA

Jean-Luc Beuchat , Arnaud Tisserand

[Rapport de recherche] RR-4557, INRIA. 2002

Rapport (rapport de recherche) inria-00072031v1
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On digit-recurrence division algorithms for self-timed circuits

Nicolas Boullis , Arnaud Tisserand

[Research Report] RR-4221, INRIA. 2001

Rapport (rapport de recherche) inria-00072398v1
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Some Improvements on Multipartite Table Methods

Florent de Dinechin , Arnaud Tisserand

[Research Report] RR-4059, INRIA. 2000

Rapport (rapport de recherche) inria-00072577v1
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The Table Maker's Dilemma.

Vincent Lefevre , Jean-Michel Muller , Arnaud Tisserand

[Research Report] LIP RR-1998-12, Laboratoire de l'informatique du parallélisme. 1998, 2+16p

Rapport (rapport de recherche) hal-02101765v1
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Reciprocation, Square root, Inverse Square Root, and some Elementary Functions using Small Multipliers

Milos Ercegovac , Tomas Lang , Jean-Michel Muller , Arnaud Tisserand

[Research Report] LIP RR-1997-47, Laboratoire de l'informatique du parallélisme. 1997, 2+22p

Rapport (rapport de recherche) hal-02101940v1
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Adéquation arithmétique architecture, problèmes et étude de cas

Arnaud Tisserand

Informatique [cs]. Ecole normale supérieure de lyon - ENS LYON, 1997. Français. ⟨NNT : ⟩

Thèse tel-00445752v1
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Plateforme matérielle–logicielle d'émulation de fautes pour des opérateurs arithmétiques

Pierre Guilloux , Arnaud Tisserand

Compas 2016 : Conférence d’informatique en Parallélisme, Architecture et Système, Jul 2016, Lorient, France. , pp.8

Document associé à des manifestations scientifiques hal-01313051v1
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Experimental Comparison of Crypto-processors Architectures for Elliptic and Hyper-Elliptic Curves Cryptography

Gabriel Gallin , Arnaud Tisserand , Nicolas Veyrat-Charvillon

CryptArchi: 13th International Workshops on Cryptographic Architectures Embedded in Reconfigurable Devices, Jun 2015, Leuven, Belgium.

Document associé à des manifestations scientifiques hal-01197048v1
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Circuits for True Random Number Generation with On-Line Quality Monitoring

Arnaud Tisserand

Claude Shannon Institut Workshop on Coding and Cryptography, Apr 2011, Cork, Ireland

Document associé à des manifestations scientifiques inria-00610577v1