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Arnaud Virazel

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Presentation

Enseignant-chercheur au **LIRMM** dans l’équipe de recherche **TEST**: Test and dEpendability of microelectronic integrated SysTems. <https://www.lirmm.fr/recherche/equipes/test> **Cours** : <http://www.lirmm.fr/~virazel/COURS/index.php?dir=L1%20-%20HLEE202/Cours/> **Researchgate** : [https://www.researchgate.net/profile/Arnaud\_Virazel](https://www.researchgate.net/profile/Arnaud_Virazel)

Publications

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SRAM Periphery Testing using the Cell-Aware Test Methodology

Xhesila Xhafa , Eric Faehn , Patrick Girard , Arnaud Virazel
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, In press, ⟨10.1109/TCAD.2024.3506854⟩
Journal articles lirmm-04808316v1
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Analysis of resistive defects on a foundry 8T SRAM-based IMC architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noël , Arnaud Virazel
Microelectronics Reliability, 2023, 147, pp.115029. ⟨10.1016/j.microrel.2023.115029⟩
Journal articles hal-04129470v1
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A comprehensive framework for cell-aware diagnosis of customer returns

Pierre D’hondt , Safa Mhamdi , Patrick Girard , Arnaud Virazel , Aymen Ladhar
Microelectronics Reliability, 2022, 135, pp.114595. ⟨10.1016/j.microrel.2022.114595⟩
Journal articles lirmm-03768999v1
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Multi-Level Control of Resistive RAM (RRAM) Using a Write Termination to Achieve 4 Bits/Cell in High Resistance State

Hassen Aziza , Said Hamdioui , Moritz Fieback , Mottaqiallah Taouil , Mathieu Moreau
Electronics, 2021, 10 (18), pp.#2222. ⟨10.3390/electronics10182222⟩
Journal articles lirmm-03377249v1
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A Survey of Test and Reliability Solutions for Magnetic Random Access Memories

Patrick Girard , Yuanqing Cheng , Arnaud Virazel , Weisheng Zhao , Rajendra Bishnoi
Proceedings of the IEEE, 2021, 109 (2), pp.149-169. ⟨10.1109/JPROC.2020.3029600⟩
Journal articles lirmm-03031646v1
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Density Enhancement of RRAMs using a RESET Write Termination for MLC Operation

Hassen Aziza , Said Hamdioui , Moritz Fieback , Mottaqiallah Taouil , Mathieu Moreau
Microelectronics Reliability, 2021, 126, pp.1877-1880. ⟨10.23919/DATE51398.2021.9473967⟩
Journal articles hal-03504284v1
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Improving TID Radiation Robustness of a CMOS OxRAM-Based Neuron Circuit by Using Enclosed Layout Transistors

Pablo Ilha Vaz , Patrick Girard , Arnaud Virazel , Hassen Aziza
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021, 29 (6), pp.1122-1131. ⟨10.1109/TVLSI.2021.3067446⟩
Journal articles lirmm-03376937v1
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Cell-Aware Defect Diagnosis of Customer Returns Based on Supervised Learning

Safa Mhamdi , Patrick Girard , Arnaud Virazel , Alberto Bosio , Eric Faehn
IEEE Transactions on Device and Materials Reliability, 2020, 20 (2), pp.329-340. ⟨10.1109/TDMR.2020.2992482⟩
Journal articles lirmm-03031823v1

On Using Approximate Computing to Build an Error Detection Scheme for Arithmetic Circuits

Bastien Deveautour , Arnaud Virazel , Patrick Girard , Valentin Gherman
Journal of Electronic Testing: : Theory and Applications, 2020, 36, pp.33-46. ⟨10.1007/s10836-020-05858-5⟩
Journal articles lirmm-02395626v1
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A Survey of Testing Techniques for Approximate Integrated Circuits

Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
Proceedings of the IEEE, 2020, 108 (12), pp.2178-2194. ⟨10.1109/JPROC.2020.2999613⟩
Journal articles lirmm-02395609v1

A Test Pattern Generation Technique for Approximate Circuits Based on an ILP-Formulated Pattern Selection Procedure

Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
IEEE Transactions on Nanotechnology, 2019, 18, pp.849-857. ⟨10.1109/TNANO.2019.2923040⟩
Journal articles lirmm-02395306v1

Scan-Chain Intra-Cell Aware Testing

Aymen Touati , Alberto Bosio , Patrick Girard , Arnaud Virazel , Matteo Sonza Reorda
IEEE Transactions on Emerging Topics in Computing, 2018, 6 (2), pp.278-287. ⟨10.1109/TETC.2016.2624311⟩
Journal articles lirmm-01430859v1

Microprocessor Testing: Functional Meets Structural Test

Aymen Touati , Alberto Bosio , Patrick Girard , Arnaud Virazel , Paolo Bernardi
Journal of Circuits, Systems, and Computers, 2017, 26 (08), ⟨10.1142/S0218126617400072⟩
Journal articles lirmm-01718578v1

HPET: An Efficient Hybrid Power Estimation Technique to Improve High-Level Power Characterization

Arnaud Virazel , Alejandro Nocua , Alberto Bosio , Patrick Girard , Cyril Chevalier
Journal of Circuits, Systems, and Computers, 2017, 26 (8), pp.#1740004. ⟨10.1142/S0218126617400047⟩
Journal articles lirmm-01718575v1

A Cross-Level Power Estimation Technique to Improve IP Power Models Quality

Alejandro Nocua , Arnaud Virazel , Alberto Bosio , Patrick Girard , Cyril Chevalier
Journal of Low Power Electronics, 2017, 13 (1), pp.10-28. ⟨10.1166/jolpe.2017.1472⟩
Journal articles lirmm-01433322v1

A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits

Arnaud Virazel , Imran Wali , Bastien Deveautour , Alberto Bosio , Patrick Girard
Journal of Electronic Testing: : Theory and Applications, 2017, 33 (1), pp.25-36. ⟨10.1007/s10836-017-5640-6⟩
Journal articles lirmm-01718568v1

Design for Test and Diagnosis of Power Switches

Miroslav Valka , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel
Journal of Circuits, Systems, and Computers, 2016, 25 (3), pp.1640013. ⟨10.1142/S0218126616400132⟩
Journal articles lirmm-01272986v1

An Effective Power-Aware At-Speed Test Methodology for IP Qualification and Characterization

Kapil Juneja , Darayus Adil Patel , Rajesh Kumar Immadi , Balwant Singh , Sylvie Naudet
Journal of Electronic Testing: : Theory and Applications, 2016, 32 (6), pp.721-733. ⟨10.1007/s10836-016-5621-1⟩
Journal articles lirmm-01446887v1

A Hybrid Fault-Tolerant Architecture for Highly Reliable Processing Cores

Imran Wali , Arnaud Virazel , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch
Journal of Electronic Testing: : Theory and Applications, 2016, 32 (2), pp.147-161. ⟨10.1007/s10836-016-5578-0⟩
Journal articles lirmm-01354746v1
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Globally Constrained Locally Optimized 3-D Power Delivery Networks

Aida Todri-Sanial , Sandip Kundu , Patrick Girard , Alberto Bosio , Luigi Dilillo
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014, 22 (10), pp.2131-2144. ⟨10.1109/TVLSI.2013.2283800⟩
Journal articles lirmm-01255754v1

A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014, 22 (11), pp.2326-2335. ⟨10.1109/TVLSI.2013.2294080⟩
Journal articles lirmm-01248578v1

Dynamic Test Methods for COTS SRAMs

Georgios Tsiligiannis , Luigi Dilillo , Viyas Gupta , Alberto Bosio , Patrick Girard
IEEE Transactions on Nuclear Science, 2014, 61 (6), pp.3095-3102. ⟨10.1109/TNS.2014.2363123⟩
Journal articles lirmm-01234463v1

A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems

Ahn Duc Tran , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel
Journal of Electronic Testing: : Theory and Applications, 2014, 30 (4), pp.401-413. ⟨10.1007/s10836-014-5459-3⟩
Journal articles lirmm-01272958v1
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90 nm SRAM Static and Dynamic Mode Real-Time Testing at Concordia Station in Antarctica

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch
IEEE Transactions on Nuclear Science, 2014, 61 (6), pp.3389-3394. ⟨10.1109/TNS.2014.2363120⟩
Journal articles hal-04056468v1

Dynamic Compact Model of Self-Referenced Magnetic Tunnel Junction

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard
IEEE Transactions on Electron Devices, 2014, 61 (11), pp.3877-3882. ⟨10.1109/TED.2014.2355418⟩
Journal articles lirmm-01272978v1

An SRAM Based Monitor for Mixed-Field Radiation Environments

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch
IEEE Transactions on Nuclear Science, 2014, 61 (4), pp.1663-1670. ⟨10.1109/TNS.2014.2299733⟩
Journal articles lirmm-01234441v1
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Evaluating a Radiation Monitor for Mixed-Field Environments based on SRAM Technology

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch
Journal of Instrumentation, 2014, 9 (5), pp.#C05052. ⟨10.1088/1748-0221/9/05/C05052⟩
Journal articles lirmm-01234448v1

Multiple Cell Upset Classification in Commercial SRAMs

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch
IEEE Transactions on Nuclear Science, 2014, 61 (4), pp.1747-1754. ⟨10.1109/TNS.2014.2313742⟩
Journal articles lirmm-01234446v1
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Intra-Cell Defects Diagnosis

Zhenzhou Sun , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch
Journal of Electronic Testing: : Theory and Applications, 2014, 30 (5), pp.541-555. ⟨10.1007/s10836-014-5481-5⟩
Journal articles lirmm-01272964v1

On the Test and Mitigation of Malfunctions in Low-Power SRAMs

Leonardo B. Zordan , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel
Journal of Electronic Testing: : Theory and Applications, 2014, 30 (5), pp.611-627. ⟨10.1007/s10836-014-5479-z⟩
Journal articles lirmm-01238443v1
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Uncorrelated Power Supply Noise and Ground Bounce Consideration for Test Pattern Generation

Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2013, 21 (5), pp.958-970. ⟨10.1109/TVLSI.2012.2197427⟩
Journal articles lirmm-00806774v1
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A Study of Tapered 3-D TSVs for Power and Thermal Integrity

Aida Todri-Sanial , Sandip Kundu , Patrick Girard , Alberto Bosio , Luigi Dilillo
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2013, 21 (2), pp.306-319. ⟨10.1109/TVLSI.2012.2187081⟩
Journal articles lirmm-00806776v1

Testing a Commercial MRAM under Neutron and Alpha Radiation in Dynamic Mode

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Aida Todri-Sanial
IEEE Transactions on Nuclear Science, 2013, 60 (4), pp.2617-2622. ⟨10.1109/TNS.2013.2239311⟩
Journal articles lirmm-00805005v1

Impact of Resistive-Bridging Defects in SRAM at Different Technology Nodes

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch
Journal of Electronic Testing: : Theory and Applications, 2012, 28 (3), pp.317-329. ⟨10.1007/s10836-012-5291-6⟩
Journal articles lirmm-00805017v1

Analysis and Fault Modeling of Actual Resistive Defects in ATMELtm eFlash Memories

Pierre-Didier Mauroux , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard
Journal of Electronic Testing: : Theory and Applications, 2012, 28 (2), pp.215-228. ⟨10.1007/s10836-012-5277-4⟩
Journal articles lirmm-00806773v1

SoC Yield Improvement - Using TMR Architectures for Manufacturing Defect Tolerance in Logic Cores

Julien Vial , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard
International Journal On Advances in Systems and Measurements, 2010, 3 (1/2), pp.1-10
Journal articles lirmm-00553567v1

A Comprehensive Framework for Logic Diagnosis of Arbitrary Defects

Alberto Bosio , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel
IEEE Transactions on Computers, 2010, 59 (3), pp.289-300. ⟨10.1109/TC.2009.177⟩
Journal articles lirmm-00553545v1

A Comprehensive Analysis of Transition Fault Coverage and Test Power Dissipation for LOS and LOC Schemes

Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch
Journal of Low Power Electronics, 2010, 6 (2), pp.359-374. ⟨10.1166/jolpe.2010.1086⟩
Journal articles lirmm-00553548v1

A SPICE-Like 2T-FLOTOX Core-Cell Model for Defect Injection and Faulty Behavior Prediction in eFlash

Olivier Ginez , Jean-Michel Daga , Patrick Girard , Christian Landrault , Serge Pravossoudovitch
Journal of Electronic Testing: : Theory and Applications, 2009, N/A, pp.127-144. ⟨10.1007/s10836-008-5096-9⟩
Journal articles lirmm-00371370v1

Analysis of Resistive-Open Defects in SRAM Sense Amplifiers

Alexandre Ney , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2009, 17 (10), pp.1556-1559. ⟨10.1109/TVLSI.2008.2005194⟩
Journal articles lirmm-00371367v1

Is TMR Suitable for Yield Improvement ?

Julien Vial , Arnaud Virazel , Alberto Bosio , Patrick Girard , Christian Landrault
IET Computers & Digital Techniques, 2009, 3 (6), pp.581-592. ⟨10.1049/iet-cdt.2008.0127⟩
Journal articles lirmm-00406961v1

A Selective Scan Slice Encoding Technique for Test Data Volume and Test Power Reduction

Nabil Badereddine , Zhanglei Wang , Patrick Girard , Krishnendu Chakrabarty , Arnaud Virazel
Journal of Electronic Testing: : Theory and Applications, 2008, 24 (4), pp.353-364. ⟨10.1007/s10836-007-5053-z⟩
Journal articles lirmm-00331296v1

New March Elements for Address Decoder Open and Resistive Open Fault Detection in SRAM Memories

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Simone Borri
Journal of Integrated Circuits and Systems, 2008, 3 (1), pp.7-12. ⟨10.29292/jics.v3i1.276⟩
Journal articles lirmm-00341793v1
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Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
Journal of Electronic Testing: : Theory and Applications, 2007, 23 (3), pp.435-444. ⟨10.1007/s10836-007-5003-9⟩
Journal articles lirmm-00194254v1

ADOFs and Resistive-ADOFs in SRAM Address Decoders: Test Conditions and March Solutions

Patrick Girard , Luigi Dilillo , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
Journal of Electronic Testing: : Theory and Applications, 2006, 22 (3), pp.287-296. ⟨10.1007/s10836-006-7761-1⟩
Journal articles lirmm-00134769v1

A Gated Clock Scheme for Low Power Testing of Logic Cores

Christian Landrault , Yannick Bonhomme , Arnaud Virazel , Patrick Girard , Loïs Guiller
Journal of Electronic Testing: : Theory and Applications, 2006, 22 (1), pp.89-99. ⟨10.1007/s10836-006-6259-1⟩
Journal articles lirmm-00134766v1
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Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test

Simone Borri , Magali Bastian Hage-Hassan , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch
Journal of Electronic Testing: : Theory and Applications, 2005, 21 (2), pp.169-179. ⟨10.1007/s10836-005-6146-1⟩
Journal articles lirmm-00105313v1
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Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Simone Borri
Journal of Electronic Testing: : Theory and Applications, 2005, 21 (5), pp.551-561. ⟨10.1007/s10836-005-1169-1⟩
Journal articles lirmm-00105314v1

High Defect Coverage with Low Power Test Sequences in a BIST Environment

Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel , Hans-Joachim Wunderlich
IEEE Design & Test, 2002, 19 (5), pp.44-52. ⟨10.1109/MDT.2002.1033791⟩
Journal articles lirmm-00268585v1

Hardware Generation of Random Single Input Change Test Sequence

René M. G. David , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
Journal of Electronic Testing: : Theory and Applications, 2002, 18 (2), pp.145-157. ⟨10.1023/A:1014941525735⟩
Journal articles lirmm-00268540v1
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Delay Fault Testing: Choosing Between Random SIC and Random MIC Test Sequences

Arnaud Virazel , René M. G. David , Patrick Girard , Christian Landrault , Serge Pravossoudovitch
Journal of Electronic Testing: : Theory and Applications, 2001, 17 (3/4), pp.233-241. ⟨10.1023/A:1012259227622⟩
Journal articles lirmm-00345796v1

A Scan-BIST Structure to Test Delay Faults in Sequential Circuits

Patrick Girard , Christian Landrault , Véronique Moreda , Serge Pravossoudovitch , Arnaud Virazel
Journal of Electronic Testing: : Theory and Applications, 1999, 14 (1/2), pp.95-102. ⟨10.1023/A:1008305507376⟩
Journal articles lirmm-00345794v1
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A New Scan-BIST Structures to Test delay Faults in Sequential Circuits

Patrick Girard , Christian Landrault , Véronique Moreda , Serge Pravossoudovitch , Arnaud Virazel
Journal of Electronic Testing: : Theory and Applications, 1999, 14, pp.95-102. ⟨10.1023/A:1008305507376⟩
Journal articles lirmm-00345797v1
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A Graph-Based Methodology for Speeding up Cell-Aware Model Generation

Gianmarco Mongelli , Xhesila Xhafa , Eric Faehn , Dylan Robins , Patrick Girard
IOLTS 2024 - IEEE 30th International Symposium on On-Line Testing and Robust System Design, Jul 2024, Rennes, France. pp.1-6, ⟨10.1109/IOLTS60994.2024.10616062⟩
Conference papers lirmm-04738312v1
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Design for Advanced Test and Safety for Image and Photonic Sensors

Julia Lefèvre , Philippe Debaud , Arnaud Virazel , Patrick Girard
TTTC’s E. J. McCluskey Best Doctoral Thesis Award Contest at ETS’24 Semifinal, May 2024, The Hague, Netherlands
Conference papers lirmm-04739546v1
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A Structural Testing Approach for SRAM Address Decoders using Cell-Aware Methodology

Xhesila Xhafa , Eric Faehn , Patrick Girard , Arnaud Virazel
DFT 2024 - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2024, Harwell, United Kingdom. In press
Conference papers lirmm-04738361v1
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Comparaison des Approches de Lockstep pour la Tolérance aux Fautes des FPGAs Utilisés en Milieu Radiatif

Hugo Closquinet , Florent Miller , Patrick Girard , Thibault Vayssade , Arnaud Virazel
18e Colloque National du GDR SoC², Jun 2024, Toulouse, France
Conference papers lirmm-04739624v1

Method and Techniques to Speed-Up Cell-Aware Model Generation

Gianmarco Mongelli , Eric Faehn , Dylan Robins , Patrick Girard , Arnaud Virazel
South European Test Seminar, Mar 2024, Claviere, Italy
Conference papers lirmm-04739532v1
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Approximate Computing for Test and Test of Approximate Computing

Mario Barbareschi , Alberto Bosio , Patrick Girard , Bastien Deveautour , Marcello Traiola
IEEE Workshop on Top Picks in VLSI Test and Reliability, Nov 2024, San Diego, United States. pp.1-2
Conference papers lirmm-04738424v1
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Producing a Bidirectional ATPG Compliant Verilog-HDL Memory Model of SRAM Memory

Dorian Ronga , Xhesila Xhafa , Thibault Vayssade , Arnaud Virazel
18e Colloque National du GDR SoC², Jun 2024, Toulouse, France
Conference papers lirmm-04739569v1
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Producing a Bidirectional ATPG Compliant Verilog-HDL Memory Model of SRAM

Dorian Ronga , Xhesila Xhafa , Eric Faehn , Patrick Girard , Thibault Vayssade
DTTIS 2024 - IEEE International Conference on Design, Test & Technology of Integrated Systems, Oct 2024, Aix-en-Provence, France. In press
Conference papers lirmm-04738159v1
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A Fast and Efficient Graph-Based methodology for Cell-Aware Model Generation

Gianmarco Mongelli , Eric Faehn , Dylan Robins , Patrick Girard , Arnaud Virazel
ITC 2024 - IEEE International Test Conference, Nov 2024, San Diego, United States. In press
Conference papers lirmm-04738192v1
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A Novel March Test Algorithm for Testing 8T SRAM-based IMC Architectures

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noel , Arnaud Virazel
DATE 2024 - Design, Automation & Test in Europe Conference & Exhibition, Mar 2024, Valence, Spain. pp.1-6, ⟨10.23919/DATE58400.2024.10546583⟩
Conference papers hal-04658584v1

A Structural Testing Approach for SRAMs using Cell-Aware Methodology

Xhesila Xhafa , Eric Faehn , Patrick Girard , Arnaud Virazel
South European Test Seminar, Mar 2024, Claviere, Italy
Conference papers lirmm-04739520v1
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Predictor BIST: An "All-in-One" Optical Test Solution for CMOS Image Sensors

Julia Lefèvre , Philippe Debaud , Patrick Girard , Arnaud Virazel
ITC 2023 - IEEE International Test Conference, Oct 2023, Anaheim, United States
Conference papers lirmm-04240449v1
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Analysis of Resistive-Open Defects on a Foundry 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noël , Arnaud Virazel
17e Colloque National du GDR SoC², Jun 2023, Lyon, France
Conference papers lirmm-04565688v1
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Intra-cell Resistive-Open Defect Analysis on a Foundry 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noël , Arnaud Virazel
ETS 2023 - 28th IEEE European Test Symposium, May 2023, Venise, Italy. ⟨10.1109/ETS56758.2023.10174107⟩
Conference papers hal-04164663v1

On Using Cell-Aware Methodology for SRAM Bit Cell Testing

Xhesila Xhafa , Aymen Ladhar , Eric Faehn , Lorena Anghel , Gregory Di Pendina
ETS 2023 - 28th IEEE European Test Symposium, May 2023, Venezia, Italy. pp.1-4, ⟨10.1109/ETS56758.2023.10174118⟩
Conference papers hal-04164704v1

Learning-Based Characterization Models for Quality Assurance of Emerging Memory Technologies

Xhesila Xhafa , Patrick Girard , Arnaud Virazel
ETS 2023 - 28th IEEE European Test Symposium, May 2023, Venezia, Italy. pp.1-2, ⟨10.1109/ETS56758.2023.10174202⟩
Conference papers hal-04164855v1
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A Generic Fast and Low Cost BIST Solution for CMOS Image Sensors

Julia Lefèvre , Philippe Debaud , Patrick Girard , Arnaud Virazel
ETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-2, ⟨10.1109/ETS54262.2022.9810458⟩
Conference papers lirmm-03770756v1
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A Comprehensive Learning-Based Flow for Cell-Aware Model Generation

Pierre D’hondt , Aymen Ladhar , Patrick Girard , Arnaud Virazel
ITC 2022 - IEEE International Test Conference, Sep 2022, Anaheim, United States. pp.484-488, ⟨10.1109/ITC50671.2022.00057⟩
Conference papers lirmm-03770147v1
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A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing

Sébastien Lapeyre , Nicolas Valette , Marc Merandat , Marie-Lise Flottes , Arnaud Virazel
ETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-4, ⟨10.1109/ETS54262.2022.9810364⟩
Conference papers lirmm-03739783v1
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Analysis of Read Port Short Defects in an 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noel , Arnaud Virazel
16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Conference papers lirmm-03990078v1
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On Using Cell-Aware Models for Representing SRAM Architecture

Xhesila Xhafa , Aymen Ladhar , Eric Faehn , Lorena Anghel , Gregory Di Pendina
16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Conference papers lirmm-03987914v1
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Effective techniques for automatically improving the transition delay fault coverage of Self-Test Libraries

Riccardo Cantoro , Francesco Garau , Patrick Girard , Nima Kolahimahmoudi , Sandro Sartoni
ETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-2, ⟨10.1109/ETS54262.2022.9810392⟩
Conference papers lirmm-03739788v1

Configuring a Universal BIST Solution for CMOS Image Sensors

Julia Lefèvre , Philippe Debaud , Patrick Girard , Arnaud Virazel
16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Conference papers lirmm-03988569v1
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Emerging Computing Devices: Challenges and Opportunities for Test and Reliability

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Cell-Aware Diagnosis of Customer Returns Using Bayesian Inference

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ISQED 2021 - 22nd International Symposium on Quality Electronic Design, Apr 2021, Santa Clara (virtual), United States. pp.48-53, ⟨10.1109/ISQED51717.2021.9424337⟩
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Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement

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IOLTS 2021 - 27th IEEE International Symposium on On-Line Testing and Robust System Design, Jun 2021, Torino, Italy. pp.1-4, ⟨10.1109/IOLTS52814.2021.9486711⟩
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Preliminary Defect Analysis of 8T SRAM Cells for In-Memory Computing Architectures

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DTIS 2021 - 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Jun 2021, Montpellier, France. ⟨10.1109/DTIS53253.2021.9505101⟩
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A Fast and Low Cost Embedded Test Solution for CMOS Image Sensors

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A Plug and Play Digital ABIST Controller for Analog Sensors in Secure Devices

Sébastien Lapeyre , Nicolas Valette , Marc Merandat , Marie-Lise Flottes , Bruno Rouzeyre
ETS 2021 - 26th IEEE European Test Symposium, May 2021, Bruges, Belgium. pp.1-4, ⟨10.1109/ETS50041.2021.9465480⟩
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Accelerating Cell-Aware Model Generation Through Machine Learning

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15e Colloque National du GDR SoC², Jun 2021, Rennes, France
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A Learning-Based Methodology for Accelerating Cell-Aware Model Generation

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DATE 2021 - 24th Design, Automation and Test in Europe Conference and Exhibition, Feb 2021, Grenoble, France. pp.1580-1585, ⟨10.23919/DATE51398.2021.9474227⟩
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Reducing Overprovision of Triple Modular Reduncancy Owing to Approximate Computing

Bastien Deveautour , Marcello Traiola , Arnaud Virazel , Patrick Girard
IOLTS 2021 - 27th IEEE International Symposium on On-Line Testing and Robust System Design, Jun 2021, Torino, Italy. pp.1-7, ⟨10.1109/IOLTS52814.2021.9486699⟩
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Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement

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PESW 2021 - 9th Prague Embedded Systems Workshop, Jul 2021, Horoměřice, Czech Republic
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Preliminary Defect Analysis of 8T SRAM Cells Used for In-Memory Computing

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QAMR: an Approximation-Based FullyReliable TMR Alternative for Area Overhead Reduction

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ETS 2020 - 25th IEEE European Test Symposium, May 2020, Tallinn, Estonia. pp.1-6, ⟨10.1109/ETS48528.2020.9131574⟩
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Maximizing Yield for Approximate Integrated Circuits

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DATE 2020 - 23rd Design, Automation and Test in Europe Conference and Exhibition, Mar 2020, Grenoble, France. pp.810-815, ⟨10.23919/DATE48585.2020.9116341⟩
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A Novel Test Flow for Approximate Digital Circuits

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DATE 2020 - EDAA/IEEE/ACM Design Automation & Test in Europe Conference, PhD Forum, Mar 2020, Grenoble, France
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Learning-Based Cell-Aware Defect Diagnosis of Customer Returns

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ETS 2020 - 25th IEEE European Test Symposium, May 2020, Tallinn, Estonia. pp.1-2, ⟨10.1109/ETS48528.2020.9131601⟩
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Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs

Florence Azaïs , Serge Bernard , Mariane Comte , Bastien Deveautour , Sophie Dupuis
IOLTS 2020 - 26th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2020, Napoli, Italy. pp.1-4, ⟨10.1109/IOLTS50870.2020.9159723⟩
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A Learning-Based Cell-Aware Diagnosis Flow for Industrial Customer Returns

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ITC 2020 - IEEE International Test Conference, Nov 2020, Washington DC, United States. pp.1-10, ⟨10.1109/ITC44778.2020.9325246⟩
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Design, Verification, Test and In-Field Implications of Approximate Computing Systems

Alberto Bosio , Stefano Di Carlo , Patrick Girard , Ernesto Sanchez , Alessandro Savino
ETS 2020 - 25th IEEE European Test Symposium, May 2020, Tallinn, Estonia. pp.1-10, ⟨10.1109/ETS48528.2020.9131557⟩
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A CMOS OxRAM-Based Neuron Circuit Hardened with Enclosed Layout Transistors for Aerospace Applications

Pablo Ilha Vaz , Patrick Girard , Arnaud Virazel , Hassen Aziza
IOLTS 2020 - 26th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2020, Napoli, Italy. pp.1-6, ⟨10.1109/IOLTS50870.2020.9159709⟩
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A Capacitor-Less CMOS Neuron Circuit for Neuromemristive Networks

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NEWCAS 2019 - 17th IEEE International Conference on Electronics Circuits and Systems, Jun 2019, Munich, Germany. ⟨10.1109/NEWCAS44328.2019.8961278⟩
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Cell-Aware Diagnosis of Automotive Customer Returns Based on Supervised Learning

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ART 2019 - 4th IEEE Automotive Reliability and Test Workshop, Nov 2019, Washington, United States
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Towards Improvement of Mission Mode Failure Diagnosis for System-on-Chip

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IOLTS 2019 - 25th International Symposium on On-Line Testing And Robust System Design, Jul 2019, Rhodes, Greece. pp.21-26, ⟨10.1109/IOLTS.2019.8854388⟩
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Is aproximate computing suitable for selective hardening of arithmetic circuits?

Bastien Deveautour , Arnaud Virazel , Patrick Girard , Serge Pravossoudovitch , Valentin Gherman
DTIS 2018 - 13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, Apr 2018, Taormina, Italy. pp.1-6, ⟨10.1109/DTIS.2018.8368559⟩
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Testing Approximate Digital Circuits: Challenges and Opportunities

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LATS 2018 - 19th IEEE Latin American Test Symposium, Mar 2018, Sao Paulo, Brazil. pp.1-6, ⟨10.1109/LATW.2018.8349681⟩
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An Effective Intra-Cell Diagnosis Flow for Industrial SRAMs

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ITC: International Test Conference, Oct 2018, Phoenix, United States. pp.1-8, ⟨10.1109/TEST.2018.8624799⟩
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On the Comparison of Different ATPG approaches for Approximate Integrated Circuits

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DDECS 2018 - 1st International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2018, Budapest, Hungary. pp.85-90, ⟨10.1109/DDECS.2018.00022⟩
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Investigation of Mean-Error Metrics for Testing Approximate Integrated Circuits

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DFT 2018 - 31st IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2018, Chicago, United States. pp.1-6, ⟨10.1109/DFT.2018.8602939⟩
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Towards approximation during test of Integrated Circuits

Imran Wali , Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi
DDECS 2017 - 20th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2017, Dresden, Germany. pp.28-33, ⟨10.1109/DDECS.2017.7934574⟩
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An Advanced Diagnosis Flow for SRAMs

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ISTFA 2017 - 43rd International Symposium for Testing and Failure Analysis, Nov 2017, Pasadena, United States. pp.538-543, ⟨10.31399/asm.cp.istfa2017p0538⟩
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Towards digital circuit approximation by exploiting fault simulation

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EWDTS: East-West Design & Test Symposium, Sep 2017, Novi Sad, Serbia. ⟨10.1109/EWDTS.2017.8110108⟩
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An effective fault-injection framework for memory reliability enhancement perspectives

Ghita Harcha , Alberto Bosio , Patrick Girard , Arnaud Virazel , Paolo Bernardi
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2017, Palma de Mallorca, Spain. ⟨10.1109/DTIS.2017.7930172⟩
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Approximate c