Arnaud Virazel

35%
Libre accès
343
Documents
Affiliation actuelle
  • Test and dEpendability of microelectronic integrated SysTems (LIRMM | TEST)
Contact

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Publications

Image document

SRAM Periphery Testing using the Cell-Aware Test Methodology

Xhesila Xhafa , Eric Faehn , Patrick Girard , Arnaud Virazel
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, In press, ⟨10.1109/TCAD.2024.3506854⟩
Article dans une revue lirmm-04808316 v1
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Analysis of resistive defects on a foundry 8T SRAM-based IMC architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noël , Arnaud Virazel
Microelectronics Reliability, 2023, 147, pp.115029. ⟨10.1016/j.microrel.2023.115029⟩
Article dans une revue hal-04129470 v1
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A comprehensive framework for cell-aware diagnosis of customer returns

Pierre d’Hondt , Safa Mhamdi , Patrick Girard , Arnaud Virazel , Aymen Ladhar
Microelectronics Reliability, 2022, 135, pp.114595. ⟨10.1016/j.microrel.2022.114595⟩
Article dans une revue lirmm-03768999 v1
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Density Enhancement of RRAMs using a RESET Write Termination for MLC Operation

Hassen Aziza , Said Hamdioui , Moritz Fieback , Mottaqiallah Taouil , Mathieu Moreau et al.
Microelectronics Reliability, 2021, 126, pp.1877-1880. ⟨10.23919/DATE51398.2021.9473967⟩
Article dans une revue hal-03504284 v1
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A Survey of Test and Reliability Solutions for Magnetic Random Access Memories

Patrick Girard , Yuanqing Cheng , Arnaud Virazel , Weisheng Zhao , Rajendra Bishnoi et al.
Proceedings of the IEEE, 2021, 109 (2), pp.149-169. ⟨10.1109/JPROC.2020.3029600⟩
Article dans une revue lirmm-03031646 v1
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Multi-Level Control of Resistive RAM (RRAM) Using a Write Termination to Achieve 4 Bits/Cell in High Resistance State

Hassen Aziza , Said Hamdioui , Moritz Fieback , Mottaqiallah Taouil , Mathieu Moreau et al.
Electronics, 2021, 10 (18), pp.2222. ⟨10.3390/electronics10182222⟩
Article dans une revue lirmm-03377249 v1
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Improving TID Radiation Robustness of a CMOS OxRAM-Based Neuron Circuit by Using Enclosed Layout Transistors

Pablo Ilha Vaz , Patrick Girard , Arnaud Virazel , Hassen Aziza
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021, 29 (6), pp.1122-1131. ⟨10.1109/TVLSI.2021.3067446⟩
Article dans une revue lirmm-03376937 v1
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A Survey of Testing Techniques for Approximate Integrated Circuits

Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
Proceedings of the IEEE, 2020, 108 (12), pp.2178-2194. ⟨10.1109/JPROC.2020.2999613⟩
Article dans une revue lirmm-02395609 v1

On Using Approximate Computing to Build an Error Detection Scheme for Arithmetic Circuits

Bastien Deveautour , Arnaud Virazel , Patrick Girard , Valentin Gherman
Journal of Electronic Testing: : Theory and Applications, 2020, 36, pp.33-46. ⟨10.1007/s10836-020-05858-5⟩
Article dans une revue lirmm-02395626 v1
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Cell-Aware Defect Diagnosis of Customer Returns Based on Supervised Learning

Safa Mhamdi , Patrick Girard , Arnaud Virazel , Alberto Bosio , Eric Faehn et al.
IEEE Transactions on Device and Materials Reliability, 2020, 20 (2), pp.329-340. ⟨10.1109/TDMR.2020.2992482⟩
Article dans une revue lirmm-03031823 v1

A Test Pattern Generation Technique for Approximate Circuits Based on an ILP-Formulated Pattern Selection Procedure

Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
IEEE Transactions on Nanotechnology, 2019, 18, pp.849-857. ⟨10.1109/TNANO.2019.2923040⟩
Article dans une revue lirmm-02395306 v1

Scan-Chain Intra-Cell Aware Testing

Aymen Touati , Alberto Bosio , Patrick Girard , Arnaud Virazel , Matteo Sonza Reorda et al.
IEEE Transactions on Emerging Topics in Computing, 2018, 6 (2), pp.278-287. ⟨10.1109/TETC.2016.2624311⟩
Article dans une revue lirmm-01430859 v1

A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits

Arnaud Virazel , Imran Wali , Bastien Deveautour , Alberto Bosio , Patrick Girard et al.
Journal of Electronic Testing: : Theory and Applications, 2017, 33 (1), pp.25-36. ⟨10.1007/s10836-017-5640-6⟩
Article dans une revue lirmm-01718568 v1

A Cross-Level Power Estimation Technique to Improve IP Power Models Quality

Alejandro Nocua , Arnaud Virazel , Alberto Bosio , Patrick Girard , Cyril Chevalier
Journal of Low Power Electronics, 2017, 13 (1), pp.10-28. ⟨10.1166/jolpe.2017.1472⟩
Article dans une revue lirmm-01433322 v1

Microprocessor Testing: Functional Meets Structural Test

Aymen Touati , Alberto Bosio , Patrick Girard , Arnaud Virazel , Paolo Bernardi et al.
Journal of Circuits, Systems, and Computers, 2017, 26 (08), ⟨10.1142/S0218126617400072⟩
Article dans une revue lirmm-01718578 v1

HPET: An Efficient Hybrid Power Estimation Technique to Improve High-Level Power Characterization

Arnaud Virazel , Alejandro Nocua , Alberto Bosio , Patrick Girard , Cyril Chevalier
Journal of Circuits, Systems, and Computers, 2017, 26 (8), pp.#1740004. ⟨10.1142/S0218126617400047⟩
Article dans une revue lirmm-01718575 v1

Design for Test and Diagnosis of Power Switches

Miroslav Valka , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel et al.
Journal of Circuits, Systems, and Computers, 2016, 25 (3), pp.1640013. ⟨10.1142/S0218126616400132⟩
Article dans une revue lirmm-01272986 v1

A Hybrid Fault-Tolerant Architecture for Highly Reliable Processing Cores

Imran Wali , Arnaud Virazel , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
Journal of Electronic Testing: : Theory and Applications, 2016, 32 (2), pp.147-161. ⟨10.1007/s10836-016-5578-0⟩
Article dans une revue lirmm-01354746 v1

An Effective Power-Aware At-Speed Test Methodology for IP Qualification and Characterization

Kapil Juneja , Darayus Adil Patel , Rajesh Kumar Immadi , Balwant Singh , Sylvie Naudet et al.
Journal of Electronic Testing: : Theory and Applications, 2016, 32 (6), pp.721-733. ⟨10.1007/s10836-016-5621-1⟩
Article dans une revue lirmm-01446887 v1

On the Test and Mitigation of Malfunctions in Low-Power SRAMs

Leonardo B. Zordan , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel et al.
Journal of Electronic Testing: : Theory and Applications, 2014, 30 (5), pp.611-627. ⟨10.1007/s10836-014-5479-z⟩
Article dans une revue lirmm-01238443 v1
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Intra-Cell Defects Diagnosis

Zhenzhou Sun , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
Journal of Electronic Testing: : Theory and Applications, 2014, 30 (5), pp.541-555. ⟨10.1007/s10836-014-5481-5⟩
Article dans une revue lirmm-01272964 v1

Dynamic Compact Model of Self-Referenced Magnetic Tunnel Junction

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
IEEE Transactions on Electron Devices, 2014, 61 (11), pp.3877-3882. ⟨10.1109/TED.2014.2355418⟩
Article dans une revue lirmm-01272978 v1
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90 nm SRAM Static and Dynamic Mode Real-Time Testing at Concordia Station in Antarctica

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
IEEE Transactions on Nuclear Science, 2014, 61 (6), pp.3389-3394. ⟨10.1109/TNS.2014.2363120⟩
Article dans une revue hal-04056468 v1

A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems

Ahn Duc Tran , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel et al.
Journal of Electronic Testing: : Theory and Applications, 2014, 30 (4), pp.401-413. ⟨10.1007/s10836-014-5459-3⟩
Article dans une revue lirmm-01272958 v1

Dynamic Test Methods for COTS SRAMs

Georgios Tsiligiannis , Luigi Dilillo , Viyas Gupta , Alberto Bosio , Patrick Girard et al.
IEEE Transactions on Nuclear Science, 2014, 61 (6), pp.3095-3102. ⟨10.1109/TNS.2014.2363123⟩
Article dans une revue lirmm-01234463 v1
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Evaluating a Radiation Monitor for Mixed-Field Environments based on SRAM Technology

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
Journal of Instrumentation, 2014, 9 (5), pp.#C05052. ⟨10.1088/1748-0221/9/05/C05052⟩
Article dans une revue lirmm-01234448 v1

An SRAM Based Monitor for Mixed-Field Radiation Environments

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
IEEE Transactions on Nuclear Science, 2014, 61 (4), pp.1663-1670. ⟨10.1109/TNS.2014.2299733⟩
Article dans une revue lirmm-01234441 v1
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Globally Constrained Locally Optimized 3-D Power Delivery Networks

Aida Todri-Sanial , Sandip Kundu , Patrick Girard , Alberto Bosio , Luigi Dilillo et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014, 22 (10), pp.2131-2144. ⟨10.1109/TVLSI.2013.2283800⟩
Article dans une revue lirmm-01255754 v1

Multiple Cell Upset Classification in Commercial SRAMs

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
IEEE Transactions on Nuclear Science, 2014, 61 (4), pp.1747-1754. ⟨10.1109/TNS.2014.2313742⟩
Article dans une revue lirmm-01234446 v1

A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014, 22 (11), pp.2326-2335. ⟨10.1109/TVLSI.2013.2294080⟩
Article dans une revue lirmm-01248578 v1

Testing a Commercial MRAM under Neutron and Alpha Radiation in Dynamic Mode

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Aida Todri-Sanial et al.
IEEE Transactions on Nuclear Science, 2013, 60 (4), pp.2617-2622. ⟨10.1109/TNS.2013.2239311⟩
Article dans une revue lirmm-00805005 v1
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A Study of Tapered 3-D TSVs for Power and Thermal Integrity

Aida Todri-Sanial , Sandip Kundu , Patrick Girard , Alberto Bosio , Luigi Dilillo et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2013, 21 (2), pp.306-319. ⟨10.1109/TVLSI.2012.2187081⟩
Article dans une revue lirmm-00806776 v1
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Uncorrelated Power Supply Noise and Ground Bounce Consideration for Test Pattern Generation

Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2013, 21 (5), pp.958-970. ⟨10.1109/TVLSI.2012.2197427⟩
Article dans une revue lirmm-00806774 v1

Analysis and Fault Modeling of Actual Resistive Defects in ATMELtm eFlash Memories

Pierre-Didier Mauroux , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
Journal of Electronic Testing: : Theory and Applications, 2012, 28 (2), pp.215-228. ⟨10.1007/s10836-012-5277-4⟩
Article dans une revue istex lirmm-00806773 v1

Impact of Resistive-Bridging Defects in SRAM at Different Technology Nodes

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
Journal of Electronic Testing: : Theory and Applications, 2012, 28 (3), pp.317-329. ⟨10.1007/s10836-012-5291-6⟩
Article dans une revue istex lirmm-00805017 v1

A Comprehensive Framework for Logic Diagnosis of Arbitrary Defects

Alberto Bosio , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel
IEEE Transactions on Computers, 2010, 59 (3), pp.289-300. ⟨10.1109/TC.2009.177⟩
Article dans une revue lirmm-00553545 v1

A Comprehensive Analysis of Transition Fault Coverage and Test Power Dissipation for LOS and LOC Schemes

Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
Journal of Low Power Electronics, 2010, 6 (2), pp.359-374. ⟨10.1166/jolpe.2010.1086⟩
Article dans une revue lirmm-00553548 v1

SoC Yield Improvement - Using TMR Architectures for Manufacturing Defect Tolerance in Logic Cores

Julien Vial , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
International Journal On Advances in Systems and Measurements, 2010, 3 (1/2), pp.1-10
Article dans une revue lirmm-00553567 v1

Is TMR Suitable for Yield Improvement ?

Julien Vial , Arnaud Virazel , Alberto Bosio , Patrick Girard , Christian Landrault et al.
IET Computers & Digital Techniques, 2009, 3 (6), pp.581-592. ⟨10.1049/iet-cdt.2008.0127⟩
Article dans une revue lirmm-00406961 v1

Analysis of Resistive-Open Defects in SRAM Sense Amplifiers

Alexandre Ney , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2009, 17 (10), pp.1556-1559. ⟨10.1109/TVLSI.2008.2005194⟩
Article dans une revue lirmm-00371367 v1

A SPICE-Like 2T-FLOTOX Core-Cell Model for Defect Injection and Faulty Behavior Prediction in eFlash

Olivier Ginez , Jean-Michel Daga , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
Journal of Electronic Testing: : Theory and Applications, 2009, N/A, pp.127-144. ⟨10.1007/s10836-008-5096-9⟩
Article dans une revue istex lirmm-00371370 v1

New March Elements for Address Decoder Open and Resistive Open Fault Detection in SRAM Memories

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Simone Borri et al.
Journal of Integrated Circuits and Systems, 2008, 3 (1), pp.7-12. ⟨10.29292/jics.v3i1.276⟩
Article dans une revue lirmm-00341793 v1

A Selective Scan Slice Encoding Technique for Test Data Volume and Test Power Reduction

Nabil Badereddine , Zhanglei Wang , Patrick Girard , Krishnendu Chakrabarty , Arnaud Virazel et al.
Journal of Electronic Testing: : Theory and Applications, 2008, 24 (4), pp.353-364. ⟨10.1007/s10836-007-5053-z⟩
Article dans une revue istex lirmm-00331296 v1
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Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
Journal of Electronic Testing: : Theory and Applications, 2007, 23 (3), pp.435-444. ⟨10.1007/s10836-007-5003-9⟩
Article dans une revue lirmm-00194254 v1

ADOFs and Resistive-ADOFs in SRAM Address Decoders: Test Conditions and March Solutions

Patrick Girard , Luigi Dilillo , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan et al.
Journal of Electronic Testing: : Theory and Applications, 2006, 22 (3), pp.287-296. ⟨10.1007/s10836-006-7761-1⟩
Article dans une revue istex lirmm-00134769 v1

A Gated Clock Scheme for Low Power Testing of Logic Cores

Christian Landrault , Yannick Bonhomme , Arnaud Virazel , Patrick Girard , Loïs Guiller et al.
Journal of Electronic Testing: : Theory and Applications, 2006, 22 (1), pp.89-99. ⟨10.1007/s10836-006-6259-1⟩
Article dans une revue istex lirmm-00134766 v1
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Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Simone Borri et al.
Journal of Electronic Testing: : Theory and Applications, 2005, 21 (5), pp.551-561. ⟨10.1007/s10836-005-1169-1⟩
Article dans une revue istex lirmm-00105314 v1
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Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test

Simone Borri , Magali Bastian Hage-Hassan , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
Journal of Electronic Testing: : Theory and Applications, 2005, 21 (2), pp.169-179. ⟨10.1007/s10836-005-6146-1⟩
Article dans une revue lirmm-00105313 v1

Hardware Generation of Random Single Input Change Test Sequence

René M. G. David , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
Journal of Electronic Testing: : Theory and Applications, 2002, 18 (2), pp.145-157. ⟨10.1023/A:1014941525735⟩
Article dans une revue istex lirmm-00268540 v1

High Defect Coverage with Low Power Test Sequences in a BIST Environment

Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel , Hans-Joachim Wunderlich
IEEE Design & Test, 2002, 19 (5), pp.44-52. ⟨10.1109/MDT.2002.1033791⟩
Article dans une revue lirmm-00268585 v1
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Delay Fault Testing: Choosing Between Random SIC and Random MIC Test Sequences

Arnaud Virazel , René M. G. David , Patrick Girard , Christian Landrault , Serge Pravossoudovitch
Journal of Electronic Testing: : Theory and Applications, 2001, 17 (3/4), pp.233-241. ⟨10.1023/A:1012259227622⟩
Article dans une revue lirmm-00345796 v1

A Scan-BIST Structure to Test Delay Faults in Sequential Circuits

Patrick Girard , Christian Landrault , Véronique Moreda , Serge Pravossoudovitch , Arnaud Virazel
Journal of Electronic Testing: : Theory and Applications, 1999, 14 (1/2), pp.95-102. ⟨10.1023/A:1008305507376⟩
Article dans une revue istex lirmm-00345794 v1
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A New Scan-BIST Structures to Test delay Faults in Sequential Circuits

Patrick Girard , Christian Landrault , Véronique Moreda , Serge Pravossoudovitch , Arnaud Virazel
Journal of Electronic Testing: : Theory and Applications, 1999, 14, pp.95-102. ⟨10.1023/A:1008305507376⟩
Article dans une revue istex lirmm-00345797 v1
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Accelerating Cell-Aware Model Generation for Sequential Cells using Graph Theory

Gianmarco Mongelli , Eric Faehn , Dylan Robins , Patrick Girard , Arnaud Virazel
DATE 2025 - 28th Design, Automation and Test in Europe Conference and Exhibition, Mar 2025, Lyon, France. In press
Communication dans un congrès lirmm-04955115 v1
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A Fast and Efficient Graph-Based methodology for Cell-Aware Model Generation

Gianmarco Mongelli , Eric Faehn , Dylan Robins , Patrick Girard , Arnaud Virazel
ITC 2024 - IEEE International Test Conference, Nov 2024, San Diego, United States. pp.270-279, ⟨10.1109/ITC51657.2024.00047⟩
Communication dans un congrès lirmm-04738192 v1
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Approximate Computing for Test and Test of Approximate Computing

Mario Barbareschi , Alberto Bosio , Patrick Girard , Bastien Deveautour , Marcello Traiola et al.
IEEE Workshop on Top Picks in VLSI Test and Reliability, Nov 2024, San Diego, United States. pp.1-2
Communication dans un congrès lirmm-04738424 v1
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Producing a Bidirectional ATPG Compliant Verilog-HDL Memory Model of SRAM

Dorian Ronga , Xhesila Xhafa , Eric Faehn , Patrick Girard , Thibault Vayssade et al.
DTTIS 2024 - IEEE International Conference on Design, Test & Technology of Integrated Systems, Oct 2024, Aix-en-Provence, France. pp.1-6, ⟨10.1109/DTTIS62212.2024.10780141⟩
Communication dans un congrès lirmm-04738159 v1
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Producing a Bidirectional ATPG Compliant Verilog-HDL Memory Model of SRAM Memory

Dorian Ronga , Xhesila Xhafa , Thibault Vayssade , Arnaud Virazel
18e Colloque National du GDR SoC², Jun 2024, Toulouse, France
Communication dans un congrès lirmm-04739569 v1
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Design for Advanced Test and Safety for Image and Photonic Sensors

Julia Lefèvre , Philippe Debaud , Arnaud Virazel , Patrick Girard
TTTC’s E. J. McCluskey Best Doctoral Thesis Award Contest at ETS’24 Semifinal, May 2024, The Hague, Netherlands
Communication dans un congrès lirmm-04739546 v1
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A Structural Testing Approach for SRAM Address Decoders using Cell-Aware Methodology

Xhesila Xhafa , Eric Faehn , Patrick Girard , Arnaud Virazel
DFT 2024 - 37th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2024, Harwell, United Kingdom. pp.1-4, ⟨10.1109/DFT63277.2024.10753545⟩
Communication dans un congrès lirmm-04738361 v1
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A Graph-Based Methodology for Speeding up Cell-Aware Model Generation

Gianmarco Mongelli , Xhesila Xhafa , Eric Faehn , Dylan Robins , Patrick Girard et al.
IOLTS 2024 - 30th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2024, Rennes, France. pp.1-6, ⟨10.1109/IOLTS60994.2024.10616062⟩
Communication dans un congrès lirmm-04738312 v1

A Structural Testing Approach for SRAMs using Cell-Aware Methodology

Xhesila Xhafa , Eric Faehn , Patrick Girard , Arnaud Virazel
South European Test Seminar, Mar 2024, Claviere, Italy
Communication dans un congrès lirmm-04739520 v1
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A Novel March Test Algorithm for Testing 8T SRAM-based IMC Architectures

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noel , Arnaud Virazel
DATE 2024 - 27th Design, Automation & Test in Europe Conference & Exhibition, Mar 2024, Valence, Spain. pp.1-6, ⟨10.23919/DATE58400.2024.10546583⟩
Communication dans un congrès hal-04658584 v1
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Comparaison des Approches de Lockstep pour la Tolérance aux Fautes des FPGAs Utilisés en Milieu Radiatif

Hugo Closquinet , Florent Miller , Patrick Girard , Thibault Vayssade , Arnaud Virazel
18e Colloque National du GDR SoC², Jun 2024, Toulouse, France
Communication dans un congrès lirmm-04739624 v1

Method and Techniques to Speed-Up Cell-Aware Model Generation

Gianmarco Mongelli , Eric Faehn , Dylan Robins , Patrick Girard , Arnaud Virazel
South European Test Seminar, Mar 2024, Claviere, Italy
Communication dans un congrès lirmm-04739532 v1
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Analysis of Resistive-Open Defects on a Foundry 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noël , Arnaud Virazel
17e Colloque National du GDR SoC², Jun 2023, Lyon, France
Communication dans un congrès lirmm-04565688 v1
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Intra-cell Resistive-Open Defect Analysis on a Foundry 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noël , Arnaud Virazel
ETS 2023 - 28th IEEE European Test Symposium, May 2023, Venise, Italy. pp.1-4, ⟨10.1109/ETS56758.2023.10174107⟩
Communication dans un congrès hal-04164663 v1

Learning-Based Characterization Models for Quality Assurance of Emerging Memory Technologies

Xhesila Xhafa , Patrick Girard , Arnaud Virazel
ETS 2023 - 28th IEEE European Test Symposium, May 2023, Venezia, Italy. pp.1-2, ⟨10.1109/ETS56758.2023.10174202⟩
Communication dans un congrès hal-04164855 v1

On Using Cell-Aware Methodology for SRAM Bit Cell Testing

Xhesila Xhafa , Aymen Ladhar , Eric Faehn , Lorena Anghel , Gregory Di Pendina et al.
ETS 2023 - 28th IEEE European Test Symposium, May 2023, Venezia, Italy. pp.1-4, ⟨10.1109/ETS56758.2023.10174118⟩
Communication dans un congrès hal-04164704 v1
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Predictor BIST: An "All-in-One" Optical Test Solution for CMOS Image Sensors

Julia Lefèvre , Philippe Debaud , Patrick Girard , Arnaud Virazel
ITC 2023 - IEEE International Test Conference, Oct 2023, Anaheim, United States. pp.310-319, ⟨10.1109/ITC51656.2023.00048⟩
Communication dans un congrès lirmm-04240449 v1
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Analysis of Read Port Short Defects in an 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noel , Arnaud Virazel
16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Communication dans un congrès lirmm-03990078 v1
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A Generic Fast and Low Cost BIST Solution for CMOS Image Sensors

Julia Lefèvre , Philippe Debaud , Patrick Girard , Arnaud Virazel
ETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-2, ⟨10.1109/ETS54262.2022.9810458⟩
Communication dans un congrès lirmm-03770756 v1
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A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing

Sébastien Lapeyre , Nicolas Valette , Marc Merandat , Marie-Lise Flottes , Arnaud Virazel et al.
ETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-4, ⟨10.1109/ETS54262.2022.9810364⟩
Communication dans un congrès lirmm-03739783 v1
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A Comprehensive Learning-Based Flow for Cell-Aware Model Generation

Pierre d’Hondt , Aymen Ladhar , Patrick Girard , Arnaud Virazel
ITC 2022 - IEEE International Test Conference, Sep 2022, Anaheim, United States. pp.484-488, ⟨10.1109/ITC50671.2022.00057⟩
Communication dans un congrès lirmm-03770147 v1

Configuring a Universal BIST Solution for CMOS Image Sensors

Julia Lefèvre , Philippe Debaud , Patrick Girard , Arnaud Virazel
16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Communication dans un congrès lirmm-03988569 v1
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Effective techniques for automatically improving the transition delay fault coverage of Self-Test Libraries

Riccardo Cantoro , Francesco Garau , Patrick Girard , Nima Kolahimahmoudi , Sandro Sartoni et al.
ETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-2, ⟨10.1109/ETS54262.2022.9810392⟩
Communication dans un congrès lirmm-03739788 v1
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On Using Cell-Aware Models for Representing SRAM Architecture

Xhesila Xhafa , Aymen Ladhar , Eric Faehn , Lorena Anghel , Gregory Di Pendina et al.
16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Communication dans un congrès lirmm-03987914 v1
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Reducing Overprovision of Triple Modular Reduncancy Owing to Approximate Computing

Bastien Deveautour , Marcello Traiola , Arnaud Virazel , Patrick Girard
IOLTS 2021 - 27th IEEE International Symposium on On-Line Testing and Robust System Design, Jun 2021, Torino, Italy. pp.1-7, ⟨10.1109/IOLTS52814.2021.9486699⟩
Communication dans un congrès lirmm-03380025 v1
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Preliminary Defect Analysis of 8T SRAM Cells Used for In-Memory Computing

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Arnaud Virazel
15e Colloque National du GDR SoC², Jun 2021, Rennes, France
Communication dans un congrès lirmm-03994467 v1
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Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement

Riccardo Cantoro , Patrick Girard , Riccardo Masante , Sandro Sartoni , Matteo Sonza Reorda et al.
PESW 2021 - 9th Prague Embedded Systems Workshop, Jul 2021, Horoměřice, Czech Republic
Communication dans un congrès lirmm-03988459 v1
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Preliminary Defect Analysis of 8T SRAM Cells for In-Memory Computing Architectures

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Arnaud Virazel
DTIS 2021 - 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Jun 2021, Montpellier, France. ⟨10.1109/DTIS53253.2021.9505101⟩
Communication dans un congrès lirmm-03377433 v1
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A Fast and Low Cost Embedded Test Solution for CMOS Image Sensors

Julia Lefèvre , Philippe Debaud , Patrick Girard , Arnaud Virazel
ITC 2021 - IEEE International Test Conference, Oct 2021, Online, United States. pp.1-9, ⟨10.1109/ITC50571.2021.00007⟩
Communication dans un congrès lirmm-03377562 v1
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Emerging Computing Devices: Challenges and Opportunities for Test and Reliability

Alberto Bosio , Ian O'Connor , Marcello Traiola , Jorge Echavarria , Jürgen Teich et al.
ETS 2021 - 26th IEEE European Test Symposium, May 2021, Bruges, Belgium. pp.1-10, ⟨10.1109/ETS50041.2021.9465409⟩
Communication dans un congrès lirmm-03379074 v1
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A Novel BIST Engine for CMOS Image Sensors

Julia Lefèvre , Philippe Debaud , Patrick Girard , Arnaud Virazel
15e Colloque National du GDR SoC², Jun 2021, Rennes, France
Communication dans un congrès lirmm-03987828 v1
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Cell-Aware Diagnosis of Customer Returns Using Bayesian Inference

Safa Mhamdi , Patrick Girard , Arnaud Virazel , Alberto Bosio , Aymen Ladhar
ISQED 2021 - 22nd International Symposium on Quality Electronic Design, Apr 2021, Santa Clara (virtual), United States. pp.48-53, ⟨10.1109/ISQED51717.2021.9424337⟩
Communication dans un congrès hal-03266815 v1
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A Learning-Based Methodology for Accelerating Cell-Aware Model Generation

Pierre d’Hondt , Aymen Ladhar , Patrick Girard , Arnaud Virazel
DATE 2021 - 24th Design, Automation and Test in Europe Conference and Exhibition, Feb 2021, Grenoble, France. pp.1580-1585, ⟨10.23919/DATE51398.2021.9474227⟩
Communication dans un congrès lirmm-03377383 v1
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Accelerating Cell-Aware Model Generation Through Machine Learning

Pierre d’Hondt , Aymen Ladhar , Patrick Girard , Arnaud Virazel
15e Colloque National du GDR SoC², Jun 2021, Rennes, France
Communication dans un congrès lirmm-03987805 v1
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A Learning-Based Cell-Aware Diagnosis Flow for Industrial Customer Returns

Safa Mhamdi , Patrick Girard , Arnaud Virazel , Alberto Bosio , Aymen Ladhar
ITC 2020 - IEEE International Test Conference, Nov 2020, Washington DC, United States. pp.1-10, ⟨10.1109/ITC44778.2020.9325246⟩
Communication dans un congrès lirmm-03034264 v1
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A Plug and Play Digital ABIST Controller for Analog Sensors in Secure Devices

Sébastien Lapeyre , Nicolas Valette , Marc Merandat , Marie-Lise Flottes , Bruno Rouzeyre et al.
ETS 2021 - 26th IEEE European Test Symposium, May 2021, Bruges, Belgium. pp.1-4, ⟨10.1109/ETS50041.2021.9465480⟩
Communication dans un congrès lirmm-03305266 v1
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Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage Improvement

Riccardo Cantoro , Patrick Girard , Riccardo Masante , Sandro Sartoni , Matteo Sonza Reorda et al.
IOLTS 2021 - 27th IEEE International Symposium on On-Line Testing and Robust System Design, Jun 2021, Torino, Italy. pp.1-4, ⟨10.1109/IOLTS52814.2021.9486711⟩
Communication dans un congrès lirmm-03380201 v1
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A CMOS OxRAM-Based Neuron Circuit Hardened with Enclosed Layout Transistors for Aerospace Applications

Pablo Ilha Vaz , Patrick Girard , Arnaud Virazel , Hassen Aziza
IOLTS 2020 - 26th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2020, Napoli, Italy. pp.1-6, ⟨10.1109/IOLTS50870.2020.9159709⟩
Communication dans un congrès lirmm-03035780 v1
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Maximizing Yield for Approximate Integrated Circuits

Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
DATE 2020 - 23rd Design, Automation and Test in Europe Conference and Exhibition, Mar 2020, Grenoble, France. pp.810-815, ⟨10.23919/DATE48585.2020.9116341⟩
Communication dans un congrès lirmm-03036002 v1
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QAMR: an Approximation-Based FullyReliable TMR Alternative for Area Overhead Reduction

Bastien Deveautour , Marcello Traiola , Arnaud Virazel , Patrick Girard
ETS 2020 - 25th IEEE European Test Symposium, May 2020, Tallinn, Estonia. pp.1-6, ⟨10.1109/ETS48528.2020.9131574⟩
Communication dans un congrès lirmm-03035640 v1
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A Novel Test Flow for Approximate Digital Circuits

Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
DATE 2020 - EDAA/IEEE/ACM Design Automation & Test in Europe Conference, PhD Forum, Mar 2020, Grenoble, France
Communication dans un congrès lirmm-03993654 v1
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Design, Verification, Test and In-Field Implications of Approximate Computing Systems

Alberto Bosio , Stefano Di Carlo , Patrick Girard , Ernesto Sanchez , Alessandro Savino et al.
ETS 2020 - 25th IEEE European Test Symposium, May 2020, Tallinn, Estonia. pp.1-10, ⟨10.1109/ETS48528.2020.9131557⟩
Communication dans un congrès lirmm-03035724 v1
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Learning-Based Cell-Aware Defect Diagnosis of Customer Returns

Safa Mhamdi , Patrick Girard , Arnaud Virazel , Alberto Bosio , Aymen Ladhar
ETS 2020 - 25th IEEE European Test Symposium, May 2020, Tallinn, Estonia. pp.1-2, ⟨10.1109/ETS48528.2020.9131601⟩
Communication dans un congrès lirmm-03035669 v1
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Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs

Florence Azaïs , Serge Bernard , Mariane Comte , Bastien Deveautour , Sophie Dupuis et al.
IOLTS 2020 - 26th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2020, Napoli, Italy. pp.1-4, ⟨10.1109/IOLTS50870.2020.9159723⟩
Communication dans un congrès lirmm-02993384 v1
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Investigation of Mean-Error Metrics for Testing Approximate Integrated Circuits

Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbarcschi , Alberto Bosio
DFT 2018 - 31st IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2018, Chicago, United States. pp.1-6, ⟨10.1109/DFT.2018.8602939⟩
Communication dans un congrès lirmm-02099895 v1

Cell-Aware Diagnosis of Automotive Customer Returns Based on Supervised Learning

Safa Mhamdi , Patrick Girard , Arnaud Virazel , Alberto Bosio , Aymen Ladhar
ART 2019 - 4th IEEE Automotive Reliability and Test Workshop, Nov 2019, Washington, United States
Communication dans un congrès lirmm-02395653 v1

A Capacitor-Less CMOS Neuron Circuit for Neuromemristive Networks

Hassen Aziza , Mathieu Moreau , Jean-Michel Portal , Arnaud Virazel , Patrick Girard
NEWCAS 2019 - 17th IEEE International Conference on Electronics Circuits and Systems, Jun 2019, Munich, Germany. ⟨10.1109/NEWCAS44328.2019.8961278⟩
Communication dans un congrès lirmm-02395325 v1
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Towards Improvement of Mission Mode Failure Diagnosis for System-on-Chip

Safa Mhamdi , Arnaud Virazel , Patrick Girard , Alberto Bosio , Etienne Auvray et al.
IOLTS 2019 - 25th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2019, Rhodes, Greece. pp.21-26, ⟨10.1109/IOLTS.2019.8854388⟩
Communication dans un congrès lirmm-02395493 v1

An Effective Intra-Cell Diagnosis Flow for Industrial SRAMs

Tien-Phu Ho , Eric Faehn , Arnaud Virazel , Alberto Bosio , Patrick Girard
ITC 2018 - IEEE International Test Conference, Oct 2018, Phoenix, United States. pp.1-8, ⟨10.1109/TEST.2018.8624799⟩
Communication dans un congrès lirmm-02099874 v1
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On the Comparison of Different ATPG approaches for Approximate Integrated Circuits

Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
DDECS 2018 - 1st International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2018, Budapest, Hungary. pp.85-90, ⟨10.1109/DDECS.2018.00022⟩
Communication dans un congrès lirmm-03032856 v1
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Is aproximate computing suitable for selective hardening of arithmetic circuits?

Bastien Deveautour , Arnaud Virazel , Patrick Girard , Serge Pravossoudovitch , Valentin Gherman
DTIS 2018 - 13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, Apr 2018, Taormina, Italy. pp.1-6, ⟨10.1109/DTIS.2018.8368559⟩
Communication dans un congrès lirmm-03130537 v1
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Testing Approximate Digital Circuits: Challenges and Opportunities

Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
LATS 2018 - 19th IEEE Latin American Test Symposium, Mar 2018, Sao Paulo, Brazil. pp.1-6, ⟨10.1109/LATW.2018.8349681⟩
Communication dans un congrès lirmm-03033024 v1
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Can we Approximate the Test of Integrated Circuits?

Imran Wali , Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi et al.
WAPCO: Workshop On Approximate Computing, Jan 2017, Stockholm, Sweden
Communication dans un congrès lirmm-02004418 v1

Approximate computing: Design & test for integrated circuits

Arnaud Virazel , Alberto Bosio , Patrick Girard , Mario Barbareschi
LATS 2017 - 18th IEEE Latin American Test Symposium, Mar 2017, Bogota, Colombia. ⟨10.1109/LATW.2017.7906737⟩
Communication dans un congrès lirmm-01718600 v1

Towards digital circuit approximation by exploiting fault simulation

Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
EWDTS: East-West Design & Test Symposium, Sep 2017, Novi Sad, Serbia. ⟨10.1109/EWDTS.2017.8110108⟩
Communication dans un congrès lirmm-01718583 v1
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Towards approximation during test of Integrated Circuits

Imran Wali , Marcello Traiola , Arnaud Virazel , Patrick Girard , Mario Barbareschi et al.
DDECS 2017 - 20th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2017, Dresden, Germany. pp.28-33, ⟨10.1109/DDECS.2017.7934574⟩
Communication dans un congrès lirmm-01718580 v1

An effective fault-injection framework for memory reliability enhancement perspectives

Ghita Harcha , Alberto Bosio , Patrick Girard , Arnaud Virazel , Paolo Bernardi
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2017, Palma de Mallorca, Spain. ⟨10.1109/DTIS.2017.7930172⟩
Communication dans un congrès lirmm-01718579 v1

An Advanced Diagnosis Flow for SRAMs

Arnaud Virazel , Tien-Phu Ho , Alberto Bosio
ISTFA 2017 - 43rd International Symposium for Testing and Failure Analysis, Nov 2017, Pasadena, United States. pp.538-543, ⟨10.31399/asm.cp.istfa2017p0538⟩
Communication dans un congrès lirmm-01718596 v1

Improving the Functional Test Delay Fault Coverage: A Microprocessor Case Study

Aymen Touati , Alberto Bosio , Patrick Girard , Arnaud Virazel , Paolo Bernardi et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2016, Pittsburgh, PA, United States. pp.731-736, ⟨10.1109/ISVLSI.2016.42⟩
Communication dans un congrès lirmm-01446917 v1

An effective BIST architecture for power-gating mechanisms in low-power SRAMs

Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel , Leonardo B. Zordan
ISQED 2016 - 17th International Symposium on Quality Electronic Design, Mar 2016, Santa Clara, CA, United States. pp.185-191, ⟨10.1109/ISQED.2016.7479198⟩
Communication dans un congrès lirmm-01457424 v1

A Case Study on the Approximate Test of Integrated Circuits

Imran Wali , Arnaud Virazel , Patrick Girard , Mario Barbareschi , Alberto Bosio
AC: Approximate Computing, Oct 2016, Pittsburgh, PA, United States
Communication dans un congrès lirmm-01718609 v1

Test of Low Power Circuits: Issues and Industrial Practices

Alberto Bosio , Patrick Girard , Arnaud Virazel
ICECS: International Conference on Electronics, Circuits and Systems, Dec 2016, Monte Carlo, Monaco
Communication dans un congrès lirmm-01433330 v1

A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits

Imran Wali , Bastien Deveautour , Arnaud Virazel , Alberto Bosio , Patrick Girard et al.
ETS: European Test Symposium, May 2016, Amsterdam, Netherlands. ⟨10.1109/ETS.2016.7519296⟩
Communication dans un congrès hal-01444734 v1

A Hybrid Power Estimation Technique to improve IP power models quality

Alejandro Nocua , Arnaud Virazel , Alberto Bosio , Patrick Girard , Cyril Chevalier
VLSI-SoC: Very Large Scale Integration and System-on-Chip, Sep 2016, Tallin, Estonia. ⟨10.1109/VLSI-SoC.2016.7753582⟩
Communication dans un congrès lirmm-01689544 v1

An effective approach for functional test programs compaction

Aymen Touati , Alberto Bosio , Patrick Girard , Arnaud Virazel , Paolo Bernardi et al.
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2016, Kosice, Slovakia. ⟨10.1109/DDECS.2016.7482466⟩
Communication dans un congrès lirmm-01457396 v1

Auto-adaptive ultra-low power IC

Alberto Bosio , Philippe Debaud , Patrick Girard , Stéphane Guilhot , Miroslav Valka et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2016, Istanbaul, Turkey. ⟨10.1109/DTIS.2016.7483886⟩
Communication dans un congrès lirmm-01457361 v1

A hybrid power modeling approach to enhance high-level power models

Alejandro Nocua , Arnaud Virazel , Alberto Bosio , Patrick Girard , Cyril Chevalier
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2016, Kosice, Slovakia. ⟨10.1109/DDECS.2016.7482453⟩
Communication dans un congrès lirmm-01446854 v1

Analysis of Setup & Hold Margins Inside Silicon for Advanced Technology Nodes

Deepak Kumar Arora , Darayus Adil Patel , Nc Shahabuddin , Sanjay Kumar , Navin Kumar Dayani et al.
ISQED 2016 - 17th International Symposium on Quality Electronic Design, Mar 2016, Santa Clara, CA, United States. pp.295-300, ⟨10.1109/ISQED.2016.7479217⟩
Communication dans un congrès lirmm-01433314 v1
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An efficient hybrid power modeling approach for accurate gate-level power estimation

Alejandro Nocua , Arnaud Virazel , Alberto Bosio , Patrick Girard , Cyril Chevalier
ICM: International Conference on Microelectronics, Dec 2015, Casablanca, Morocco. pp.17-20, ⟨10.1109/ICM.2015.7437976⟩
Communication dans un congrès lirmm-01354745 v1

Design space exploration and optimization of a Hybrid Fault-Tolerant Architecture

Imran Wali , Arnaud Virazel , Alberto Bosio , Patrick Girard , Matteo Sonza Reorda
IOLTS: International On-Line Testing Symposium, Jul 2015, Halkidiki, Greece. pp.89-94, ⟨10.1109/IOLTS.2015.7229838⟩
Communication dans un congrès lirmm-01272735 v1

Scan-chain intra-cell defects grading

Aymen Touati , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. ⟨10.1109/DTIS.2015.7127349⟩
Communication dans un congrès lirmm-01272696 v1
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Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology

Sylvain Clerc , Fady Abouzeid , Darayus Adil Patel , Jean-Marc Daveau , Cyril Bottoni et al.
ISQED 2015 - 16th International Symposium on Quality Electronic Design, Apr 2015, Santa Clara, United States. pp.366-370, ⟨10.1109/ISQED.2015.7085453⟩
Communication dans un congrès lirmm-01272913 v1

An effective hybrid fault-tolerant architecture for pipelined cores

Imran Wali , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard
ETS: European Test Symposium, May 2015, Cluj-Napoca, Romania. ⟨10.1109/ETS.2015.7138733⟩
Communication dans un congrès lirmm-01272730 v1

An effective ATPG flow for Gate Delay Faults

Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel , Paolo Bernardi et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. ⟨10.1109/DTIS.2015.7127350⟩
Communication dans un congrès lirmm-01272719 v1
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An Experimental Comparative Study of Fault-Tolerant Architectures

Imran Wali , Arnaud Virazel , Alberto Bosio , Patrick Girard
VALID: Advances in System Testing and Validation Lifecycle, Nov 2015, Barcelone, Spain. pp.1-6
Communication dans un congrès lirmm-01354754 v1
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Exploring the impact of functional test programs re-used for power-aware testing

Aymen Touati , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel et al.
DATE 2015 - 18th Design, Automation and Test in Europe Conference and Exhibition, Mar 2015, Grenoble, France. pp.1277-1280, ⟨10.7873/DATE.2015.1031⟩
Communication dans un congrès lirmm-01272937 v1

Design-for-Diagnosis Architecture for Power Switches

Miroslav Valka , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel et al.
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2015, Belgrade, Serbia. pp.43-48, ⟨10.1109/DDECS.2015.18⟩
Communication dans un congrès lirmm-01272684 v1

An ATPG Flow to Generate Crosstalk-Aware Path Delay Pattern

Anu Asokan , Alberto Bosio , Arnaud Virazel , Luigi Dilillo , Patrick Girard et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.515-520, ⟨10.1109/ISVLSI.2015.99⟩
Communication dans un congrès lirmm-01272933 v1

A Comprehensive Evaluation of Functional Programs for Power-Aware Test

Aymen Touati , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
NATW: North Atlantic Test Workshop, May 2014, Johnson City, NY, United States. pp.69-72, ⟨10.1109/NATW.2014.23⟩
Communication dans un congrès lirmm-01248597 v1
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TSV aware timing analysis and diagnosis in paths with multiple TSVs

Carolina Momo Metzler , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
VTS: VLSI Test Symposium, Apr 2014, Napa, CA, United States. ⟨10.1109/VTS.2014.6818772⟩
Communication dans un congrès lirmm-01248594 v1

Timing-aware ATPG for critical paths with multiple TSVs

Carolina Momo Metzler , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. pp.116-121, ⟨10.1109/DDECS.2014.6868774⟩
Communication dans un congrès lirmm-01248600 v1
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A Delay Probability Metric for Input Pattern Ranking Under Process Variation and Supply Noise

Anu Asokan , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2014, Tampa, FL, United States. pp.226-231, ⟨10.1109/ISVLSI.2014.42⟩
Communication dans un congrès lirmm-01248592 v1

Test and diagnosis of power switches

Miroslav Valka , Alberto Bosio , Luigi Dilillo , Aida Todri-Sanial , Arnaud Virazel et al.
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. pp.213-218, ⟨10.1109/DDECS.2014.6868792⟩
Communication dans un congrès lirmm-01248590 v1

Path delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounce

Anu Asokan , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. pp.207-212, ⟨10.1109/DDECS.2014.6868791⟩
Communication dans un congrès lirmm-01248599 v1

Power supply noise-aware workload assignments for homogeneous 3D MPSoCs with thermal consideration

Yuanqing Cheng , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ASP-DAC: Asia and South Pacific Design Automation Conference, Jan 2014, Singapore, Singapore. pp.544-549, ⟨10.1109/ASPDAC.2014.6742948⟩
Communication dans un congrès lirmm-01248596 v1

iBoX — Jitter based Power Supply Noise sensor

Miroslav Valka , Alberto Bosio , Luigi Dilillo , Aida Todri-Sanial , Arnaud Virazel et al.
ETS: European Test Symposium, May 2014, Paderborn, United States. ⟨10.1109/ETS.2014.6847830⟩
Communication dans un congrès lirmm-01248601 v1

Real-Time Testing of 90nm COTS SRAMs at Concordia Station in Antarctica

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
NSREC: Nuclear and Space Radiation Effects Conference, Jul 2014, Paris, France
Communication dans un congrès lirmm-01237709 v1

Efficient Dynamic Test Methods for COTS SRAMs Under Heavy Ion Irradiation

Georgios Tsiligiannis , Luigi Dilillo , Viyas Gupta , Alberto Bosio , Patrick Girard et al.
NSREC: Nuclear and Space Radiation Effects Conference, Jul 2014, Paris, France
Communication dans un congrès lirmm-01237660 v1

Protecting combinational logic in pipelined microprocessor cores against transient and permanent faults

Imran Wali , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2014, Warsaw, Poland. pp.223-225, ⟨10.1109/DDECS.2014.6868794⟩
Communication dans un congrès lirmm-01248598 v1

On the Generation of Diagnostic Test Set for Intra-cell Defects

Zhenzhou Sun , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel et al.
ATS: Asian Test Symposium, Nov 2014, Hangzhou, China. pp.312-317, ⟨10.1109/ATS.2014.57⟩
Communication dans un congrès lirmm-01272539 v1

Adaptive Source Bias for Improved Resistive-Open Defect Coverage during SRAM Testing

Elena Ioana Vatajelu , Alberto Bosio , Patrick Girard , Aida Todri-Sanial , Arnaud Virazel et al.
ATS: Asian Test Symposium, Nov 2013, Jiaosi Township, Taiwan. pp.109-114, ⟨10.1109/ATS.2013.30⟩
Communication dans un congrès lirmm-01248609 v1

SRAM Soft Error Rate Evaluation Under Atmospheric Neutron Radiation and PVT variations

Georgios Tsiligiannis , Elena Ioana Vatajelu , Luigi Dilillo , Alberto Bosio , Patrick Girard et al.
IOLTS: International On-Line Testing Symposium, Jul 2013, Chania, Crete, Greece. pp.145-150, ⟨10.1109/IOLTS.2013.6604066⟩
Communication dans un congrès lirmm-00818955 v1

On the correlation between Static Noise Margin and Soft Error Rate evaluated for a 40nm SRAM cell

Elena Ioana Vatajelu , Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard et al.
DFT: Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2013, New York, United States. pp.143-148, ⟨10.1109/DFT.2013.6653597⟩
Communication dans un congrès lirmm-01238413 v1

A novel method to mitigate TSV electromigration for 3D ICs

Yuanqing Cheng , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ISVLSI: IEEE Computer Society Annual Symposium on VLSI, Aug 2013, Natal, Brazil. pp.121-126, ⟨10.1109/ISVLSI.2013.6654633⟩
Communication dans un congrès lirmm-01248617 v1
Image document

Test Solution for Data Retention Faults in Low-Power SRAMs

Leonardo B. Zordan , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
DATE 2013 - 16th Design, Automation and Test in Europe Conference, Mar 2013, Grenoble, France. pp.442-447, ⟨10.7873/DATE.2013.099⟩
Communication dans un congrès lirmm-00805140 v1

On the Reuse of Read and Write Assist Circuits to Improve Test Efficiency in Low-Power SRAMs

Leonardo B. Zordan , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
ITC: International Test conference, Sep 2013, Anaheim, CA, United States. pp.1-10, ⟨10.1109/TEST.2013.6651927⟩
Communication dans un congrès lirmm-00818977 v1
Image document

Performance Characterization of TAS-MRAM Architectures in Presence of Capacitive Defects

João Azevedo , Arnaud Virazel , Yuanqing Cheng , Alberto Bosio , Luigi Dilillo et al.
VALID: Advances in System Testing and Validation Lifecycle, Oct 2013, Venice, Italy. pp.39-44
Communication dans un congrès lirmm-01433308 v1

Analyzing resistive-open defects in SRAM core-cell under the effect of process variability

Elena Ioana Vatajelu , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
ETS: European Test Symposium, May 2013, Avignon, France. ⟨10.1109/ETS.2013.6569373⟩
Communication dans un congrès lirmm-01921630 v1

Characterization of an SRAM Based Particle Detector For Mixed-Field Radiation Environments

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
IWASI: International Workshop on Advances in Sensors and Interfaces, Jun 2013, Bari, Italy. pp.75-80, ⟨10.1109/IWASI.2013.6576070⟩
Communication dans un congrès lirmm-00839046 v1

Temperature Impact on the Neutron SER of a Commercial 90nm SRAM

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
NSREC: Nuclear and Space Radiation Effects Conference, Jul 2013, San Francisco, Ca, United States. pp.1-4
Communication dans un congrès lirmm-00805291 v1

Fast and Accurate Electro-Thermal Analysis of Three-Dimensional Power Delivery Networks

Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel
EuroSimE: Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Apr 2013, Wroclaw, Poland. pp.1-4, ⟨10.1109/EuroSimE.2013.6529956⟩
Communication dans un congrès lirmm-00839043 v1

Effect-Cause Intra-Cell Diagnosis at Transistor Level

Zhenzhou Sun , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
ISQED 2013 - 14th International Symposium on Quality Electronic Design, Mar 2013, Santa Clara, CA, United States. pp.460-467, ⟨10.1109/ISQED.2013.6523652⟩
Communication dans un congrès lirmm-00817224 v1
Image document

Multiple-Cell-Upsets on a commercial 90nm SRAM in Dynamic Mode

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
RADECS: Radiation and Its Effects on Components and Systems, Sep 2013, Oxford, United Kingdom. pp.1-4, ⟨10.1109/RADECS.2013.6937429⟩
Communication dans un congrès lirmm-00839062 v1

Mitigate TSV Electromigration for 3D ICs - From the Architecture Perspective

Yuanqing Cheng , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
International Symposium on VLSI, Natale, Brazil. pp.6
Communication dans un congrès lirmm-00839052 v1

Evaluating An SEU Monitor For Mixed-Field Radiation Environments

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
iWoRID: International Workshop on Radiation Imaging Detectors, SOLEIL Synchrotron, Jun 2013, Paris, France
Communication dans un congrès lirmm-01238433 v1

Improving Defect Localization Accuracy by means of Effect-Cause Intra-Cell Diagnosis at Transistor Level

Zhenzhou Sun , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
SDD: Silicon Debug and Diagnosis, Sep 2013, Anaheim, CA, United States
Communication dans un congrès lirmm-00806872 v1

SEU Monitoring in Mixed-Field Radiation Environments of Particle Accelerators

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
RADECS: Radiation and Its Effects on Components and Systems, Sep 2013, Oxford, United Kingdom. pp.1-4, ⟨10.1109/RADECS.2013.6937419⟩
Communication dans un congrès lirmm-00839085 v1

Worst-Case Power Supply Noise and Temperature Distribution Analysis for 3D PDNs with Multiple Clock Domains

Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
NEWCAS: New Circuits and Systems, Jun 2013, Paris, France. ⟨10.1109/NEWCAS.2013.6573628⟩
Communication dans un congrès lirmm-00839042 v1

Analyzing the effect of concurrent variability in the core cells and sense amplifiers on SRAM read access failures

Elena Ioana Vatajelu , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Mar 2013, Abu Dhabi, United Arab Emirates. pp.39-44, ⟨10.1109/DTIS.2013.6527775⟩
Communication dans un congrès lirmm-01248603 v1

A Built-in Scheme for Testing and Repairing Voltage Regulators of Low-Power SRAMs

Leonardo B. Zordan , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
VTS: VLSI Test Symposium, Apr 2013, Berkeley, CA, United States. pp.1-6, ⟨10.1109/VTS.2013.6548894⟩
Communication dans un congrès lirmm-00805366 v1

Computing Detection Probability of Delay Defects in Signal Line TSVs

Carolina Momo Metzler , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ETS: European Test Symposium, May 2013, Avignon, France. ⟨10.1109/ETS.2013.6569349⟩
Communication dans un congrès lirmm-00839044 v1
Image document

Electro-Thermal Analysis of 3D Power Delivery Networks

Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel
DAC: Design Automation Conference, 2012, San Francisco, United States
Communication dans un congrès lirmm-00806836 v1

Dynamic Mode Test of a Commercial 4Mb Toggle MRAM under Neutron Radiation

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Aida Todri-Sanial et al.
RADECS: European Conference on Radiation and Its Effects on Components and Systems, Sep 2012, Biarritz, France. pp.1-4
Communication dans un congrès lirmm-00805165 v1

Radiation Induced Effects on Electronic Systems and ICs

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
SETS: South European Test Seminar, Mar 2012, Sauze d'Oulx, Italy
Communication dans un congrès lirmm-00807055 v1

Fault Localization Improvement through an Intra-Cell Diagnosis Approach

Zhenzhou Sun , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
ISTFA 2012 - 38th International Symposium for Testing and Failure Analysis, Nov 2012, Phoenix, AZ, United States. pp.509-519
Communication dans un congrès lirmm-00806863 v1

Defect Localization Through an Effect-Cause based Intra-Cell Diagnosis

Zhenzhou Sun , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
Colloque GDR SoC-SiP, 2012, Paris, France
Communication dans un congrès lirmm-00806841 v1

Impact of Resistive-Open Defects on the Heat Current of TAS-MRAM Architectures

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
DATE 2012 - 15th Design, Automation and Test in Europe Conference and Exhibition, Mar 2012, Dresden, Germany. pp.532-537, ⟨10.1109/DATE.2012.6176526⟩
Communication dans un congrès lirmm-00689024 v1

SRAM testing under Neutron Radiation for the evaluation of different algorithms stress

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Aida Todri-Sanial et al.
15ème Journées Nationales du Réseau Doctoral en Microélectronique, Jun 2012, Marseille, France
Communication dans un congrès lirmm-00807054 v1

Power Supply Noise Sensor Based on Timing Uncertainty Measurements

Miroslav Valka , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
ATS: Asian Test Symposium, Nov 2012, Niigata, Japan. pp.161-166, ⟨10.1109/ATS.2012.46⟩
Communication dans un congrès lirmm-00806890 v1

Low-power SRAMs Power Mode Control Logic: Failure Analysis and Test Solutions

Leonardo B. Zordan , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
ITC'2012: International Test Conference, Nov 2012, Anaheim, CA, United States. pp.1-10, ⟨10.1109/TEST.2012.6401578⟩
Communication dans un congrès lirmm-00805143 v1

A Novel Framework for Evaluating the SRAM Core-Cell Sensitivity to Neutrons

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Aida Todri-Sanial et al.
RADECS: European Conference on Radiation and Its Effects on Components and Systems, Sep 2012, Biarritz, France. pp.1-4
Communication dans un congrès lirmm-00805163 v1

On Using Address Scrambling for Defect Tolerance in SRAMs

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
International test Conference, Sep 2011, Anaheim, CA, United States. pp.1-8, ⟨10.1109/TEST.2011.6139149⟩
Communication dans un congrès lirmm-00805334 v1

Resistive-Open Defects Affecting Bit-Line Selection in TAS-MRAM Architectures

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
JNRDM: Journées Nationales du Réseau Doctoral en Microélectronique, 2012, Paris, France
Communication dans un congrès lirmm-00806827 v1

Resistive-Open Defect Analysis for Through-Silicon-Vias

Carolina Momo Metzler , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
DCIS 2012 - 27th Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France
Communication dans un congrès lirmm-00806803 v1

Dynamic Mode Testing of SRAMS under Neutron Radiation

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Aida Todri-Sanial et al.
Sixième colloque du GDR SOC-SIP du CNRS, Jun 2012, Paris, France
Communication dans un congrès lirmm-00807053 v1

Defect Analysis in Power Mode Control Logic of Low-Power SRAMs

Leonardo B. Zordan , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
ETS: European Test Symposium, May 2012, Annecy, France. ⟨10.1109/ETS.2012.6233033⟩
Communication dans un congrès lirmm-00805374 v1
Image document

Impact of Resistive-Bridge Defects in TAS-MRAM Architectures

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ATS: Asian Test Symposium, Nov 2012, Niigata, Japan. pp.125-130, ⟨10.1109/ATS.2012.37⟩
Communication dans un congrès lirmm-00806809 v1

A Pseudo-Dynamic Comparator for Error Detection in Fault Tolerant Architectures

Ahn Duc Tran , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
VTS: VLSI Test Symposium, Apr 2012, Hawaii, United States. pp.50-55, ⟨10.1109/VTS.2012.6231079⟩
Communication dans un congrès lirmm-00806778 v1

Advanced Test Methods for SRAMs

Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel
VTS: VLSI Test Symposium, Apr 2012, Hyatt Maui, HI, United States. pp.300-301, ⟨10.1109/VTS.2012.6231070⟩
Communication dans un congrès lirmm-00805049 v1

Evaluation of Test Algorithms Stress Effect on SRAMs under Neutron Radiation

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Aida Todri-Sanial et al.
IOLTS: International On-Line Testing Symposium, Jun 2012, Sitges, Spain. pp.212-222, ⟨10.1109/IOLTS.2012.6313853⟩
Communication dans un congrès lirmm-00805373 v1

Adaptive Voltage Scaling via Effective On-Chip Timing Uncertainty Measurements

Miroslav Valka , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
Colloque GDR SoC-SiP, 2012, Paris, France
Communication dans un congrès lirmm-00806859 v1

Impacts of Resistive-Open Defects in the Word-Line Selection of TAS-MRAMs

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
Colloque GDR SoC-SiP, 2012, Paris, France
Communication dans un congrès lirmm-00806842 v1

Through-Silicon-Via Resistive-Open Defect Analysis

Carolina Momo Metzler , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ETS: European Test Symposium, May 2012, Annecy, France. ⟨10.1109/ETS.2012.6233037⟩
Communication dans un congrès lirmm-00806848 v1

Why and How Controlling Power Consumption During Test: A Survey

Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial , Arnaud Virazel
ATS: Asian Test Symposium, Nov 2012, Niigata, Japan. pp. 221-226, ⟨10.1109/ATS.2012.30⟩
Communication dans un congrès lirmm-00818984 v1

Complete Framework for the Estimation of the SRAM Core-Cell Resilience to Radiation

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Aida Todri-Sanial et al.
RADECS: Radiation and its Effects on Components and Systems, Sep 2012, Biarritz, France
Communication dans un congrès hal-01935785 v1

Optimized March Test Flow for Detecting Memory Faults in SRAM Devices Under Bit Line Coupling

Leonardo B. Zordan , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
GDR SOC-SIP'11 : Colloque GDR SoC-SiP, Lyon, France
Communication dans un congrès lirmm-00679522 v1

A DfT Solution for Oxide Thickness Varitions in ATMEL eFlash Technology

Pierre-Didier Mauroux , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, 2011, Athènes, Greece
Communication dans un congrès lirmm-00647750 v1

Power Reduction Through X-filling of Transition Fault Test Vectors for LOS Testing

Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, 2011, Athènes, Greece. ⟨10.1109/DTIS.2011.5941434⟩
Communication dans un congrès lirmm-00647760 v1

Variability Analysis of an SRAM Test Chip

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
ETS: European Test Symposium, May 2011, Trondheim, Norway
Communication dans un congrès lirmm-00651791 v1

On using a SPICE-like TSTAC™ eFlash model for design and test

Pierre-Didier Mauroux , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
DDECS: Design and Diagnostics of Electronic Circuits ans Systems, Apr 2011, Cottbus, Germany. pp.359-370, ⟨10.1109/DDECS.2011.5783111⟩
Communication dans un congrès lirmm-00592203 v1

A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits

Ahn Duc Tran , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
GDR SOC-SIP'11 : Colloque GDR SoC-SiP, Lyon, France
Communication dans un congrès lirmm-00679513 v1

Error Resilient Infrastructure for Data Transfer in a Distributed Neutron Detector

Luigi Dilillo , Alberto Bosio , Miroslav Valka , Patrick Girard , Serge Pravossoudovitch et al.
DFT 2011 - International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2011, Vancouver, Canada. pp.294-301, ⟨10.1109/DFT.2011.41⟩
Communication dans un congrès lirmm-00651226 v1

Failure Analysis and Test Solutions for Low-Power SRAMs

Leonardo B. Zordan , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
ATS: Asian Test Symposium, Nov 2011, New Delhi, India. pp.459-460, ⟨10.1109/ATS.2011.97⟩
Communication dans un congrès lirmm-00805123 v1

Mapping Test Power to Functional Power through Smart X-Filling for LOS Scheme

Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
LPonTR'11: IEEE International Workshop on the Impact of Low Power on Test and Reliability, Trondheim, Norway
Communication dans un congrès lirmm-00651905 v1
Image document

A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits

Ahn Duc Tran , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ATS 2011 - 20th IEEE Asian Test Symposium, Nov 2011, New Delhi, India. pp.136-141, ⟨10.1109/ATS.2011.89⟩
Communication dans un congrès lirmm-00651238 v1

Effective Launch-to-Capture Power Reduction for LOS Scheme with Adjacent-Probability-Based X-Filling

Kohei Miyase , Yuta Uchinodan , Kazunari Enokimoto , Yuta Yamato , Xiaoqing Wen et al.
ATS: Asian Test Symposium, 2011, New Delhi, India. pp.21-23
Communication dans un congrès lirmm-00651247 v1

Test and Reliability of Magnetic Random Access Memories

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
GDR SOC-SIP'11: Colloque GDR SoC-SiP, Lyon, France
Communication dans un congrès lirmm-00679516 v1

A Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing

Miroslav Valka , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
ETS 2011 - 16th IEEE European Test Symposium, May 2011, Trondheim, Norway. pp.153-158, ⟨10.1109/ETS.2011.21⟩
Communication dans un congrès lirmm-00647822 v1

On Using Address Scrambling to Implement Defect Tolerance in SRAMs

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
ITC'2011: International Test Conference, Sep 2011, Anaheim, CA, United States. pp.N/A
Communication dans un congrès lirmm-00647773 v1

Power Supply Noise and Ground Bounce Aware Pattern Generation for Delay Testing

Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
NEWCAS: International New Circuits and Systems Conference, Jun 2011, Bordeaux, France. pp.73-76, ⟨10.1109/NEWCAS.2011.5981222⟩
Communication dans un congrès lirmm-00647815 v1

Power-Aware Test Pattern Generation for At-Speed LOS Testing

Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial , Arnaud Virazel et al.
ATS: Asian Test Symposium, Nov 2011, New Delhi, India. pp.506-510
Communication dans un congrès lirmm-00651917 v1

Impact of Technology Scaling on Defects and Parameter Deviations in Embedded SRAMs

Arnaud Virazel
NVM'11: Leading-Edge Embedded NVM Workshop, Gardane, France
Communication dans un congrès lirmm-00679494 v1

A Study of Path Delay Variations in the Presence of Uncorrelated Power and Ground Supply Noise

Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2011, Cottbus, Germany. pp.189-194, ⟨10.1109/DDECS.2011.5783078⟩
Communication dans un congrès lirmm-00592000 v1

Optimized March Test Flow for Detecting Memory Faults in SRAM Devices Under Bit Line Coupling

Leonardo B. Zordan , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
DDECS'11: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits ans Systems, Netherlands. pp.353-358
Communication dans un congrès lirmm-00592182 v1

Simultaneous Power and Thermal Integrity Analysis for 3D Integrated Systems

Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
LPonTR'11: IEEE International Workshop on the Impact of Low Power on Test and Reliability, Trondheim, Norway
Communication dans un congrès lirmm-00651802 v1

Robust Structure for Data Collection and Transfer in a Distributed SRAM Based Neutron Test Bench

Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel
Workshop on Dependability Issues in Deep-Submicron Technologies, Trondheim, Norway
Communication dans un congrès lirmm-00651796 v1

Robustness Improvement of Digital Circuits A New Hybrid Fault Tolerant Architecture

Ahn Duc Tran , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
JNRDM'11: Journées Nationales du Réseau Doctoral de Microélectronique, Paris, France
Communication dans un congrès lirmm-00679509 v1

Analysis of Resistive-Open Defects in TAS-MRAM Array

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ITC: International Test Conference, Sep 2011, Anaheim, CA, United States
Communication dans un congrès lirmm-00679524 v1
Image document

Analysis of Resistive-Bridging Defects in SRAM Core-Cells: a Comparative Study from 90nm down to 40nm Technology Nodes

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
ETS: European Test Symposium, May 2010, Prague, Czech Republic. pp.132-137
Communication dans un congrès lirmm-00493236 v1
Image document

A Two-Layer SPICE Model of the ATMEL TSTAC eFlash Memory Technology for Defect Injection and Faulty Behavior Prediction

Pierre-Didier Mauroux , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ETS: European Test Symposium, May 2010, Prague, Czech Republic. pp.81-86
Communication dans un congrès lirmm-00493204 v1

Tolérance aux fautes et rendement de fabrication

Ahn Duc Tran , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
GDR SOC-SIP'10 : Colloque GDR SoC-SiP, Cergy, France
Communication dans un congrès lirmm-00553995 v1

Detecting NBTI Induced Failures in SRAM Core-Cells

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
VTS'10: VLSI Test Symposium, Santa Cruz, CA, United States. pp.75-80
Communication dans un congrès lirmm-00553612 v1

Test Relaxation and X-filling to Reduce Peak Power During At-Speed LOS Testing

Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
GDR SOC-SIP'10 : Colloque GDR SoC-SiP, Cergy, France
Communication dans un congrès lirmm-00553989 v1
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Setting Test Conditions for Improving SRAM Reliability

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
ETS: European Test Symposium, May 2010, Prague, Czech Republic. pp.257-262
Communication dans un congrès lirmm-00492741 v1

Impact of Resistive-Bridging Defects in SRAM Core-Cell

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
DELTA'10: International Symposium on Electronic Design, Test & Applications, Ho Chi Minh, Vietnam. pp.265-270
Communication dans un congrès lirmm-00553592 v1

Power Reduction Through X-filling of Transition Fault Test Vectors for LOS Testing

Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
LPonTR: 
Impact of Low-Power design on Test and Reliability, May 2010, Prague, Czech Republic
Communication dans un congrès lirmm-00553930 v1

A Memory Fault Simulator for Radiation-Induced Effects in SRAMs

Paolo Rech , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel et al.
ATS: Asian Test Symposium, 2010, Shanghai, China. pp.100-105
Communication dans un congrès lirmm-00545102 v1

Analysis and Fault Modeling of Actual Resistive Defects in Flash Memories

Pierre-Didier Mauroux , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
JNRDM'10 : Journées Nationales du Réseau Doctoral de Microélectronique, Montpellier, France
Communication dans un congrès lirmm-00553935 v1

Analyse et modélisation des défauts résistifs affectant les mémoires Flash

Pierre-Didier Mauroux , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
GDR SOC-SIP'10 : Colloque GDR SoC-SiP, Cergy, France
Communication dans un congrès lirmm-00553947 v1

Analysis of Power Consumption and Transition Fault Coverage for LOS and LOC Testing Schemes

Wu Fangmei , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
DDECS'10: 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2010, Vienna, Austria. pp.376-381
Communication dans un congrès lirmm-00475734 v1

Setting Test Conditions for Detecting Faults Induced by Random Dopant Fluctuation in SRAM Core-Cells

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
VARI: Workshop on CMOS Variability, 2010, Montpellier, France
Communication dans un congrès lirmm-00553626 v1

A Comprehensive System-on-Chip Logic Diagnosis

Youssef Benabboud , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
ATS: Asian Test Symposium, 2010, Shanghai, China. pp.237-242
Communication dans un congrès lirmm-00545131 v1

A Statistical Simulation Method for Reliability Analysis of SRAM Core-Cells

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
DAC: Design Automation Conference, Jun 2010, Anaheim, United States. pp.853-856
Communication dans un congrès lirmm-00553619 v1

Delay Fault Diagnosis in Sequential Circuits

Youssef Benabboud , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
ATS: Asian Test Symposium, Nov 2009, Taichung, Taiwan. pp.355-360
Communication dans un congrès lirmm-00406968 v1

A Fault-Simulation-Based Approach for Logic Diagnosis

Youssef Benabboud , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2009, Cairo, Egypt. pp.216-221
Communication dans un congrès lirmm-00371377 v1

Comprehensive Bridging Fault Diagnosis based on the SLAT Paradigm

Youssef Benabboud , Alberto Bosio , Luigi Dilillo , Patrick Girard , Arnaud Virazel et al.
DDECS'09: 12th IEEE Symposium on Design and Diagnostics of Electronic Systems, pp.264-269
Communication dans un congrès lirmm-00371198 v1

Yes, we Can Improve SoC Yield

Julien Vial , Arnaud Virazel
PRIME 2009 - Ph.D. Research in Microelectronics and Electronics, Jul 2009, Cork, Ireland. pp.272-275, ⟨10.1109/RME.2009.5201370⟩
Communication dans un congrès lirmm-00433763 v1
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A New Design-for-Test Technique for SRAM Core-Cell Stability Faults

Alexandre Ney , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel et al.
DATE: Design, Automation and Test in Europe, Apr 2009, Nice, France. pp.1344-1348, ⟨10.1109/DATE.2009.5090873⟩
Communication dans un congrès lirmm-00371374 v1

Trade-off Between Power Dissipation and Delay Fault Coverage For LOS and LOC Testing Schemes

Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
Impact of Low-Power Design on Test and Reliability, Spain
Communication dans un congrès lirmm-00435005 v1

Using TMR Architectures for SoC Yield Improvement

Julien Vial , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
VALID'09: The First International Conference on Advances in System Testing and Validation Lifecycle, 2009, Porto, Portugal. pp.155-160
Communication dans un congrès lirmm-00406967 v1

A Case Study on Logic Diagnosis for System-on-Chip

Youssef Benabboud , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel et al.
ISQED 2009 - 10th International Symposium on Quality Electronic Design, Mar 2009, San Jose, CA, United States. pp.253-260, ⟨10.1109/ISQED.2009.4810303⟩
Communication dans un congrès lirmm-00370646 v1

Using TMR Architectures for Yield Improvement

Julien Vial , Alberto Bosio , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
DFT'08: 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Oct 2008, pp.007-015
Communication dans un congrès lirmm-00326901 v1

Improved Diagnosis Resolution without Physical Information

Alberto Bosio , Alexandre Rousset , Patrick Girard , Serge Pravossoudovitch , Christian Landrault et al.
DELTA'08: International Symposium on Electronic Design, Test & Applications, Jan 2008, pp.210-215
Communication dans un congrès lirmm-00260961 v1

A History-Based Technique for Faults Diagnosis in SRAMs

Alexandre Ney , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
Colloque GDR SoC-SiP, France
Communication dans un congrès lirmm-00341821 v1
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A Signature-based Approach for Diagnosis of Dynamic Faults in SRAMs

Alexandre Ney , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Mar 2008, Tunis, Tunisia. pp.001-006, ⟨10.1109/DTIS.2008.4540243⟩
Communication dans un congrès lirmm-00324143 v1

Impact of Technology Scaling on Defects and Parameter Deviations in Embedded SRAMs

Luigi Dilillo , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel et al.
VLSI Test Symposium, Apr 2008, San Diego, California, United States. pp.336
Communication dans un congrès lirmm-00324151 v1

Tolérer Plus pour Fabriquer Plus

Julien Vial , Alberto Bosio , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
Colloque GDR SoC-SiP, 2008, Paris, France
Communication dans un congrès lirmm-00341812 v1

An SRAM Design-for-Diagnosis Solution Based on Write Driver Voltage Sensing

Alexandre Ney , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan et al.
VTS'08: VLSI Test Symposium, May 2008, San Diego, CA, USA, pp.89-94
Communication dans un congrès lirmm-00281558 v1
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A Design-for-Diagnosis Technique for SRAM Write Drivers

Alexandre Ney , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel et al.
DATE: Design, Automation and Test in Europe, Mar 2008, Munich, Germany. pp.1480-1485, ⟨10.1109/DATE.2008.4484883⟩
Communication dans un congrès lirmm-00341796 v1
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Yield Improvement, Fault-Tolerance to the Rescue?

Julien Vial , Alberto Bosio , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
IOLTS: International On-Line Testing Symposium, Jul 2008, Rhodes, Greece. pp.165-170, ⟨10.1109/IOLTS.2008.10⟩
Communication dans un congrès lirmm-00303400 v1

Améliorer le rendement grâce aux structures tolérantes aux fautes

Julien Vial , Alberto Bosio , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
Journées des Doctorants de l'Ecole Doctorale I2S, France
Communication dans un congrès lirmm-00341806 v1

Utilisation de structures tolérantes aux fautes pour augmenter le rendement

Julien Vial , Christian Landrault , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
JNRDM 2008 - 11e Journées Nationales du Réseau Doctoral de Microélectronique, May 2008, Bordeaux, France
Communication dans un congrès lirmm-00341811 v1

A History-Based Diagnosis Technique for Static and Dynamic Faults in SRAMs

Alexandre Ney , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
ITC'2008: International Test Conference, Oct 2008, Santa Clara, CA, United States. pp.1-10, ⟨10.1109/TEST.2008.4700555⟩
Communication dans un congrès lirmm-00341798 v1

Resistive-Open Defect Influences in SRAM I/O Circuitry

Alexandre Ney , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel et al.
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Communication dans un congrès lirmm-00194282 v1

Test des Mémoires Flash Embarquées : Analyse de la perturbation entre cellules FloTOx voisines durant une phase de programmation

Olivier Ginez , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel et al.
Journées Nationales du Réseau Doctoral de Microélectronique, France
Communication dans un congrès lirmm-00194274 v1

Embedded Flash Testing

Olivier Ginez , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel et al.
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Communication dans un congrès lirmm-00194277 v1

Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories

Olivier Ginez , Jean-Michel Daga , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
ETS: European Test Symposium, May 2007, Freiburg, Germany. pp.77-82, ⟨10.1109/ETS.2007.20⟩
Communication dans un congrès lirmm-00158543 v1

Méthode de diagnostic unifiée pour circuits intégrés numériques

Alexandre Rousset , Alberto Bosio , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Communication dans un congrès lirmm-00194285 v1

A Mixed Approach for Unified Logic Diagnosis

Alexandre Rousset , Alberto Bosio , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
DDECS'07: IEEE Design and Diagnostics of Electronic Circuits and Systems, Apr 2007, Krakow, Poland, pp.239-242
Communication dans un congrès lirmm-00161643 v1

Un-Restored Destructive Write Faults due to Resistive-Open Defects in the Write Driver of SRAMs

Alexandre Ney , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel et al.
VTS 2007 - 25th IEEE VLSI Test Symposium, May 2007, Berkeley, CA, United States. pp.361-366, ⟨10.1109/VTS.2007.84⟩
Communication dans un congrès lirmm-00155979 v1
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A Concurrent Approach for Testing Address Decoder Faults in eFlash Memories

Olivier Ginez , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel et al.
ITC'07: International Test Conference, paper 3.2
Communication dans un congrès lirmm-00194260 v1

Influence of Threshold Voltage Deviations on 90nm SRAM Core-Cell Behavior

Magali Bastian Hage-Hassan , Vincent Gouin , Patrick Girard , Christian Landrault , Alexandre Ney et al.
ATS 2007 - 16th IEEE Asian Test Symposium, Oct 2007, Beijing, China. pp.501-504, ⟨10.1109/ATS.2007.121⟩
Communication dans un congrès lirmm-00179276 v1

Dynamic Two-Cell Incorrect Read Fault due to Resistive-Open Defects in the Sense Amplifiers of SRAMs

Alexandre Ney , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel et al.
ETS: European Test Symposium, May 2007, Freiburg, Germany. pp.97-104, ⟨10.1109/ETS.2007.19⟩
Communication dans un congrès lirmm-00158116 v1
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Slow Write Driver Faults in 65nm SRAM Technology: Analysis and March Test Solution

Alexandre Ney , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel et al.
DATE: Design, Automation and Test in Europe, Apr 2007, Nice, France. pp.528-533, ⟨10.1109/DATE.2007.364647⟩
Communication dans un congrès lirmm-00187037 v1

DERRIC: A Tool for Unified Logic Diagnosis

Alberto Bosio , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Alexandre Rousset et al.
ETS: European Test Symposium, May 2007, Freiburg, Germany. pp.13-18, ⟨10.1109/ETS.2007.16⟩
Communication dans un congrès lirmm-00155993 v1

Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window

Olivier Ginez , Jean-Michel Daga , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
VTS'07: 25th IEEE VLSI Test Symposium, May 2007, Berkeley, CA (USA), pp.47-52
Communication dans un congrès lirmm-00151034 v1

Fast Bridging Fault Diagnosis using Logic Information

Alexandre Rousset , Alberto Bosio , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
ATS: Asian Test Symposium, Oct 2007, Beijing, China. pp.33-38
Communication dans un congrès lirmm-00179259 v1

Test et testabilité de structures numériques tolérantes aux fautes

Julien Vial , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Communication dans un congrès lirmm-00194278 v1
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Structural-Based Power-Aware Assignment of Don't Cares for Peak Power Reduction during Scan Testing

Nabil Badereddine , Patrick Girard , Serge Pravossoudovitch , Christian Landrault , Arnaud Virazel et al.
VLSI-SOC'06: 14th IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, Oct 2006, Nice (France), pp.403-408
Communication dans un congrès lirmm-00108141 v1
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Méthode unifiée de diagnostic ciblant l'ensemble des modèles de fautes

Alexandre Rousset , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, May 2006, Rennes, France
Communication dans un congrès lirmm-00136841 v1
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Diagnostic Multi-Modèles des Circuits Logiques

Alexandre Rousset , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
MAJECSTIC'06: Manifestation des Jeunes Chercheurs STIC, Nov 2006, Lorient, France
Communication dans un congrès lirmm-00136876 v1
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Unified Diagnostic Method Targeting Several Fault Models

Alexandre Rousset , Patrick Girard , Serge Pravossoudovitch , Christian Landrault , Arnaud Virazel
VLSI-SOC'06: 14th IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, Oct 2006, Nice, pp.53-55
Communication dans un congrès lirmm-00136869 v1
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Unified Framework for Logic Diagnosis

Alexandre Rousset , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
EWDTW: East-West Design & Test Workshop, Sep 2006, Sochi, Russia. pp.47-52
Communication dans un congrès lirmm-00096211 v1

March Pre: an Efficient Test for Resistive-Open Defects in the SRAM Pre-charge Circuit

Luigi Dilillo , Patrick Girard , Magali Bastian Hage-Hassan , Serge Pravossoudovitch , Arnaud Virazel
DDECS'06: Design and Diagnostics of Electronic Circuits and Systems, Apr 2006, Prague, République Tchèque, pp.256-261
Communication dans un congrès lirmm-00134776 v1

Power-Aware Test Data Compression for Embedded IP Core

Nabil Badereddine , Zhanglei Wang , Patrick Girard , Krishnendu Chakrabarty , Arnaud Virazel et al.
ATS 2006 - 15th IEEE Asian Test Symposium, Nov 2006, Fukuoka, Japan. pp.5-10, ⟨10.1109/ATS.2006.66⟩
Communication dans un congrès lirmm-00116832 v1
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Technique Structurelle d'Affectation des Bits Non Spécifiés en Vue d'une Réduction de la Puissance de Pic Pendant le Test Série

Nabil Badereddine , Patrick Girard , Serge Pravossoudovitch , Christian Landrault , Arnaud Virazel et al.
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, May 2006, Rennes, France
Communication dans un congrès lirmm-00136838 v1
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Embedded Flash Testing: Overview and Perspectives

Olivier Ginez , Jean-Michel Daga , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Sep 2006, Tunis, Tunisia. pp.210-215
Communication dans un congrès lirmm-00093665 v1

Low Power Testing

Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
WRTLT'06: 7th Workshop on RTL and High Level Testing, Nov 2006, Fukuoka, pp.4
Communication dans un congrès lirmm-00116819 v1

Minimizing Peak Power Consumption during Scan Testing: Structural Technique for Don't Care Bits Assignment

Nabil Badereddine , Patrick Girard , Serge Pravossoudovitch , Christian Landrault , Arnaud Virazel et al.
PRIME'06: Conference on Ph.D. Research in Microelectronics and Electronics, Jun 2006, Otranto, Italy, pp.65-68
Communication dans un congrès lirmm-00137614 v1

An Overview of Failure Mechanisms in Embedded Flash Memories

Olivier Ginez , Jean-Michel Daga , Marylène Combe , Patrick Girard , Christian Landrault et al.
VTS'06: VLSI Test Symposium, Apr 2006, Berkeley, CA, United States. pp.108-113
Communication dans un congrès lirmm-00102761 v1
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Minimizing Peak Power Consumption during Scan Testing: Test Pattern Modification with X Filling Heuristics

Nabil Badereddine , Patrick Girard , Serge Pravossoudovitch , Christian Landrault , Arnaud Virazel et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Sep 2006, Tunis, Tunisia. pp.359-364
Communication dans un congrès lirmm-00093690 v1
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Efficient Test of Dynamic Read Destructive Faults in SRAM Memories

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
LATW: Latin American Test Workshop, Mar 2005, Salvador, Bahia, Brazil. pp.40-45
Communication dans un congrès lirmm-00106515 v1

Resistive-Open Defect Influence in SRAM Pre-Charge Circuits: Analysis and Characterization

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
ETS: European Test Symposium, May 2005, Tallinn, Estonia. pp.116-121, ⟨10.1109/ETS.2005.33⟩
Communication dans un congrès lirmm-00106010 v1

Resistive-Open Defect Injection in SRAM Core-Cell: Analysis and Comparison Between 0.13 um and 90 nm Technologies

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
DAC: Design Automation Conference, Jun 2005, Anaheim, CA, United States. pp.857-862
Communication dans un congrès lirmm-00136906 v1

Peak Power Consumption During Scan Testing: Issue, Analysis and Heuristic Solution

Nabil Badereddine , Patrick Girard , Serge Pravossoudovitch , Christian Landrault , Arnaud Virazel
DDECS'05: IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Apr 2005, Sopron, Hungary. pp.151-159
Communication dans un congrès lirmm-00105990 v1
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Data Retention Fault in SRAM Memories: Analysis and Detection Procedures

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
VTS 2005 - 23rd IEEE VLSI Test Symposium, May 2005, Palm Springs, CA, United States. pp.183-188, ⟨10.1109/VTS.2005.37⟩
Communication dans un congrès lirmm-00105995 v1

Analyse et Réduction de la Puissance de Pic durant le Test Série

Nabil Badereddine , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Christian Landrault
JNRDM 2005 - 8e Journées Nationales du Réseau Doctoral de Microélectronique, May 2005, Paris, France
Communication dans un congrès lirmm-00106528 v1
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Controlling Peak Power Consumption During Scan Testing: Power-Aware DfT and Test Set Perspectives

Nabil Badereddine , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Christian Landrault
PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2005, Leuven, Belgium. pp.540-549, ⟨10.1007/11556930_55⟩
Communication dans un congrès istex lirmm-00106111 v1

Power-Aware Scan Testing for Peak Power Reduction

Nabil Badereddine , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Christian Landrault
VLSI-SOC'05: IFIP International Conference on Very Large Scale Integration, Oct 2005, Perth, Australia. pp.441-446
Communication dans un congrès lirmm-00106112 v1

Resistive-Open Defect Injection in SRAM Core-Cell: Analysis and Comparison between 0.13μm and 90nm Technologies

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
DAC: Design Automation Conference, May 2005, Anaheim, CA, United States. pp.857-862, ⟨10.1145/1065579.1065804⟩
Communication dans un congrès lirmm-00106558 v1

Incidence des Défauts Résistifs dans les Circuits de Précharge des Mémoires SRAM

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
JNRDM 2005 - 8e Journées Nationales du Réseau Doctoral de Microélectronique, May 2005, Paris, France
Communication dans un congrès lirmm-00106529 v1
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March Tests Improvements for Address Decoder Open and Resistive Open Fault Detection

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Simone Borri et al.
LATW: Latin American Test Workshop, Mar 2004, Cartagena, Colombia. pp.31-36
Communication dans un congrès lirmm-00108642 v1
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Resistive-Open Defects in Embedded-SRAM Core Cells: Analysis and March Test Solution

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Simone Borri et al.
ATS: Asian Test Symposium, Nov 2004, Kenting, Taiwan. pp.266-271
Communication dans un congrès lirmm-00108800 v1
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Dynamic Read Destructive Faults in Embedded-SRAMs: Analysis and March Test Solution

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Simone Borri et al.
ETS: European Test Symposium, May 2004, Ajaccio, Corsica, France. pp.140-145
Communication dans un congrès lirmm-00108795 v1
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March iC-: An Improved Version of March C- for ADOFs Detection

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Simone Borri
VTS: VLSI Test Symposium, Apr 2004, Napa Valley, CA, United States. pp.129-134, ⟨10.1109/VTEST.2004.1299236⟩
Communication dans un congrès lirmm-00108772 v1
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Design of Routing-Constrained Low Power Scan Chains

Yannick Bonhomme , Patrick Girard , Loïs Guiller , Christian Landrault , Serge Pravossoudovitch et al.
DATE: Design, Automation and Test in Europe, Feb 2004, Paris, France. pp.62-67, ⟨10.1109/DATE.2004.1268828⟩
Communication dans un congrès lirmm-00108836 v1
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Test March pour la Détection des Fautes Dynamiques dans les Décodeurs de Mémoires SRAM

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Simone Borri et al.
JNRDM'04 : 7ièmes Journées Nationales du Réseau Doctoral de Microélectronique, May 2004, Marseille, France. pp.495-497
Communication dans un congrès lirmm-00108644 v1

Design of Routing-Constrained Low Power Scan Chains

Yannick Bonhomme , Patrick Girard , Loïs Guiller , Christian Landrault , Serge Pravossoudovitch et al.
DELTA: Electronic Design, Test and Applications, Jan 2004, Perth, Australia. pp.287-292, ⟨10.1109/DELTA.2004.10009⟩
Communication dans un congrès lirmm-00108833 v1

Comparison of open and resistive-open defect test conditions in SRAM address decoders

Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Simone Borri et al.
ATS: Asian Test Symposium, Nov 2003, Xian, China. pp.250-255, ⟨10.1109/ATS.2003.1250818⟩
Communication dans un congrès lirmm-01238821 v1

Defect-Oriented Dynamic Fault Models for Embedded-SRAMs

Simone Borri , Magali Bastian Hage-Hassan , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel
ETW: European Test Workshop, May 2003, Maastricht, Netherlands. pp.23-28
Communication dans un congrès lirmm-00269526 v1

On Using Efficient Test Sequences for BIST

René M. G. David , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
VTS: VLSI Test Symposium, 2002, Monterey, CA, United States. pp.145-150
Communication dans un congrès lirmm-00268499 v1
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Test Intégré de Circuits Digitaux : Comparaison de deux types de Séquences de Test

Arnaud Virazel , René M. G. David , Patrick Girard , Christian Landrault , Serge Pravossoudovitch
Journées des Doctorants, École Doctorale I2S, 2001, Montpellier, France. pp.158-160
Communication dans un congrès lirmm-00345806 v1

On Hardware Generation of Random Single Input Change Test

René M. G. David , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
ETW: European Test Workshop, May 2001, Saltsjöbaden, Sweden. pp.117-123
Communication dans un congrès lirmm-00345801 v1
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Test Intégré de Circuits Digitaux : Etude Comparative de l'Efficacité de deux types de Séquences de Test

Arnaud Virazel , René M. G. David , Patrick Girard , Christian Landrault , Serge Pravossoudovitch
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, LIRMM; CEM2, May 2000, Montpellier, France. pp.86-87
Communication dans un congrès lirmm-00345804 v1
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Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults

Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
IOLTW: International On-Line Testing Workshop, Jul 2000, Palma de Mallorca, Spain. pp.121-161, ⟨10.1109/OLT.2000.856623⟩
Communication dans un congrès lirmm-00345800 v1
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Delay Fault Testing: Choosing Between Random SIC and Random MIC Test Sequences

Arnaud Virazel , René M. G. David , Patrick Girard , Christian Landrault , Serge Pravossoudovitch
ETW: European Test Workshop, May 2000, Cascais, Portugal. pp.09-14, ⟨10.1109/ETW.2000.873772⟩
Communication dans un congrès lirmm-00345799 v1

Analyse des capacités de test de générateurs intégrés produisant des vecteurs adjacents

Arnaud Virazel , Patrick Girard , Christian Landrault , Serge Pravossoudovitch
Colloque CAO de Circuits Intégrés et Systèmes, France. pp.88-91
Communication dans un congrès lirmm-00345803 v1

A BIST Structure to Test Delay Faults in a Scan Environment

Patrick Girard , Christian Landrault , Véronique Moreda , Serge Pravossoudovitch , Arnaud Virazel
ATS: Asian Test Symposium, Dec 1998, Singapore, Singapore. pp.435-439
Communication dans un congrès lirmm-00345798 v1
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Sécurité et intégrité dans un Contexte Embarqué

Sébastien Lapeyre , Nicolas Valette , Marc Merandat , Marie-Lise Flottes , Bruno Rouzeyre et al.
15e Colloque National du GDR SoC², Jun 2021, Rennes, France
Poster de conférence lirmm-03361957 v1

An Advanced Diagnosis Flow for SRAMs

Arnaud Virazel , Tien-Phu Ho , Alberto Bosio , Patrick Girardot
11e Colloque National du GDR SoC/SiP, Jun 2017, Bordeaux, France. 2017
Poster de conférence lirmm-01718611 v1

Fault-Effect Propagation Based Intra-cell Scan Chain Diagnosis

Zhenzhou Sun , Alberto Bosio , Luigi Dilillo , Patrick Girard , Aida Todri-Sanial et al.
Colloque GDR SoC-SiP, Jun 2013, Lyon, France. 2013
Poster de conférence lirmm-00839113 v1

Performance Evaluation of Capacitive defects on TAS-MRAMs

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
Colloque GDR SoC-SiP, 2013, Lyon, France. 2013
Poster de conférence lirmm-00839093 v1

Investigating Multiple-Cell-Upsets on a 90mn SRAM

Georgios Tsiligiannis , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
Colloque GDR SoC-SiP, 2013, Lyon, France. 2013
Poster de conférence lirmm-00839108 v1

Coupling-Based Resistive-Open Defects in TAS-MRAM Architectures

João Azevedo , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ETS: European Test Symposium, May 2012, Annecy, France. Test Symposium (ETS), 2012 17th IEEE European, 2012, ⟨10.1109/ETS.2012.6233034⟩
Poster de conférence lirmm-00806793 v1

Resistive Open Defect Analysis for Through-Silicon-Vias

Carolina Momo Metzler , Aida Todri-Sanial , Arnaud Virazel , Alberto Bosio , Luigi Dilillo et al.
ETS: European Test Symposium, May 2012, Annecy, France. 17th IEEE European Test Symposium, pp.183, 2012
Poster de conférence lirmm-00806795 v1

Parity Prediction Synthesis for Nano-Electronic Gate Designs

Ahn Duc Tran , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ITC'2010: International Test Conference, Nov 2010, Austin, Texas, United States. pp.N/A, 2010
Poster de conférence lirmm-00537938 v1

Is Test Power Reduction Through X-Filling Good Enough?

Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
ITC'2010: International Test Conference, Nov 2010, Austin, Texas, United States. 2010
Poster de conférence lirmm-00537926 v1

SoC Yield Improvement for Future Nanoscale Technologies

Julien Vial , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ETS 2009 - 14th IEEE European Test Symposium | PhD Forum, May 2009, Sevilla, Spain. 2009
Poster de conférence lirmm-00433798 v1

Analysis of Resistive-Bridging Defects in SRAM Core-Cell: Impact within the Core-Cell and in the Memory Array

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
ETS: European Test Symposium, May 2009, Sevilla, Spain. 14th IEEE European Test Symposium, 2009
Poster de conférence lirmm-00433796 v1

A Logic Diagnosis Approach for Sequential Circuits

Youssef Benabboud , Alberto Bosio , Luigi Dilillo , Patrick Girard , Serge Pravossoudovitch et al.
ETS 2009 - 14th IEEE European Test Symposium, May 2009, Sevilla, Spain. , 2009, Ph. D. Forum
Poster de conférence lirmm-00433792 v1

NAND Flash Testing: A Preliminary Study on Actual Defects

Pierre-Didier Mauroux , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
ITC: International Test Conference, Nov 2009, Austin, TX, United States. 2009, ⟨10.1109/TEST.2009.5355898⟩
Poster de conférence lirmm-00433765 v1

SRAM Core-cell Quality Metrics

Renan Alves Fonseca , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
GDR SOC SIP, France. 2009
Poster de conférence lirmm-00434962 v1

Trade-off Between Power Dissipation and Delay Fault Coverage for LOS and LOC Testing Schemes

Fangmei Wu , Luigi Dilillo , Alberto Bosio , Patrick Girard , Serge Pravossoudovitch et al.
GDR SOC SIP, France. 2009
Poster de conférence lirmm-00434959 v1

Test des Mémoires FLASH NAND

Pierre-Didier Mauroux , Arnaud Virazel , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
Colloque GDR SoC-SiP, France. 2009
Poster de conférence lirmm-00433770 v1

SoC Yield Improvement: Redundant Architectures to the Rescue

Julien Vial , Alberto Bosio , Patrick Girard , Christian Landrault , Serge Pravossoudovitch et al.
ITC'2008: International Test Conference, Oct 2008, Santa Clara, CA, United States. IEEE, pp.7, 2008
Poster de conférence lirmm-00341799 v1

Failure Mechanisms due to Process Variations in Nanoscale SRAM Core-Cells

Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Magali Bastian Hage-Hassan
ETS: European Test Symposium, May 2006, Southampton, United Kingdom. 11th IEEE European Test Symposium, 2006
Poster de conférence lirmm-00134787 v1

Structural Power-Aware Assignment of Xs for Peak Power Reduction during Scan Testing

Christian Landrault , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Nabil Badereddine et al.
ETS: European Test Symposium, May 2006, Southampton, United Kingdom. 11th IEEE European Test Symposium, 2006
Poster de conférence lirmm-00134781 v1
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Machine Learning Support for Cell-aware Diagnosis

Aymen Ladhar , Arnaud Virazel
Machine Learning Support for Fault Diagnosis of System-on-Chip, Springer, pp.173-204, 2023, ISBN 978-3-031-19638-6 ISBN 978-3-031-19639-3 (eBook). ⟨10.1007/978-3-031-19639-3_6⟩
Chapitre d'ouvrage lirmm-03989878 v1
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Defect Diagnosis Techniques for Silicon Customer Returns

Patrick Girard , Alberto Bosio , Aymen Ladhar , Arnaud Virazel
Frontiers of Quality Electronic Design (QED), Springer International Publishing, pp.641-676, 2023, 978-3-031-16344-9. ⟨10.1007/978-3-031-16344-9_17⟩
Chapitre d'ouvrage lirmm-03986615 v1
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Cell-Aware Model Generation Using Machine Learning

Pierre d’Hondt , Aymen Ladhar , Patrick Girard , Arnaud Virazel
Frontiers of Quality Electronic Design (QED), Springer International Publishing, pp.227-257, 2023, 978-3-031-16344-9. ⟨10.1007/978-3-031-16344-9_6⟩
Chapitre d'ouvrage lirmm-03986553 v1
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Test and Reliability of Approximate Hardware

Marcello Traiola , Bastien Deveautour , Alberto Bosio , Patrick Girard , Arnaud Virazel
Approximate Computing, Springer International Publishing, pp.233-266, 2022, ⟨10.1007/978-3-030-98347-5_10⟩
Chapitre d'ouvrage hal-03888016 v1
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Design, Verification, Test, and In-Field Implications of Approximate Digital Integrated Circuits

Alberto Bosio , Stefano Di Carlo , Patrick Girard , Annachiara Ruospo , Ernesto Sanchez et al.
Approximate Computing Techniques, Springer International Publishing, pp.349-385, 2022, ⟨10.1007/978-3-030-94705-7_12⟩
Chapitre d'ouvrage hal-03888027 v1

Electromigration Alleviation Techniques for 3D Integrated Circuits

Yuanqing Cheng , Aida Todri-Sanial , Alberto Bosio , Luigi Dilillo , Patrick Girard et al.
Chao Wang. High Performance Computing for Big Data: Methodologies and Applications, CRC Press, pp.37-58, 2017, 9781498783996
Chapitre d'ouvrage lirmm-01800220 v1
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Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles

Nabil Badereddine , Patrick Girard , Serge Pravossoudovitch , Arnaud Virazel , Christian Landrault
VLSI-Soc: From Systems to Silicon, pp.267-281, 2007, 978-0-387-73661-7
Chapitre d'ouvrage lirmm-00194261 v1
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Random Adjacent Sequences: An Efficient Solution for Logic BIST

René M. G. David , Patrick Girard , Christian Landrault , Serge Pravossoudovitch , Arnaud Virazel
SOC Design Methodologies, 90, Kluwer, pp.413-424, 2002, IFIP — The International Federation for Information Processing, 978-1-4757-6530-4. ⟨10.1007/978-0-387-35597-9_35⟩
Chapitre d'ouvrage lirmm-00345802 v1

Rapport Technique intermédiaire, Contrat TOETS CT 302, Programme CEE CATRENE

Patrick Girard , Serge Bernard , Florence Azaïs , Alberto Bosio , Luigi Dilillo et al.
2011
Rapport (rapport contrat/projet) lirmm-00679018 v1

Rapport Technique de fin d'année, Contrat TOETS CT 302, Programme CEE CATRENE

Patrick Girard , Serge Bernard , Florence Azaïs , Alberto Bosio , Luigi Dilillo et al.
2011
Rapport (rapport contrat/projet) lirmm-00679022 v1

TOETS CT302 - Programme CEE CATRENE - Summary Technical Report 2S-2009 - Rapport Technique de Fin d'année

Patrick Girard , Florence Azaïs , Serge Bernard , Alberto Bosio , Luigi Dilillo et al.
2010
Rapport (rapport contrat/projet) lirmm-00461745 v1

Contrat TOETS CT 302 - Programme CEE CATRENE (Rapport Intermédiaire)

Patrick Girard , Serge Bernard , Florence Azaïs , Alberto Bosio , Luigi Dilillo et al.
2010
Rapport (rapport contrat/projet) lirmm-00504873 v1

Rapport Technique de fin de Contrat NanoTEST 2A702, Programme CEE MEDEA+

Patrick Girard , Serge Bernard , Alberto Bosio , Luigi Dilillo , Marie-Lise Flottes et al.
2009
Rapport (rapport contrat/projet) lirmm-00406974 v1

Contrat Nano TEST 2A702, Programme CEE MEDEA (Rapport Intermédiaire)

Patrick Girard , Serge Bernard , Alberto Bosio , Marie-Lise Flottes , Serge Pravossoudovitch et al.
08027, 2008
Rapport lirmm-00344415 v1

Contrat Nano TEST 2A702, Programme CEE MEDEA (Rapport Technique de fin d'année)

Patrick Girard , Serge Bernard , Alberto Bosio , Marie-Lise Flottes , Serge Pravossoudovitch et al.
08026, 2008
Rapport lirmm-00344408 v1

Contrat NanoTEST 2A702 - Programme CEE MEDEA - Rapport Technique intermédiaire

Patrick Girard , Serge Bernard , Alberto Bosio , Marie-Lise Flottes , Serge Pravossoudovitch et al.
2007
Rapport (rapport technique) lirmm-00199966 v1

Contrat NanoTEST 2A702 - Programme CEE MEDEA - Rapport Technique de fin d'année

Patrick Girard , Serge Bernard , Alberto Bosio , Marie-Lise Flottes , Serge Pravossoudovitch et al.
2007
Rapport (rapport contrat/projet) lirmm-00199958 v1

Contrat NanoTEST 2A702 - Programme CEE MEDEA+

Patrick Girard , Serge Bernard , Marie-Lise Flottes , Christian Landrault , Serge Pravossoudovitch et al.
2006
Rapport (rapport technique) lirmm-00102699 v1

Contrat NanoTEST 2A702, Programme CEE MEDEA +

Patrick Girard , Serge Bernard , Marie-Lise Flottes , Christian Landrault , Serge Pravossoudovitch et al.
2006
Rapport (rapport contrat/projet) lirmm-00130759 v1

Contrat NanoTEST 2A702, Programme CEE MEDEA+

Patrick Girard , Serge Bernard , Marie-Lise Flottes , Christian Landrault , Serge Pravossoudovitch et al.
2006
Rapport (rapport contrat/projet) lirmm-00130758 v1
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Contribution au test et à la fiabilité des systèmes sur puce

Arnaud Virazel
Micro et nanotechnologies/Microélectronique. Université Montpellier 2, 2014
HDR tel-01420363 v1