Arnaud Virazel
35%
Open access
342
Documents
Current affiliations
- 1100642
Researcher identifiers
arnaud-virazel- IdRef : 068454724
- ISNI : 0000000139422532
-
0000-0001-7398-7107
Presentation
Enseignant-chercheur au **LIRMM** dans l’équipe de recherche **TEST**: Test and dEpendability of microelectronic integrated SysTems.
<https://www.lirmm.fr/recherche/equipes/test>
**Cours** :
<http://www.lirmm.fr/~virazel/COURS/index.php?dir=L1%20-%20HLEE202/Cours/>
**Researchgate** :
[https://www.researchgate.net/profile/Arnaud\_Virazel](https://www.researchgate.net/profile/Arnaud_Virazel)
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A Graph-Based Methodology for Speeding up Cell-Aware Model GenerationIOLTS 2024 - IEEE 30th International Symposium on On-Line Testing and Robust System Design, Jul 2024, Rennes, France. pp.1-6, ⟨10.1109/IOLTS60994.2024.10616062⟩
Conference papers
lirmm-04738312v1
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Design for Advanced Test and Safety for Image and Photonic SensorsTTTC’s E. J. McCluskey Best Doctoral Thesis Award Contest at ETS’24 Semifinal, May 2024, The Hague, Netherlands
Conference papers
lirmm-04739546v1
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A Structural Testing Approach for SRAM Address Decoders using Cell-Aware MethodologyDFT 2024 - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2024, Harwell, United Kingdom. In press
Conference papers
lirmm-04738361v1
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Comparaison des Approches de Lockstep pour la Tolérance aux Fautes des FPGAs Utilisés en Milieu Radiatif18e Colloque National du GDR SoC², Jun 2024, Toulouse, France
Conference papers
lirmm-04739624v1
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Method and Techniques to Speed-Up Cell-Aware Model GenerationSouth European Test Seminar, Mar 2024, Claviere, Italy
Conference papers
lirmm-04739532v1
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Approximate Computing for Test and Test of Approximate ComputingIEEE Workshop on Top Picks in VLSI Test and Reliability, Nov 2024, San Diego, United States. pp.1-2
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lirmm-04738424v1
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Producing a Bidirectional ATPG Compliant Verilog-HDL Memory Model of SRAM Memory18e Colloque National du GDR SoC², Jun 2024, Toulouse, France
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lirmm-04739569v1
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Producing a Bidirectional ATPG Compliant Verilog-HDL Memory Model of SRAMDTTIS 2024 - IEEE International Conference on Design, Test & Technology of Integrated Systems, Oct 2024, Aix-en-Provence, France. In press
Conference papers
lirmm-04738159v1
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A Fast and Efficient Graph-Based methodology for Cell-Aware Model GenerationITC 2024 - IEEE International Test Conference, Nov 2024, San Diego, United States. In press
Conference papers
lirmm-04738192v1
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A Novel March Test Algorithm for Testing 8T SRAM-based IMC ArchitecturesDATE 2024 - Design, Automation & Test in Europe Conference & Exhibition, Mar 2024, Valence, Spain. pp.1-6, ⟨10.23919/DATE58400.2024.10546583⟩
Conference papers
hal-04658584v1
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A Structural Testing Approach for SRAMs using Cell-Aware MethodologySouth European Test Seminar, Mar 2024, Claviere, Italy
Conference papers
lirmm-04739520v1
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Predictor BIST: An "All-in-One" Optical Test Solution for CMOS Image SensorsITC 2023 - IEEE International Test Conference, Oct 2023, Anaheim, United States
Conference papers
lirmm-04240449v1
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Analysis of Resistive-Open Defects on a Foundry 8T SRAM-based IMC Architecture17e Colloque National du GDR SoC², Jun 2023, Lyon, France
Conference papers
lirmm-04565688v1
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Intra-cell Resistive-Open Defect Analysis on a Foundry 8T SRAM-based IMC ArchitectureETS 2023 - 28th IEEE European Test Symposium, May 2023, Venise, Italy. ⟨10.1109/ETS56758.2023.10174107⟩
Conference papers
hal-04164663v1
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On Using Cell-Aware Methodology for SRAM Bit Cell TestingETS 2023 - 28th IEEE European Test Symposium, May 2023, Venezia, Italy. pp.1-4, ⟨10.1109/ETS56758.2023.10174118⟩
Conference papers
hal-04164704v1
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Learning-Based Characterization Models for Quality Assurance of Emerging Memory TechnologiesETS 2023 - 28th IEEE European Test Symposium, May 2023, Venezia, Italy. pp.1-2, ⟨10.1109/ETS56758.2023.10174202⟩
Conference papers
hal-04164855v1
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A Generic Fast and Low Cost BIST Solution for CMOS Image SensorsETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-2, ⟨10.1109/ETS54262.2022.9810458⟩
Conference papers
lirmm-03770756v1
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A Comprehensive Learning-Based Flow for Cell-Aware Model GenerationITC 2022 - IEEE International Test Conference, Sep 2022, Anaheim, United States. pp.484-488, ⟨10.1109/ITC50671.2022.00057⟩
Conference papers
lirmm-03770147v1
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A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device TestingETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-4, ⟨10.1109/ETS54262.2022.9810364⟩
Conference papers
lirmm-03739783v1
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Analysis of Read Port Short Defects in an 8T SRAM-based IMC Architecture16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Conference papers
lirmm-03990078v1
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On Using Cell-Aware Models for Representing SRAM Architecture16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Conference papers
lirmm-03987914v1
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Effective techniques for automatically improving the transition delay fault coverage of Self-Test LibrariesETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-2, ⟨10.1109/ETS54262.2022.9810392⟩
Conference papers
lirmm-03739788v1
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Configuring a Universal BIST Solution for CMOS Image Sensors16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
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lirmm-03988569v1
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Emerging Computing Devices: Challenges and Opportunities for Test and ReliabilityETS 2021 - 26th IEEE European Test Symposium, May 2021, Bruges, Belgium. pp.1-10, ⟨10.1109/ETS50041.2021.9465409⟩
Conference papers
lirmm-03379074v1
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A Novel BIST Engine for CMOS Image Sensors15e Colloque National du GDR SoC², Jun 2021, Rennes, France
Conference papers
lirmm-03987828v1
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Cell-Aware Diagnosis of Customer Returns Using Bayesian InferenceISQED 2021 - 22nd International Symposium on Quality Electronic Design, Apr 2021, Santa Clara (virtual), United States. pp.48-53, ⟨10.1109/ISQED51717.2021.9424337⟩
Conference papers
hal-03266815v1
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Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage ImprovementIOLTS 2021 - 27th IEEE International Symposium on On-Line Testing and Robust System Design, Jun 2021, Torino, Italy. pp.1-4, ⟨10.1109/IOLTS52814.2021.9486711⟩
Conference papers
lirmm-03380201v1
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Preliminary Defect Analysis of 8T SRAM Cells for In-Memory Computing ArchitecturesDTIS 2021 - 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Jun 2021, Montpellier, France. ⟨10.1109/DTIS53253.2021.9505101⟩
Conference papers
lirmm-03377433v1
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A Fast and Low Cost Embedded Test Solution for CMOS Image SensorsITC 2021 - IEEE International Test Conference, Oct 2021, Online, United States. pp.1-9, ⟨10.1109/ITC50571.2021.00007⟩
Conference papers
lirmm-03377562v1
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A Plug and Play Digital ABIST Controller for Analog Sensors in Secure DevicesETS 2021 - 26th IEEE European Test Symposium, May 2021, Bruges, Belgium. pp.1-4, ⟨10.1109/ETS50041.2021.9465480⟩
Conference papers
lirmm-03305266v1
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Accelerating Cell-Aware Model Generation Through Machine Learning15e Colloque National du GDR SoC², Jun 2021, Rennes, France
Conference papers
lirmm-03987805v1
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A Learning-Based Methodology for Accelerating Cell-Aware Model GenerationDATE 2021 - 24th Design, Automation and Test in Europe Conference and Exhibition, Feb 2021, Grenoble, France. pp.1580-1585, ⟨10.23919/DATE51398.2021.9474227⟩
Conference papers
lirmm-03377383v1
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Reducing Overprovision of Triple Modular Reduncancy Owing to Approximate ComputingIOLTS 2021 - 27th IEEE International Symposium on On-Line Testing and Robust System Design, Jun 2021, Torino, Italy. pp.1-7, ⟨10.1109/IOLTS52814.2021.9486699⟩
Conference papers
lirmm-03380025v1
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Self-Test Libraries Analysis for Pipelined Processors Transition Fault Coverage ImprovementPESW 2021 - 9th Prague Embedded Systems Workshop, Jul 2021, Horoměřice, Czech Republic
Conference papers
lirmm-03988459v1
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Preliminary Defect Analysis of 8T SRAM Cells Used for In-Memory Computing15e Colloque National du GDR SoC², Jun 2021, Rennes, France
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lirmm-03994467v1
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QAMR: an Approximation-Based FullyReliable TMR Alternative for Area Overhead ReductionETS 2020 - 25th IEEE European Test Symposium, May 2020, Tallinn, Estonia. pp.1-6, ⟨10.1109/ETS48528.2020.9131574⟩
Conference papers
lirmm-03035640v1
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Maximizing Yield for Approximate Integrated CircuitsDATE 2020 - 23rd Design, Automation and Test in Europe Conference and Exhibition, Mar 2020, Grenoble, France. pp.810-815, ⟨10.23919/DATE48585.2020.9116341⟩
Conference papers
lirmm-03036002v1
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A Novel Test Flow for Approximate Digital CircuitsDATE 2020 - EDAA/IEEE/ACM Design Automation & Test in Europe Conference, PhD Forum, Mar 2020, Grenoble, France
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lirmm-03993654v1
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Learning-Based Cell-Aware Defect Diagnosis of Customer ReturnsETS 2020 - 25th IEEE European Test Symposium, May 2020, Tallinn, Estonia. pp.1-2, ⟨10.1109/ETS48528.2020.9131601⟩
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lirmm-03035669v1
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Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICsIOLTS 2020 - 26th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2020, Napoli, Italy. pp.1-4, ⟨10.1109/IOLTS50870.2020.9159723⟩
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lirmm-02993384v1
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A Learning-Based Cell-Aware Diagnosis Flow for Industrial Customer ReturnsITC 2020 - IEEE International Test Conference, Nov 2020, Washington DC, United States. pp.1-10, ⟨10.1109/ITC44778.2020.9325246⟩
Conference papers
lirmm-03034264v1
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Design, Verification, Test and In-Field Implications of Approximate Computing SystemsETS 2020 - 25th IEEE European Test Symposium, May 2020, Tallinn, Estonia. pp.1-10, ⟨10.1109/ETS48528.2020.9131557⟩
Conference papers
lirmm-03035724v1
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A CMOS OxRAM-Based Neuron Circuit Hardened with Enclosed Layout Transistors for Aerospace ApplicationsIOLTS 2020 - 26th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2020, Napoli, Italy. pp.1-6, ⟨10.1109/IOLTS50870.2020.9159709⟩
Conference papers
lirmm-03035780v1
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A Capacitor-Less CMOS Neuron Circuit for Neuromemristive NetworksNEWCAS 2019 - 17th IEEE International Conference on Electronics Circuits and Systems, Jun 2019, Munich, Germany. ⟨10.1109/NEWCAS44328.2019.8961278⟩
Conference papers
lirmm-02395325v1
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Cell-Aware Diagnosis of Automotive Customer Returns Based on Supervised LearningART 2019 - 4th IEEE Automotive Reliability and Test Workshop, Nov 2019, Washington, United States
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lirmm-02395653v1
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Towards Improvement of Mission Mode Failure Diagnosis for System-on-ChipIOLTS 2019 - 25th International Symposium on On-Line Testing And Robust System Design, Jul 2019, Rhodes, Greece. pp.21-26, ⟨10.1109/IOLTS.2019.8854388⟩
Conference papers
lirmm-02395493v1
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Is aproximate computing suitable for selective hardening of arithmetic circuits?DTIS 2018 - 13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, Apr 2018, Taormina, Italy. pp.1-6, ⟨10.1109/DTIS.2018.8368559⟩
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lirmm-03130537v1
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Testing Approximate Digital Circuits: Challenges and OpportunitiesLATS 2018 - 19th IEEE Latin American Test Symposium, Mar 2018, Sao Paulo, Brazil. pp.1-6, ⟨10.1109/LATW.2018.8349681⟩
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lirmm-03033024v1
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An Effective Intra-Cell Diagnosis Flow for Industrial SRAMsITC: International Test Conference, Oct 2018, Phoenix, United States. pp.1-8, ⟨10.1109/TEST.2018.8624799⟩
Conference papers
lirmm-02099874v1
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On the Comparison of Different ATPG approaches for Approximate Integrated CircuitsDDECS 2018 - 1st International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2018, Budapest, Hungary. pp.85-90, ⟨10.1109/DDECS.2018.00022⟩
Conference papers
lirmm-03032856v1
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Investigation of Mean-Error Metrics for Testing Approximate Integrated CircuitsDFT 2018 - 31st IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2018, Chicago, United States. pp.1-6, ⟨10.1109/DFT.2018.8602939⟩
Conference papers
lirmm-02099895v1
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Towards approximation during test of Integrated CircuitsDDECS 2017 - 20th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2017, Dresden, Germany. pp.28-33, ⟨10.1109/DDECS.2017.7934574⟩
Conference papers
lirmm-01718580v1
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An Advanced Diagnosis Flow for SRAMsISTFA 2017 - 43rd International Symposium for Testing and Failure Analysis, Nov 2017, Pasadena, United States. pp.538-543, ⟨10.31399/asm.cp.istfa2017p0538⟩
Conference papers
lirmm-01718596v1
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Towards digital circuit approximation by exploiting fault simulationEWDTS: East-West Design & Test Symposium, Sep 2017, Novi Sad, Serbia. ⟨10.1109/EWDTS.2017.8110108⟩
Conference papers
lirmm-01718583v1
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An effective fault-injection framework for memory reliability enhancement perspectivesDTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2017, Palma de Mallorca, Spain. ⟨10.1109/DTIS.2017.7930172⟩
Conference papers
lirmm-01718579v1
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Approximate c |