Emmanuel Dubois
Présentation
Emmanuel Dubois graduated as an engineer from the Institut Supérieur d’Electronique et du Numérique (ISEN), Lille, France, in 1985 and received the Ph.D. degree from the University of Lille in 1990. He was awarded the IBM Prize for High-Performance Computing in 1990 for his work on parallelizing the IMPACT3 in-house simulation code for transport in semiconductors. In 1992, he was a visiting scientist at the IBM T.J. Watson Research Centre, Yorktown Heights, working on characterization and simulation of submicron SOI-MOSFETs. In 1993, he joined the Institut d’Electronique de Microélectronique et de Nanotechnologie (IEMN UMR 8520) where he is currently Director of Research at the Centre National de la Recherche Scientifique, CNRS. He was coordinator of three European Projects focused on near-field-based lithography and Schottky source-drain MOS technologies (FP4-IST-QUEST, FP5-IST-SODAMOS, FP6-IST-METAMOS) and was involved as workpackage/task leader in a series of European projects devoted to ultimate MOS architectures (FP5 SASEM, FP6 SiNANO NoE, FP7 NANOSIL NoE, FP6 NANOCMOS IP, FP6 PULLNANO IP). From 2005 to 2016, he was on the Technical Program Committee of ESSDERC and was TPC member of the VSLI Symposium on Technology (2018-2020). Until 2017, he participated to the nanoelectronics committee of the French Observatory on Micro and Nano Technologies (OMNT). From 2012 to 2020, he coordinated the PIA-EQUIPEX LEAF project on advanced laser microfabrication for Moore's system integration, and continues to contribute to the sustainability of this resource. Since 2011, he has co-headed the STMicroelectronics-IEMN Joint Laboratory, and in this capacity has coordinated the IEMN's contributions to the NANO2017, NANO2022, and IPCEI-ME-CT programs in the R&D context of European microelectronics and communication technologies. His research interests cover advanced source/drain CMOS technology, RF and mmW CMOS/BiCMOS, ultra-thin silicon-based suspended membranes for non-conventional thermoelectricity, laser micromachining and functional packaging of compact RF/mmW/photonics subsystems.
>>1991-2001 Simulation and modeling of Semiconductor Devices
o Development of simulation codes for transport in semiconductor devices (drift-diffusion, Monte Carlo)
o Optimisation of MOS and bipolar BiCMOS technologies
Selected publications
• P.H. Bricout, E. Dubois, ‘Short channel effect immunity and current capability of sub 0.1 micron MOSFETs using a recessed channel’, IEEE TED Transaction on Electron Devices, vol. 43, pp 1251-1255, 1996
• E. Dubois, P.H. Bricout, E. Robilliart, ‘Extraction method of the base series resistances in bipolar transistor in presence of current crowding’, IEEE JSSC Journal of Solid State Circuits, vol. 31, pp 132- 135, 1996
• E. Dubois, E. Robilliart, ‘Non-Quasi-Static Transient Model of Fully-Depleted SOI MOSFET and its Application to the Analysis of Charge Sharing in an Analog Switch’, IEEE Electron Device Letters, vol. 23, pp 43-45, 2002.
>>1997-2001 Near-field nanolithography based on scanning probes
o Modelling of anodic local oxidation assisted by STM/AFM
o Application to near-field nanolithography
Selected publications
• P.A. Fontaine, E. Dubois, D. Stiévenard, ‘Characterization of Scanning Tunneling Microscopy and Atomic Force Microscopy based Techniques for Nano-Lithography on Hydrogenated Silicon’, Journal of Applied Physics, vol. 84, no 4, pp 1776-1781, 1998
• E. Dubois, J.L. Bubendorff, ‘Kinetics of oxidation by scanning probe microscopy: a space-charge- limited model’, J. Appl. Physics, vol. 87, no 11, pp 8148-8154, 2000
>>2000-2016: Architecture, technology and fabrication of nano-transistors
o Schottky source/drain architectures in advanced MOS technology: low-barrier silicides, modelling, integration of DC and RF components
o Few-electron memory cell: self-alignment of the floating charge storage point
o MOS-FinFET architecture: spacers-first technology to overcome 3D etching limitations
o MOS transistors on crystalline thin film obtained by VLS catalytic growth on an amorphous substrate
o Nanowire transistors for ultra-sensitive chemical sensor applications
Selected publications
• E. Dubois, G. Larrieu, ‘Measurement of low Schottky barrier heights applied to metallic source/ drain MOSFETs’, J. Appl. Physics, vol. 96, no 1, pp 729-737, 2004.
• G. Larrieu, E. Dubois, X. Wallart, X. Baie, J. Katcki, ‘Formation of Pt-based silicide contacts: kinetics, stochiometry and current drive capabilities’,J. Appl. Physics, vol. 94, no 12, pp 7801- 7810, 2003.
• F.Cornu-Fruleux, J. Penaud, E. Dubois, P. Coronel, G. Larrieu, T. Skotnicki, ‘Spacer-First Damascene-Gate FinFET Architecture featuring Stringer-free Integration’, IEEE Electron Device Letters, vol. 28, pp 523-526, 2007
• N. Breil, A. Halimaoui, E. Dubois, G. Larrieu, A. Łaszczc, J. Ratajczakc, G. Rolland, A. Pouydebasquee, T. Skotnicki, ‘Selective Etching of Pt with respect to PtSi using a Sacrificial Low Temperature Germanidation Process, Appl. Phys. Lett. 91, 232112, 2007.
• R. Valentin, E. Dubois, J-P Raskin, G. Larrieu , G. Dambrine, T. C. Lim, N. Breil, F. Danneville, ‘RF Small Signal Analysis of Schottky-Barrier p-MOSFETs’, IEEE Trans. Electron Devices, vol. 55, pp 1192-1202, 2008
• G. Larrieu, D. Yarekha, E. Dubois, N. Breil, O. Faynot, ‘Arsenic-Segregated Rare Earth Silicide Junctions: Reduction of Schottky Barrier and Integration in Metallic n-MOSFETs on SOI’, IEEE Electron Device Letters, vol.30, n°11 pp. 1266-1268, 2009.
>>2010 → Now: Technologies of suspended membranes and nanowires for thermoelectric conversion and thermal and mechanical characterization
o Structuration of phononic networks for reducing the thermal conductivity of silicon
o Fabrication and thermal/mechancal characterization of planar nanometric silicon membranes and nanowires
Selected publications
• M. Haras, V. Lacatena, S. Monfray, J.F. Robillard, T. Skotnicki, E. Dubois, ‘Unconventional thin-film thermoelectric converters : structure, simulation, and comparative study’, Journal of Electronic Materials, IEEE, 43, pp.2109-2114, 2014.
• M. Haras, V. Lacatena, T. Bah, S. Didenko, J.F. Robillard, S. Monfray, T. Skotnicki, E. Dubois, ‘Fabrication of thin-film silicon membranes with phononic crystals for thermal conductivity measurements', IEEE Electron Device Letters, IEEE, 37 (10), pp.1358-136, 2016.
• T.M. Bah, S. Didenko, D. Zhou, T. Zhu, H. Ikzibane, S. Monfray, T. Skotnicki (3), E. Dubois, J.F Robillard, ‘A CMOS Compatible Thermoelectric Device made of Crystalline Silicon Membranes with Nanopores’, Nanotechnology, 33 (50), pp.505403, 2022.
• M. Haras, J.F. Robillard, T. Skotnicki, E. Dubois, ‘Design and fabrication of nanometer measurement platform for better understanding of silicon mechanical properties’, J. Appl. Physics, vol. 134, 024305, 2023.
>>2010 → Now: Functional packaging of high frequency integrated systems
o Laser microstructuring in femtosecond regime (EQUIPEX LEAF project)
o High-performance mechanically flexible RF/mmW CMOS electronics
o Enhanced RF performance through localised micromachining of the substrate
o Electro-optical interposer for high-speed 400Gb/s communication
o Packaging of mmW functions: waveguide and amplified noise source in G band
o Packaging of mmW integrated smart active probes
o Microcavities for RF-CMOS components on ultra-fast SOI for 5G applications and beyond
Selected publications
• A. Lecavelier des Etangs-Levallois, Z.K. Chen, M. Lesecq, S. Lepilliet, Y. Tagro, F. Danneville, Y. Tagro, J.F. Robillard, V. Hoel, D. Troadec, D. Gloria, C. Raynaud, J. Ratajczak, E. Dubois, 'A converging route towards very high frequency, mechanically flexible, and performance stable integrated electronics', Journal of Applied Physics, American Institute of Physics, 113 (15), pp.153701, 2013.
• J. Philippe, A. Lecavelier, M. Berthomé, J.F. Robillard, C. Gaquière, F. Danneville, D. Gloria, C. Raynaud, E. Dubois, 'Application-Oriented Performance of RF CMOS Technologies on Flexible Substrates', paper 15.7.1, 406-409, International Electron Device Meeting, IEDM’15, Washington, 2015
• J.M. Boucaud, C. Durand, F. Gianesello, D. Bucci, J.E. Broquin, E. Dubois, ‘Glass interposer for heterogeneous integration of flip-chipped photonic and electronic integrated circuits’, Applied Physics Letters, 125 (5), 2024
• A. Bhaskar, J. Philippe, F. Braud, E. Okada, V. Avramovic, J.F. Robillard, C. Durand, D. Gloria, C. Gaquière, E. Dubois, ‘Large-area femtosecond laser milling of silicon employing trench analysis’, Optics and Laser Technology, Elsevier,138, pp.106866, 2021
• Victor Fiorese , Joao Carlos Azevedo Goncalves, Simon Bouvot, Sylvie Lepilliet, Daniel Gloria, Guillaume Ducournau, Christophe Gaquière, Emmanuel Dubois,’A G-band Packaged Amplified Noise Source using SiGe BiCMOS 55 nm Technology’, IEEE Transactions on Microwave Theory and Techniques, 72 (3), pp.1775 – 1789, 2024
• Maya Alawar, Victor Fiorese, Sylvie Lepilliet, Daniel Gloria, Guillaume Ducournau, Emmanuel Dubois, ‘Towards smart probes for mmW on-wafer measurements: advanced packaging using laser micromachining of glass’, IEEE Transactions on Microwave Theory and Techniques, in press, 2025
>>List of PhD theses supervised, co-supervised, and mentored:
1) Paul-Henri Bricout (29 Nov. 94) : Contribution à l'étude de dispositifs NMOS submicroniques par les méthodes de Monte-Carlo et de dérivés-diffusion
2) Etienne Robilliart (5 Déc. 96) : Développement de modèles non-quasi-statiques MOS et bipolaires : application à l’analyse des effets de propagation de charges
3) Guillaume de Crémoux (9 Nov. 98) : Caractérisation et optimisation de technologies BiCMOS par simulations bidimensionnelles de dispositifs complexes
4) Guilhem Larrieu (9 Avr. 04) : Elaboration et caractérisation de transistors MOS Schottky en régime nanométrique
5) Julien Penaud (23 Oct. 06) : Contributions à la conception et à la réalisation de transistors MOS à grille multiple
6) Hui Xu (21 Jun. 05) : Simulation, caractérisation et optimisation de transistor LDMOS sur SOI en technologie BCD – Bipolaire-CMOS-DMOS
7) Frédérique Fruleux (4 Jun. 07) : Conception, élaboration et caractérisation de dispositifs CMOS émergents: une nouvelle approche d’intégration de transistors multi-grilles de type FinFET
8) Clément Charbuillet (9 Nov. 07) : Recherche et étude de dispositifs à commutation abrupte
9) Raphaël Valentin (19 Déc. 08) : Investigation du comportement et des potentialités en haute fréquence de transistors MOSFET avancés à contacts source/drain métalliques
10) Nicolas Breil (15 Mai 09) : Contribution à l’étude de techniques de siliciuration avancées pour les technologies CMOS décananométriques
11) Aurélie Lecestre (7 Jui. 10) : Synthèse et caractérisation de silicium cristallin par croissance VLS pour l’intégration 3D séquentielle de transistors MOS
12) Xian-Lei Han (29 Sep. 11) : Réalisation et caractérisation de dispositifs MOSFET nanométriques à base de réseaux denses de nanofils verticaux de silicium
13) Florent Ravaux (16 Jui. 12) : Contribution à l’étude de techniques de siliciuration pour les technologies CMOS avancées : impact des contraintes mécaniques et de la ségrégation de dopant sur la barrière Schottky
14) Aurélien Lecavelier (21 Mar. 13) : Report de technologie SOI-CMOS sur substrat flexible : une approche convergente vers les hautes fréquences et la stabilité des performances sous déformation mécanique
15) Heimanu Niebojewski (24 Nov. 14) : Contacts auto-alignés pour la génération de transistors 10nm FDSOI
16) François Morini (25 Jun. 15) : Thermoélectricité non conventionnelle basée sur l’émission thermoélectronique
17) Maciej Haras (7 Jan. 16) : Thermoélectricité non-conventionnelle basée sur les technologies silicium en film minces
18) Valéria Lacatena (1 Jun. 16) : Fabrication et mesure de la conductivité thermique de membranes phononiques de silicium pour des applications thermoélectriques
19) Julien Borrel (3 Mar. 17) : Nouvelle technologie de contacts pour CMOS FD-SOI 10 nm et en deçà
20) Justine Philippe (12 Déc. 17) : Intégration hétérogène de systèmes communicants CMOS-SOI en gamme millimétrique sur substrat flexible
21) Thierno Bah (3 Jui. 19) : Développement et caractérisation d'un démonstrateur de générateur thermoélectrique à base de membranes de silicium couplées à de l'ingénierie phononique
22) Stanislav Didenko (17 Jun. 19) : Anisotropie de la conductivité thermique artificiellement induite dans des membranes phononiques en silicium
23) Quentin Hivin (25 Jun. 19) : Micro-structuration laser pour le packaging électro-optique avancé
24) Arun Bhaskar (7 Oct. 19) : Substrate engineering using laser micromachining for improvement of RF devices and systems integrated in SOI-CMOS technology
25) Tianqi Zhu (19 Dec. 19) : Conception, fabrication et caractérisation de convertisseurs thermo-électroniques intégrés
26) Jean-Marc Boucaud (20 Mar. 20) : Evaluation d’un interposer électro-optique réalisé sur substrat de verre permettant de réaliser des liens optiques 400Gb/s à base de technologie photonique sur silicium
27) Victor Fiorèse (8 Sep. 22) : Sonde actives 130-220 GHz pour la mesure de bruit et de puissance
28) Hafsa Ikzibane (29 Nov. 23) : Integrated metrology devices for the Study of transport properties in silicon nanostructures
29) Akash Patil (27 Nov. 23) : Thermal characterization of GeSbTe by Raman thermometry for Phase-Change Memories
30) Maya Alawar (18 Dec. 24) : Micromachining and Packaging of Smart Probes for sub-mmW On-Wafer Measurements
31) Corentin Mercier (ongoing) : Commutateurs RF-PCM ultra-rapides pour applications 5G et au-delà
32) Daniel Gheysens (ongoing) : Microcavités pour composants RFCMOS sur SOI ultra-rapides pour applications 5G et au-delà
33) Samuel Oladosu (ongoing) : Packaging of passive and active mmW measurement probes
Research Topics and Selected Publications
Publications
Publications
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Phase-field simulations for RF switches: highlighting the benefits of GeTe over GSTSISPAD - International Conference on Simulation of Semiconductor Processes and Devices, Sep 2025, Grenoble, France |
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Optimisation de la trempe et amélioration de la fiabilité de commutateurs à matériaux à changement de phaseJNM2024 - 23ème Journées Nationales Microondes, Jun 2024, Antibes Juan les-Pins, France |
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A G-Band Glass Interposer Technology for the Integration of an Amplified Noise Source based on SiGe BiCMOS 55-nm Technology2024 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2024), Jun 2024, Washington, DC, United States. pp.31-34, ⟨10.1109/RFIC61187.2024.10599954⟩ |
Fabrication of silicon based suspended thermometry devices for study of low temperature phononic effectsMNE 2024 - 50th International Micro and Nano Engineering conference, Sep 2024, Montpellier, France |
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Enhanced Fluid Characterization with a Cantilever Microbeaman System Excited by an Embedded Electroactive Source4th International Conference on Innovative Research in Applied Science, Engineering and Technology (IRASET 2024), May 2024, Fez, Morocco. ⟨10.1109/IRASET60544.2024.10548144⟩ |
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Optimization of the melt and quench behavior of phase-change RF switch to improve power handling19th European Microwave Integrated Circuits Conference (EuMIC 2024), Sep 2024, Paris, France. pp.222-225, ⟨10.23919/EuMIC61603.2024.10732309⟩ |
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RF Performance of large germanium telluride switches for power applicationEuMIC 2023 - 18th European Microwave Integrated Circuits Conference, Sep 2023, Berlin, Germany. pp.177-180, ⟨10.23919/EuMIC58042.2023.10288974⟩ |
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Improving off-state capacitance of SOI-CMOS RF switches: how good are air microcavities?IEEE 53rd European Solid-State Device Research Conference, ESSDERC, Sep 2023, Lisbon, Portugal. pp.109-112, ⟨10.1109/ESSDERC59256.2023.10268524⟩ |
Silicon Based Suspended Thermometry Device Fabrication for Phonon Ballistic and Coherent Regimes StudyPHONONICS 2023: 6th International Conference on Phononic Crystals/Metamaterials/Metasurfaces, Phonon Transport, and Topological Phononics, Jun 2023, Manchester, United Kingdom |
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Integrated metrology devices dedicated to transient Harman measurement of silicon nano-meshesWorkshop for Multi-Functional Materials, Université Polytechnique des Hauts-de-France; Université de Mons, Jun 2023, Valenciennes (Nord), France |
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Raman thermometry characterization of GeSbTe based phase change materialsXVII Conference on Phonon Scattering in Condensed Matter, Phonons 2023, Jul 2023, Paris, France |
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GeTe thermal characterization with 3-omega and Raman thermometry methodsWorkshop for Multi-Functional Materials 2023, Jun 2023, Valenciennes, France. 1 page |
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Raman Thermometry Characterization of GeSbTe based Phase Change Materials2022 28th International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), Sep 2022, Dublin, Ireland. pp.1-5, ⟨10.1109/THERMINIC57263.2022.9950662⟩ |
[Invited] Heat transfer in silicon nano-membranes: application to thermoelectricityThe 20th international symposium on the Physics of Semiconductors and Applications (ISPSA20), Jul 2022, Jaeju, South Korea |
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Exploring the response of Ryugu-inspired phyllosilicates to a pulsed laser53rd Lunar and Planetary Science Conference, Mar 2022, Texas, United States |
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Suspended crystalline silicon thermometry devices: towards quantum nanophononicsNanoscale and Microscale Heat Transfer VII - Eurotherm, May 2022, Palermo, Italy |
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A 140 GHz to 170 GHz active tunable noise source development in SiGe BiCMOS 55 nm technology16th European Microwave Integrated Circuits Conference, EuMIC 2021, Apr 2022, London, United Kingdom. pp.125-128, ⟨10.23919/EuMIC50153.2022.9783645⟩ |
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Integrated metrology devices dedicated to transient Harman measurement of silicon nano-meshesNanoscale and Microscale Heat Transfer VII - Eurotherm, May 2022, Palermo, Italy |
[Invited] Packaging fonctionnel de fonctions RF, mmW et photonique basé sur le micro-usinage laser9eme Conférence plénière du GdR Ondes, GDR ONDES 2451, Nov 2021, Villeneuve d'Ascq, France |
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[Invited] Functional packaging of RF, mmW and photonic functions based on femtosecond laser micromachining19th International Nanotech Symposium NANO KOREA 2021, TS10-Nanofabrication & Measurements, Jul 2021, Seoul, South Korea |
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220 GHz E-Plane Transition from Waveguide to Suspended Stripline Integrated on Industrial Organic Laminate Substrate TechnologyEuropean Microwave Conference, EuMC 2021, Session EuMC06 - 3D to 2D Transitions and New Materials for mmWave system Integration, EuMIC/EuMC/EuMW, Apr 2021, London, United Kingdom. pp.99-102, ⟨10.23919/EuMC50147.2022.9784166⟩ |
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Optimization of deep rib high speed phase modulators on 300mm industrial Si-photonics platformSPIE Photonics Europe, Conference 11364 - Applications of Photonic Technology - Integrated Photonics Platforms: Fundamental Research, Manufacturing and Applications, Apr 2020, Strasbourg, France. 1136403, 8 p., ⟨10.1117/12.2554725⟩ |
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Evaluation of micro laser sintering metal 3D-printing technology for the development of waveguide passive devices up to 325 GHzIEEE/MTT-S International Microwave Symposium, IMS 2020, Aug 2020, Los Angeles, United States. pp.1168-1171, ⟨10.1109/IMS30576.2020.9224102⟩ |
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Towards broadband THz spectroscopy and analysis of sub-wavelength-size biological samples2019 44th International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz), Sep 2019, Paris, France. ⟨10.1109/IRMMW-THz.2019.8874409⟩ |
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Femtosecond laser micromachining of crystalline silicon for ablation of deep macro-sized cavities for silicon-on-insulator applicationsSPIE Photonics West, Conference 10906 - Laser-based Micro- and Nanoprocessing XIII, Feb 2019, San Francisco, United States. 109060K, 13 p., ⟨10.1117/12.2507652⟩ |
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Shining the light to terahertz spectroscopy of nL-volume biological samplesCLEO (The Conference on Lasers and Electro-Optics Conference) 2019, May 2019, San Jose, United States. paper ATu3K.6, 2 p., ⟨10.1364/CLEO_AT.2019.ATu3K.6⟩ |
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Device for broadband THz spectroscopy of 1-nL-volume samples2019 44th International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz), Sep 2019, Paris, France. paper Tu-PM2-3-6, 2 p., ⟨10.1109/IRMMW-THz.2019.8874026⟩ |
Femtosecond pulsed laser for advanced photonic packaging7th Electronic System-Integration Technology Conference, ESTC 2018, Sep 2018, Dresden, Germany. ⟨10.1109/ESTC.2018.8546374⟩ |
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Artificially-induced anisotropic heat flow in 2D patterned membranesEurotherm 111: Nanoscale and Microscale Heat Transfer VI, Dec 2018, Levi, Finland |
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Large-area femtosecond laser ablation of Silicon to create membrane with high performance CMOS-SOI RF functions2018 7th Electronic System-Integration Technology Conference (ESTC), Sep 2018, Dresden, Germany. pp.801-806, ⟨10.1109/ESTC.2018.8546407⟩ |
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[Invited] Phonon heat conduction in phononic crystal membranesE-MRS Spring Meeting, Symposium "Nanostructures for phononic applications", Jun 2018, Strasbourg, France |
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[Invited] Phonon heat conduction in phononic crystal membranes18th IEEE International Conference on Nanotechnology, IEEE Nano 2018, Session on “nanophononics”, Jul 2018, Cork, Ireland |
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Single mode polymer optical waveguides and out-of-plane coupling structure on a glass substrate7th Electronic System-Integration Technology Conference, ESTC 2018, Sep 2018, Dresden, Germany. ⟨10.1109/ESTC.2018.8546461⟩ |
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Demonstration of low-thermal conductivity silicon nano-patterned membranes as a thermoelectric materialEurotherm 111: Nanoscale and Microscale Heat Transfer VI, Dec 2018, Levi, Finland |
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Device for light-matter interaction enhancement in the full THz range for precise spectroscopy of small volume samples2018 43rd International Conference on Infrared, Millimeter, and Terahertz Waves (IRMMW-THz 2018), Sep 2018, Nagoya, Japan. paper Tu-POS-05, 1-2, ⟨10.1109/IRMMW-THz.2018.8510508⟩ |
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Performance evaluation of silicon based thermoelectric generators interest of coupling low thermal conductivity thin films and a planar architecture48th European Solid-State Device Research Conference (ESSDERC 2018), Sep 2018, Dresden, Germany. pp.226-229, ⟨10.1109/ESSDERC.2018.8486919⟩ |
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Thermal conductivity in Si 2D phononic membranes studied by Raman Thermometry,GDRe Workshop on Thermal Nanosciences and NanoEngineering, Nov 2017, Lille, France |
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Heat conduction in 2D phononic structuresWE-Heraeus-Seminar “Heat Transfer and Heat Conduction on the Nanoscale”, Apr 2016, Bad Honnef, Germany |
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Thermal conductivity of Si 2D phononic membranes studied by MD simulations and Raman thermometryEurotherm 108: Nanoscale and Microscale Heat Transfer V, Sep 2016, Santorini, Greece |
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Metal/insulator/semiconductor contacts for ultimately scaled CMOS nodes: projected benefits and remaining challengesIWJT 2016 - 16th International Workshop on Junction Technology, May 2016, Shanghai, China. pp.14-19 |
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Improved performance of flexible CMOS technology using ultimate thinning and transfer bonding6th Electronic System-Integration Technology Conference (ESTC), Sep 2016, Grenoble, France. ⟨10.1109/ESTC.2016.7764513⟩ |
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Comparative thermal characterization of nanophononic membrane strips by Raman thermometry, scanning thermal microscopy, and an electro-thermal methodEurotherm 108: Nanoscale and Microscale Heat Transfer V, Sep 2016, Santorini, Greece |
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Considerations on Fermi-depinning, dipoles and oxide tunneling for oxygen-based dielectric insertions in advanced CMOS contactsIEEE Silicon Nanoelectronics Workshop (SNW), Jun 2016, Honolulu, United States. pp.140-141, ⟨10.1109/SNW.2016.7578022⟩ |
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Application-oriented performance of RF CMOS technologies on flexible substratesIEEE International Electron Devices Meeting (IEDM), Dec 2015, Washington, United States. ⟨10.1109/IEDM.2015.7409707⟩ |
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Ultra-foldable/stretchable wideband RF interconnects using laser ablation of metal film on a flexible substrate45th European Microwave Conference (EuMC), Sep 2015, Paris, France. ⟨10.1109/EuMC.2015.7345902⟩ |
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Thermal Conductivity Reduction in Fully Suspended and Periodically Patterned Membranes Measured by Electro-Thermal MethodMRS Fall meeting, Symposium II on “Phonons”, Nov 2015, Boston, United States |
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Characterization of flexible CMOS technology tranferred onto a metallic foil2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, Jan 2015, Bologna, Italy. ⟨10.1109/ULIS.2015.7063747⟩ |
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Synthesis and electrical characterisations of a low work function cesium oxide coating for high efficiency thermionic energy converterEuropean Materials Research Society Spring Meeting, E-MRS Spring 2014, Symposium BB - Materials by design for energy applications through theory and experiment, 2014, Lille, France |
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Fabrication of integrated micrometer platform for thermoelectric measurements60th Annual IEEE International Electron Devices Meeting (IEDM), Dec 2014, San Francisco, United States. paper 8.5, 8.5.1-8.5.4, ⟨10.1109/IEDM.2014.7047012⟩ |
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Phononic crystals patterning by e-beam lithography "dots on the fly" methodology for integration into thermoelectric energy converters17èmes Journées Nationales du Réseau Doctoral en Micro-Nanoélectronique, JNRDM 2014, 2014, Villeneuve d'Ascq, France. 3 p |
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Intégration hétérogène de systèmes communicants CMOS-SOI en gamme millimétrique17èmes Journées Nationales du Réseau Doctoral en Micro-Nanoélectronique, JNRDM 2014, 2014, Villeneuve d'Ascq, France. 4 p |
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High performance CMOS with enhanced property of mechanical flexibilityCMOS Emerging Technologies Research Symposium, 2014, Grenoble, France |
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Intégration hétérogène de systèmes communicants CMOS-SOI en gamme millimétriqueDoctoriales Lille Nord de France 2014, 2014, Marcq-en-Baroeul, France |
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Nouvelle technologie de contact pour CMOS FD-SOI 10nm et en deçà le contact dipolaire17es Journées Nationales du Réseau Doctoral en Micro-Nanoélectronique, JNRDM 2014, 2014, Villeneuve d'Ascq, France. 4 p |
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Integrated measurement platform for thermal conductivity measurements in thin-film crystalline silicon and silicon-germaniumEuropean Materials Research Society Spring Meeting, E-MRS Spring 2014, Symposium BB - Materials by design for energy applications through theory and experiment, 2014, Lille, France |
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Efficient reduction of thermal conductivity in silicon using phononic-engineered membranesEuropean Materials Research Society Spring Meeting, E-MRS Spring 2014, Symposium D - Phonons and fluctuations in low dimensional structures, 2014, Lille, France |
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Silicon thermoelectrics : a non-conventional approach based on thin-film phononic engineeringCMOS Emerging Technologies Research Symposium, 2014, Grenoble, France |
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[Invited] SOI technologies for high-performance flexible electronicsJoint 7th International Workshop ''Functional Nanomaterials and Devices'' and 2nd Ukrainian-French Seminar ''Semiconductor-on-insulator materials, devices and circuits : physics, technology & diagnostic'', 2013, Kyiv, Ukraine |
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Low work function thin film growth for high efficiency thermionic energy converter : coupled Kelvin probe and photoemission study of potassium oxideEuropean Materials Research Society Spring Meeting, E-MRS Spring 2013, Symposium C - Advanced thermoelectrics : from materials to devices, 2013, Strasbourg, France |
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Detection of neurotoxic gases by functionalized silicon nanowire field-effect transistorsImagieNano Conference, Security & Defense, NanoSD 2013, 2013, Bilbao, Spain |
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Radio frequency and low noise characteristics of SOI technology on plastic for flexible electronics8th European Workshop on Silicon on Insulator Technology, Devices and Circuits, EuroSOI 2012, 2012, Montpellier, France. pp.73-78, ⟨10.1016/j.sse.2013.02.049⟩ |
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Phononic engineering of silicon using dots on the fly 'electron beam lithography and plasma etching39th International Conference on Micro and Nano Engineering, MNE 2013, 2013, London, United Kingdom |
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Carreau: CARrier REsource Access for mUle, DTN applied to hybrid WSN / satellite systemIEEE Vehicular Technology Conference - VTC 2013, Sep 2013, Las Vegas, United States. pp. 1-5 |
Extra-low parasitic gate-to-contacts capacitance architecture for sub-14nm transistor nodes9th Workshop of the Thematic Network on Silicon on Insulator Technology, Devices and Circuits, EUROSOI 2013, 2013, Paris, France |
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Self-aligned contacts for 10nm FDSOI node : from device to circuit evaluation39th IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, IEEE S3S 2013, 2013, Monterey, CA, United States. paper 6a.4, 2 p., ⟨10.1109/S3S.2013.6716549⟩ |
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Characterization of PtSi nanowires transferred onto organic film38th International Micro & Nano Engineering Conference, MNE 2012, 2012, Toulouse, France |
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High frequency noise potentialities of reported CMOS 65 nm SOI technology on flexible substrate12th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in Rf Systems, SiRF 2012, 2012, Santa Clara, CA, United States. pp.89-92, ⟨10.1109/SiRF.2012.6160147⟩ |
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Electrical nerve agents sensors based on chemically functionalized nanomaterialsNSTI Nanotechnology Conference and Expo, NSTI-Nanotech 2012, 2012, Santa Clara, CA, United States. pp.130-132 |
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Low-frequency noise in Schottky barriers based nanoscale field-effect transistorsMaterials Research Society Spring Meeting, MRS Spring 2012, Symposium D : Nanocontacts - Emerging Materials and Processing for Ohmicity and Rectification, 2012, San Francisco, CA, United States |
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Room temperature process for direct writing of nanostructures on plastic38th International Micro & Nano Engineering Conference, MNE 2012, 2012, Toulouse, France |
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TCAD study of the detection mechanisms in silicon nanoribbon-based gas sensors41st European Solid-State Device Research Conference, ESSDERC 2011, 2011, Helsinki, Finland. paper ID 5173, 131-134 |
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Principe alternatif de conversion thermoélectrique : nouveaux matériaux à faible travail d'extraction14èmes Journées Nationales du Réseau Doctoral de Micro et Nanoélectronique, JNRDM 2011, 2011, Cachan, France. pp.1-4 |
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Innovative electrical sensors for highly toxic gases based on carbon nanotubes and silicon nanowiresMaterials Research Society Fall Meeting, MRS Fall 2011, Symposium BB : Semiconductor nanowires for photovoltaics, 2011, Boston, MA, United States |
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Fabrication and electrical characterization of dense vertical Si nanowires arraysEuropean Materials Research Society Spring Meeting, E-MRS Spring 2010, Symposium P : Science and technology of nanotubes, nanowires and graphene, 2010, Strasbourg, France |
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Synthesis and characterization of crystalline silicon ribbons on insulator using catalytic Vapor-Liquid-Solid growth inside a cavity6th Workshop of the Thematic Network on Silicon on Insulator Technology, Devices and Circuits, EUROSOI 2010, 2010, France. pp.99-100 |
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Backgate bias and stress level impact on giant piezoresistance effect in thin silicon films and nanowires23rd IEEE International Conference on Micro Electro Mechanical Systems, MEMS 2010, 2010, China. pp.464-467, ⟨10.1109/MEMSYS.2010.5442464⟩ |
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Report hétérogène de dispositifs et circuits CMOS RF sur substrat souple13èmes Journées Nationales du Réseau Doctoral en Microélectronique, JNRDM 2010, 2010, France. pp.CD-ROM, Session Systèmes hautes fréquences, 1-4 |
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Metallic source/drain for advanced MOS architectures : from material engineering to device integrationSINANO-NANOSIL Workshop, Silicon-based CMOS and Beyond-CMOS Nanodevices, 2009, Athens, Greece |
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Self-aligned single-electron memory fabrication based on Si/SiGe/Si heterostructures35th International Conference on Micro & Nano Engineering, MNE 2009, 2009, Ghent, Belgium |
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A conceptual agent-based model to explore biases in a role playing game outcomes, "Learn to game, game to learn40. Annual Conference of the International Simulation And Gaming Association, ISAGA 2009, International Simulation And Gaming Association (ISAGA). Delft, NLD., Jun 2009, Singapore, Singapore. 10 p |
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Metallic source/drain architecture for advanced MOS technology : an overview of METAMOS results8th Symposium Diagnostics & Yield : Advanced Silicon Devices and Technologies for ULSI Era, 2009, Warsaw, Poland |
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NANOSIL Network of Excellence : silicon-based nanostructures and nanodevices for long-term nanoelectronics applicationsEuropean Materials Research Society Spring Meeting, E-MRS Spring 2008, Symposium I : Front-end junction and contact formation in future Silicon/Germanium based devices, 2008, Strasbourg, France |
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Investigation on the platinum silicide Schottky barrier height modulation using a dopant segregation approachMaterials Research Society Spring Meeting, MRS Spring 2008, Symposium E : Doping Engineering for Front-End Processing, 2008, United States. pp.85-90 |
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Transmission electron microscopy study of the platinum germanide formation process in the Ge/Pt/SiO2/Si structureEuropean Materials Research Society Spring Meeting, E-MRS Spring 2008, Symposium I : Front-end junction and contact formation in future Silicon/Germanium based devices, 2008, Strasbourg, France |
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Recent advances in metallic source/drain MOSFETs8th International Workshop on Junction Technology, IWJT'08, 2008, Shanghai, China. pp.139-144, ⟨10.1109/IWJT.2008.4540035⟩ |
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NANOSIL Network of Excellence: Silicon-based nanostructures and nanodevices for long-term nanoelectronics applicationsEuropean Materials Research Society (E-MRS 2008), Symposium, May 2008, Strasbourg, France |
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Electron microscopy of silicides formation in Schottky barrier contacts to electronic devicesXIII International Conference on Electron Microscopy, EM'2008, 2008, Cracow-Zakopane, Poland |
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Confined and guided catalytic growth of crystalline silicon films on a dielectric substrateESS-Fringe Poster Session of 2008 European Solid-State Device Research Conference, ESSDERC 2008, 2008, Edinburgh, Scotland, United Kingdom |
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Impact of channel doping on Schottky barrier height and investigation on p-SB MOSFETs performanceEuropean Materials Research Society Spring Meeting, E-MRS Spring 2008, Symposium I : Front-end junction and contact formation in future Silicon/Germanium based devices, 2008, _, France |
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Transmission electron microscopy study of erbium silicide formation from Ti/Er stack for Schottky contact applicationsXIII International Conference on Electron Microscopy, EM'2008, 2008, Cracow-Zakopane, Poland |
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Investigation of the ytterbium silicide as low Schottky barrier source/drain contact material for n-type MOSFETJournées Nationales sur les Technologies Emergentes en Micro-nanofabrication, JNTE 08, 2008, Toulouse, France |
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Localized and oriented catalytic growth of crystalline silicon nanoribbonsJournées Nationales sur les Technologies Emergentes en Micro-nanofabrication, JNTE 08, 2008, Toulouse, France |
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Selective etching of implanted silicon dioxide in hydrofluoric acid34th International Conference on Micro and Nano Engineering, MNE 2008, 2008, Athens, Greece |
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Dual silicide integration of low Schottky-barrier source-drain in a spacer-first damascene-metal-gate FinFET architectureProceedings of the 12th Silicon Nanoelectronics Workshop, SNW 2007, 2007, Kyoto, Japan |
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An original selective etch of Pt vs PtSi using a low temperature germanidation processProceedings of the 211th Electrochemical Society Meeting, 2007, Chicago, IL, United States |
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Low temperature implementation of dopant-segregated band-edge metallic S/D junctions in thin-body SOI p-MOSFETsIEEE International Electron Devices Meeting, IEDM 2007, 2007, United States. pp.147-150, ⟨10.1109/IEDM.2007.4418886⟩ |
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Impact of n-type channel implantation on performance of p-type Schottky barrier MOSFETsProceedings of the 12th Silicon Nanoelectronics Workshop, SNW 2007, 2007, Kyoto, Japan |
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TEM study of the silicidation process in Pt/Si and Ir/Si structuresProceedings of the 15th International Conference on Microscopy of Semiconducting Materials, MSMXV, 2007, Cambridge, United Kingdom |
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Erbium silicide formation under ultra high vacuumProceedings of the 16th European Workshop on Materials for Advanced Metallization, MAM 2007, 2007, Bruges, Belgium |
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High frequency figures of merit of conventional and Schottky barrier MOSFETs4th International Symposium on System Construction of Global-Network-Oriented Information Electronics, 2007, Sendai, Japan. pp.412-417 |
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Metallic source/drain architecture : status and prospectsSINANO-ESSDERC Workshop, 2007, Munich, Germany |
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Investigations of high frequency performance of Schottky-barrier MOSFETs7th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2007, 2007, United States. pp.32-35, ⟨10.1109/SMIC.2007.322762⟩ |
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Iridium silicide : a promising electrode for metallic source/drain in decananometer MOSFETs2006, pp.123 |
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Room temperature single-electron operation and fabrication of downscaled self-aligned single-dot memory devicesMaterials Research Society Spring Meeting, MRS Spring 2006, 2006, San Francisco, CA, United States |
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40 nm PtSi-based Schottky-barrier p-MOSFETs with a midgap tungsten gate7th Symposium Diagnostics & Yield Advanced Silicon Devices and Technologies for ULSI Era, 2006, Warsaw, Poland |
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TEM study of PtSi contact layers for accumulated low Schottky barrier MOSFET2006, pp.U/PI.24 |
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Large optimisation of source/drain architecture in double gate CMOS using combined static and transient analysisMaterials Research Society Spring Meeting, MRS Spring 2006, Transistor Scaling - Methods, Materials, and Modeling, 2006, Moscone West, San-Franscico, CA, United States |
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High current drive in ultra-short impact ionization MOS (I-MOS) devices2006, paper 6.2 |
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Influence of gate offset spacer width on SOI MOSFETs HF properties2006, pp.77-80 |
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Fabrication and analysis of CMOS fully-compatible high conductance impact-ionization MOS (I-MOS) transistors2006, pp.299-302 |
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Integration and performance of Schottky junction SOI devices6th International Workshop on Junction Technology, IWJT-2006, 2006, Shanghai, China |
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Optimisation and Simulation of an Alternative nano-flash Memory: the SASEM deviceMaterials Research Society Fall Meeting, Nov 2004, Boston, United States. pp.D1.6.1 |
Optimisation of HSQ e-beam lithography for the patterning of FinFET transistors2005, pp.9C01 |
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An optimal high contrast e-beam lithography process for the patterning of dense fin networks2005, pp.A/PII.01 |
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Schottky-barrier source-drain architecture for ultimate CMOSSINANO Workshop, 2005, Grenoble, France |
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Impact of large angle tilt implantation on the threshold voltages of LDMOS transistor on SOI2005, pp.D-VI.08 |
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TEM characterisation of accumulation low Schottky barrier MOSFET with PtSi contactsSchool on Materials Science and Electron Microscopy, Microscopy of Tomorrow's Industrial Materials, 2005, Berlin, Germany |
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Recent advances in metallic source-drain engineeringSINANO Workshop, 2005, Grenoble, France |
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Transformation of hydrogen silsexquioxane properties with RIE plasma treatment for advanced multiple-gate MOSFETs2005, pp.P-P.15 |
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Self-aligned single-electron memories SASEM project (IST-2001-32674)15th NID Workshop - Plenary Meeting, 2005, Madrid, Spain |
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Transmission electron microscopy study of erbium silicide formation using a Pt/Er stack on a thin silicon-on-insulator substrateProceedings of the XII International Conference on Electron Microscopy of Solids, EM'2005, 2005, Kazimierz Dolny, Poland |
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Optimisation and simulation of an alternative nano-flash memory : the SASEM device2004, pp.45-50 |
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FinFET achievement : optimum e-beam lithography to etch dense silicon fins networksMIGAS International Summer School on Advanced Microelectronics, MIGAS'04, 2004, Autrans, France |
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Integration of Schottky source/drain in advanced MOS technology : the SODAMOS project13th Melari/NID Workshop, 2004, Athens, Greece |
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Transistor MOSFET Schottky en régime nanométriqueJournées Nationales Nanoélectronique, 2004, Aussois, France |
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Intégration de source/drain Schottky en technologie MOS décananométriqueJournée Club EEA : Electronique des Dispositifs Ultimes et Innovants, 2004, Fuveau, France |
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Simulation et optimisation d'une mémoire flash nanométriqueJournées Nationales Nanoélectronique, 2004, Aussois, France |
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Transmission Electron Microscopy analysis of MOSFET structuresSchool on Materials Science and Electron Microscopy, Emerging Microscopy for Advanced Materials Development-Imaging and Spectroscopy on Atomic Scale, 2004, Berlin, Germany |
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Transmission electron microscopy of silicides used in ALSB-SOI MOSFET structure2004, pp.479-482 |
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Advanced and nanometric MOSFET architecture, multiple gate devices and Pi gatesMIGAS International Summer School on Advanced Microelectronics, MIGAS'04, 2004, Autrans, France |
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Electron microscopy analysis of MOSFET structuresIEEE 6th Symposium Diagnostics and Yield 2003, Jun 2003, Warsaw, Poland. pp.67-70 |
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New Schottky source/drain architecturesWorkshop Micro et Nanoélectronique, 2003, Crolles, France |
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Very low Schottky barrier to n-type silicon with PtEr-stack silicide2003, pp.99-104 |
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Transmission electron microscopy of iridium silicide contacts for advanced MOSFET structures with Schottky source and drainEuropean Materials Research Society Fall Meeting, 2003, Warsaw, Poland |
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Performance of Pt-based low Schottky barrier silicide contacts on weakly doped silicon2003, pp.D791-D796 |
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Transmission electron microscopy analysis of silicides used in ALSB-SOI MOSFET structuresConference on Microscopy of Semiconducting Materials, Mar 2003, Cambridge, United Kingdom. pp.479-482, ⟨10.1201/9781351074636-110⟩ |
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Advanced source/drain architecture using very low Schottky barriers : device design and material engineering2001, pp.203-206 |
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Silicon nanoelectronicsMicro and Nano Workshop, 2001, Louvain La Neuve, Belgium |
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Low Schottky barrier source/drain for advanced MOS architectureFranco-Swedish Workshop on SOI, 2001, Grenoble, France |
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Advanced Source/Drain Architecture using Very Low Schottky Barriers: Device Design and Material Engineering31st European Solid-State Device Research Conference, Sep 2001, Nuremberg, Germany. pp.203-206, ⟨10.1109/ESSDERC.2001.195236⟩ |
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Power LDMOS design using an SOI RESURF architecture : on state / breakdown voltage trade-offFranco-Swedish Workshop on SOI, 2001, Grenoble, France |
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Low Schottky barrier source/drain for advanced MOS architecture : device, design and material consideration2001, pp.53-56 |
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Intégration silicium à l'IEMN : de l'architecture de composants aux circuits radiofréquencesJournée Thématique de l'ANRT sur l'Intégration, 2000, Paris, France |
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Mémoires électroniques du futur : évolution de la microélectronique siliciumFête de la Science, 2000, Lille, France |
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Modeling local anodic oxidation induced by near field microscopyProc. of the 10th workshop on dielectrics in microelectronics, Nov 1999, Barcelona, Spain |
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Nanometer scale Lithography on Silicon, Titanium and PMMA resistE-MRS Materials and Processes for Submicron Technologies, vol. 89, p. 1085-1089, Editors J.M. Martinez- Duart, R. Madar, R.A. Levy, 1999, 1999, Strasbourg, France |
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Nano-lithography by SPM-induced oxidation: role of space charge in the kinetics of oxide growthProc. of the International Semiconductor Device Research Symposium ISDRS’99, Dec 1999, Charlottesville, United States |
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Impact of non-equilibrium transport and series resistances in 0.1um bulk and SOI MOSFETs27th European Solid-State Device Research Conference, Sep 1997, Stuttgart (Germany), Germany |
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SPM-based lithography techniques using selective anodic oxidationProc. of Phantoms Strategic Domain Meetings PHASDOM’97, Mar 1997, Aachen, Germany |
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Nano-Lithography based on Silicon Oxidation using Scanning Probe TechniquesIEEE Silicon Nanoelectronics Workshop (SNW), Jun 1997, Kyoto, Japan |
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Nanometer Scale Lithography of Silicon and Titanium using Scanning Probe Microscopy27th European Solid-State Device Research Conference - ESSDERC, Sep 1997, Stuttgart, Germany |
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Field Induced Oxidation of (100) Silicon Surfaces with coated AFM tip: a quantitative studyProceedings of the 9th International Conference on Scanning Tunneling Microscopy, STM’97, Jul 1997, Hamburg, Germany |
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Nanooxidation of Silicon Surfaces with a Scanning Probe Microscope: Application to the Conception of NanodevicesProceed¬ings of the N2M’97 workshop, 1997, Tokyo, Japan |
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Anodic Oxidation of Silicon and Titanium based on Near Field MicroscopyProceedings of the International Conference on Solid State Devices and Materials, SSDM’97, Jul 1997, Hamamatsu, Japan |
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Non-quasi-static SOI MOSFET model dedicated for analog circuit design1996 IEEE International SOI Conference Proceedings, Oct 1996, Sanibel Island, United States. pp.13-14, ⟨10.1109/SOI.1996.552470⟩ |
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Nano-Lithography by Scanning Probe MicroscopyProc. of the Third European Workshop on Electrochemical Processing of Semiconductors EWEPS’96, Nov 1996, Paris, France |
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A New Non-Quasi-Static SOI MOSFET Model Dedicated to Analog Circuit SimulationESSDERC '96: Proceedings of the 26th European Solid State Device Research Conference, Sep 1996, Bologna (ITALY), Italy |
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Simulations and measurements of cross-talk phenomena in BiCMOS technology for hard disk drivesInternational Electron Devices Meeting. Technical Digest, Dec 1996, San Francisco, United States. pp.481-484, ⟨10.1109/IEDM.1996.553631⟩ |
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Accuracy and Convergence Properties of a One-Dimensional Numerical Non-Quasi-Static MOSFET’s Model for Circuit SimulationProceedings of the International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), Sep 1996, Tokyo, Japan. pp.179-180, ⟨10.1109/SISPAD.1996.865328⟩ |
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Nano-Lithography on Silicon Surfaces with an SPM Operating in AirProc. of the Third European Workshop on Electrochemical Processing of Semiconduc¬tors EWEPS’96, Nov 1996, Paris, France |
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Physical MOSFET’s model for analog circuit design: application to cur¬rent copier based architecturesProc. of the International Symposium on Circuits and Systems IEEE- ISCAS’96, May 1996, Atlanta (GA), United States |
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Second and third order one-dimensional non-quasi-static bipolar transistor modelsProc. of the International Semiconductor Device Research Symposium ISDRS’95, Dec 1995, Charlottesville, United States |
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Efficient non-quasi-static MOSFETs model for circuit simulationInternational Electron Devices Meeting, Dec 1995, Washington, United States. pp.945-948, ⟨10.1109/IEDM.1995.499372⟩ |
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Analysis of the charge injection in MOS analog switches using physical modelsProc. of the International Semiconductor Device Research Symposium ISDRS’95, Dec 1995, Charlottesville, United States |
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Accuracy of series resistances extraction schemes for polysilicon bipolar transistorsIEEE Bipolar/BiCMOS Circuits and Technology Meeting, Oct 1994, Minneapolis, United States. pp.148-151, ⟨10.1109/BIPOL.1994.587883⟩ |
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Series Resistances of Polysilicon Emitter Bipolar Transistors: Simulation and MeasurementESSDERC '94: 24th European Solid State Device Research Conference, Sep 1994, Edinburg, United Kingdom |
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Short channel immunity and current drive capabilities of recessed mosfets in the sub-50 mn regime52nd Annual Device Research Conference, Jun 1994, Boulder, United States. pp.85-86, ⟨10.1109/DRC.1994.1009426⟩ |
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Transport simulation in submicron MOSFETS by coupling Monte Carlo and Drift DiffusionProc. of Nasecode IX, Apr 1993, Copper Mountain, United States |
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Simulation of non-equilibrium transport in deep submicron MOSFETsESSDERC '93: 23rd European solid State Device Research Conference, Sep 1993, Grenoble, France |
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Efficient scaling of MOSFETS in the 50 nm regime using a recessed channelInternational Symposium Semiconductor Device Research (ISDRS), Dec 1993, Charlottesville (Virginia), United States |
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Efficient simulation of impurity segregation during oxidation of arbitrarily shaped multilayer structuresProc. of the SISDEP’91, Sep 1991, Zurich, Switzerland |
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Monte Carlo/drift-diffusion coupling: non-equilibrium transport in deep submicron MOSFETsInternational Electron Devices Meeting 1991 [Technical Digest], Dec 1991, Washington, United States. pp.519-522, ⟨10.1109/IEDM.1991.235342⟩ |
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Determination of carriers capture cross-section of Si/SiO2 interface states by means of process/device simulationsProc. of the SISDEP’91, Sep 1991, Zurich, Switzerland |
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Surface recombination in bipolar transistorProc. of the Bipolar Circuit and Technology Meeting BCTM’91, Sep 1991, Minneapolis, United States |
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Piezoresistivity effects in N-MOSFET devicesTRANSDUCERS '91: 1991 International Conference on Solid-State Sensors and Actuators. Digest of Technical Papers, Jun 1991, San Francisco, United States. pp.1024-1027, ⟨10.1109/SENSOR.1991.149069⟩ |
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Efficient numerical procedure for the impurity segregation during oxidation of arbitrarily shaped multilayer structureProc. of the NASECODE VII conference, 1991, Boulder, United States |
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Adaptive Mesh Refinement For Multilayer Process SimulationNUPAD III: Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits, Jun 1990, Honolulu, United States. pp.87-88, ⟨10.1109/NUPAD.1990.748290⟩ |
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Analysis of the Punchthrough Effect in Walled Emitter Bipolar TransistorsESSDERC '89: 19th European Solid State Device Research Conference, Sep 1989, Berlin (DE), Germany. ⟨10.1007/978-3-642-52314-4_166⟩ |
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Accurate two-dimensional process-device simulations for the analysis of punchthrough in walled emitter bipolar transistorProc. of NASECODE VI conference, Ed. J.J.H. Miller, Boole Press, Jun 1989, Dublin, Ireland |
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IMPACT 1-2-3, an integrated 2D process/device simulator for MOS technologyDigest of the software forum: Software toold for process, device and circuit modeling, Ed. W. Crans, Boole Press, Jun 1989, Zurich, Switzerland |
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Dynamic mesh refinement for multilayer process simulationDigest of the software forum: Software toold for process, device and circuit modeling, Ed. W. Crans, Boole Press, Jun 1989, Zurich, Switzerland |
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IMPACT-4, a general two-dimensional multi- layer process simulatorSimulation of Semiconductor Devices and Processes, Ed. G. Baccarani and M. Rudan, Sep 1988, Bologna, Italy |
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Electrical performances evaluation of isolation structures by coupled process and device simulationSimulation of Semiconductor Devices and Processes, Ed. G. Baccarani and M. Rudan, Sep 1988, Bologna, Italy |
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Two-dimensional process simulation of bipolar devices using a multi-layer simulator: IMPACT-4’Proc. of the Bipolar Circuits and Technology Meeting, BCTM, Sep 1988, Minneapolis, United States |
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Laser micromachining for packagingJournées Nationales sur les Technologies Emergentes en micro-nanofabrication, Nov 2024, Saint-Etienne, France |
Study of phonon ballistic and coherent effects via silicon based suspended measurement platformsEurotherm Nanoscale and Microscale Heat Transfer VIII, Jun 2024, Girona, Catalonia, Spain |
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Micromachining and Packaging of Smart Probes for Sub-mmW on-Wafer MeasurementsJournées Acoustique & Instrumentation, JAI2023 : evolution et applications, Journées Thématiques de la section Electronique du Club EEA, Oct 2023, Cergy - Paris, France |
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Thermal design of PCM-RF Switches for 5G and beyond1ères Journées Scientifiques du GDR CHALCO, Jun 2022, Dijon, France. , 2022 |
Crystalline silicon based suspended thermometry platforms: study of quantum phononic effects‘Photon, Phonon, and Electron Transitions in Coupled Nanoscale Systems’ 745. WE-Heraeus-Seminar, Sep 2022, Bad Honnef, Germany |
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Nanometer-scale active thermal devices for thermal microscopy probe calibration16èmes Journées de La Matière Condensée (JMC2018), Aug 2018, Grenoble, France. pp.513-513 |
Microscopy of Semiconducting Materials 2003A. G. Cullis, P. A. Midgley. CRC Press, 4 p., 2018, 9781351074636. ⟨10.1201/9781351074636⟩ |
Invariance of DC and RF characteristics of mechanically flexible CMOS technology on plasticFunctional nanomaterials and devices for electronics, sensors and energy harvesting, 2014 |
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Schottky source/drain MOSFETsDeleonibus S. Intelligent integrated systems : technologies, devices and architectures, Pan Stanford Publishing, section 1, chapter 2, 55-96, 2013, 978-9-8144-1142-4 |
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Confined and guided vapor-liquid-solid catalytic growth of silicon nanoribbons : from nanowires to structured silicon-on-insulator layersNazarov A., Colinge J.P., Balestra F., Raskin J.P., Gamiz F., Lysenko V.S. Semiconductor-on-insulator materials for nanoelectronics applications, Springer Berlin Heidelberg, pp.Part 1, 67-89, 2011, Collection : Chemistry and materials science, Series : Engineering materials, ⟨10.1007/978-3-642-15868-1_4⟩ |
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Les nanotechnologiesEncyclopédie KLEIO, Larousse-Havas, pp.CD-ROM, 2001 |
Laboratoire commun ST-IEMN Pascal Ancey : plus de vingt ans de collaboration dans le domaine de la microélectronique et de la photoniqueCNRS actualité, 2025, https://www.cnrs.fr/fr/actualite/laboratoire-commun-st-iemn-pascal-ancey-plus-de-vingt-ans-de-collaboration-dans-le |
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Contributions à la modélisation et à la fabrication de dispositifs silicium avancée2005 |
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Mitigation of substrate coupling effects in RF switch by localized substrate removal using laser processing2021 |
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