Frédéric Mallet
Full Professor
Université Côte d'Azur
145
Documents
Current affiliations
- 451999
- 13009
- 478607
- 1039632
Researcher identifiers
frederic-mallet
- ResearcherId : H-3942-2011
-
0000-0002-9088-9821
- IdRef : 060764325
- ResearcherId : http://www.researcherid.com/rid/H-3942-2011
Publications
- 34
- 32
- 25
- 10
- 7
- 7
- 5
- 5
- 5
- 5
- 5
- 5
- 4
- 4
- 4
- 4
- 4
- 4
- 4
- 3
- 3
- 3
- 3
- 3
- 3
- 3
- 3
- 3
- 3
- 3
- 3
- 3
- 3
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 4
- 3
- 5
- 4
- 6
- 7
- 7
- 6
- 5
- 8
- 6
- 14
- 11
- 11
- 11
- 9
- 13
- 5
- 2
- 2
- 2
- 1
- 2
- 1
|
Spatio-Temporal Framework for Verifying Safety Rules in Autonomous VehiclesMODELS 2024 - 27th International Conference on Model Driven Engineering Languages and Systems, Sep 2024, Linz, Austria. ⟨10.1145/3652620.3687813⟩
Conference papers
hal-04695647v1
|
|
Real-Time CCSL: Application to the Mechanical Lung VentilatorABZ 2024 – 10th International Conference on Rigorous State Based Methods, Jun 2024, Bergamo, Italy. pp.289-306, ⟨10.1007/978-3-031-63790-2_24⟩
Conference papers
hal-04639949v1
|
|
Safety analysis of inconsistencies using a formal verification tool for DSMLDSC 2022 Europe VR - 21th Driving Simulation & Virtual reality Conference Europe, Sep 2022, Strasbourg, France
Conference papers
hal-03846499v1
|
|
Adaptation of an auto-generated code using a model-based approach to verify functional safety in real scenariosERTS 2022 - Embedded Real Time Systems, Jun 2022, Toulouse, France
Conference papers
hal-03611183v1
|
|
Enumeration and Deduction Driven Co-Synthesis of CCSL Specifications Using Reinforcement LearningRTSS 2021 - IEEE Real-Time Systems Symposium, Dec 2021, Dortmund / Virtual, Germany. pp.227-239, ⟨10.1109/RTSS52674.2021.00030⟩
Conference papers
hal-03525306v1
|
|
EPSAAV: An Extensible Platform for Safety Analysis of Autonomous VehiclesMEDI 2021 - 10th International Conference on Model and Data Engineering, Jun 2021, Tallinn, Estonia. ⟨10.1007/978-3-030-87657-9_8⟩
Conference papers
hal-03331190v1
|
|
Modeling and Verifying Uncertainty-Aware Timing Behaviors using Parametric Logical Time ConstraintDATE 2020 - Design, Automation and Test in Europe Conference, Mar 2020, Grenoble, France
Conference papers
hal-02429533v1
|
|
Formally Verifying Sequence Diagrams for Safety Critical SystemsTASE 2020 - 14th International Symposium on Theoretical Aspects of Software Engineering, Dec 2020, Hangzhou, China. pp.217-224, ⟨10.1109/TASE49443.2020.00037⟩
Conference papers
hal-03121933v1
|
|
A Language-based Multi-view Approach for Combining Functional and Security ModelsAPSEC 2019 - Asia-Pacific Software Engineering Conference, Dec 2019, Putrajaya, Malaysia
Conference papers
hal-02337469v1
|
|
Meta-models Combination for Reusing Verification TechniquesMODELSWARD 2019 - 7th International Conference on Model-Driven Engineering and Software Development, Feb 2019, Prague, Czech Republic. pp.39-50, ⟨10.5220/0007261000390050⟩
Conference papers
hal-02080768v1
|
|
Sample-Guided Automated Synthesis for CCSL SpecificationsDAC 2019 - 56th Annual Design Automation Conference 2019, Jun 2019, Las Vegas, United States. pp.1-6, ⟨10.1145/3316781.3317904⟩
Conference papers
hal-02402971v1
|
|
A Logical Approach for the Schedulability Analysis of CCSLTASE 2019 - 13th International Symposium on Theoretical Aspects of Software Engineering, Jul 2019, Guilin, China. pp.25-32, ⟨10.1109/TASE.2019.00-23⟩
Conference papers
hal-02402976v1
|
|
SMT-Based Bounded Schedulability Analysis of the Clock Constraint Specification LanguageFASE 2019 - Fundamental Approaches to Software Engineering, Apr 2019, Prague, Czech Republic. pp.61-78, ⟨10.1007/978-3-030-16722-6_4⟩
Conference papers
hal-02080763v1
|
xSHS: An Executable Domain-Specific Modeling Language for Modeling Stochastic and Hybrid Behaviors of Cyber-Physical SystemsAPSEC 2018 - 25th Asia-Pacific Software Engineering Conference, Dec 2018, Nara, Japan
Conference papers
hal-01898219v1
|
|
Time in SCChartsForum on specification & Design Languages, Sep 2018, Munich, Germany. pp.5-16, ⟨10.1109/FDL.2018.8524111⟩
Conference papers
hal-01898285v1
|
|
|
Embedding CCSL into Dynamic Logic: A Logical Approach for the Verification of CCSL SpecificationsICFEM / FTSCS 2018, Nov 2018, Gold Coast, Australia
Conference papers
hal-01929184v1
|
Model-Based Systems Engineering for Cyber-Physical Systems: a (possible) roadmap for MARTE3rd International workshop on TIming Performance engineering for Safety critical systems CONFESTA/TIPS, Sep 2018, Beijing, China
Conference papers
hal-01898291v1
|
|
From Logical Time Scheduling to Real-Time Scheduling39th IEEE Real-Time Systems Symposium, Dec 2018, Nashville, United States
Conference papers
hal-01971976v1
|
|
|
Explicit Control of Dataflow Graphs with MARTE/CCSLMODELSWARD 2017 - 5th International Conference on Model-Driven Engineering and Software Development, MODELSWARD 2017, Feb 2017, Porto, Portugal. pp.542-549, ⟨10.5220/0006269505420549⟩
Conference papers
hal-01644294v1
|
|
Multi-View Design for Cyber-Physical SystemsPhD Symposium at 13th International Conference on ICT in Education, Research, and Industrial Applications, May 2017, Kiev, Ukraine. pp.22-28
Conference papers
hal-01669918v1
|
|
MARTE/pCCSL: Modeling and Refining Stochastic Behaviors of CPSs with Probabilistic Logical ClocksFACS 2016 - The 13th International Conference on Formal Aspects of Component Software, Oct 2016, Besançon, France
Conference papers
hal-01394769v1
|
|
Flexible Runtime Verification Based On Logical Clock ConstraintsFDL 2016 - Forum on specification & Design Languages, ECSI, Sep 2016, Bremen, Germany
Conference papers
hal-01421890v1
|
|
Natural Interpretation of UML/MARTE Diagrams for System Requirements Specification2016 11th IEEE Symposium on Industrial Embedded Systems (SIES), May 2016, Krakow, Poland. pp.193-198, ⟨10.1109/SIES.2016.7509429⟩
Conference papers
hal-01394665v1
|
|
An SMT-Based Approach to the Formal Analysis of MARTE/CCSLFormal Methods and Software Engineering, Nov 2016, Tokyo, Japan. pp.433-449, ⟨10.1007/978-3-319-47846-3_27⟩
Conference papers
hal-01394677v1
|
|
An Executable Semantics of Clock Constraint Specification Language and its ApplicationsFormal Techniques for Safety-Critical Systems, Nov 2015, Luxembourg, Luxembourg. pp.37-51, ⟨10.1007/978-3-319-29510-7_2⟩
Conference papers
hal-01353824v1
|
|
A Behavioral Coordination Operator Language (BCOoL)International Conference on Model Driven Engineering Languages and Systems (MODELS), Sep 2015, Ottawa, Canada. pp.462
Conference papers
hal-01182773v1
|
Modeling SystemVerilog Assertions using SysML and CCSLElectronic System Level Synthesis Conference, Jun 2015, San Francisco, United States
Conference papers
hal-01257934v1
|
|
|
A Model-Driven Based Environment for Automatic Model CoordinationModels 2015 demo and posters, Oct 2015, Ottawa, Canada
Conference papers
hal-01198744v1
|
|
Execution of Heterogeneous Models for Thermal Analysis with a Multi-view ApproachFDL 2014 : Forum on specification and Design Languages, Oct 2014, Munich, Germany
Conference papers
hal-01060309v1
|
|
Framework for Heterogeneous Modeling and CompositionConférence en IngénieriE du Logiciel, Jun 2014, Paris, France. pp.81
Conference papers
hal-01073202v1
|
|
Timed Automata Semantics of Spatio-Temporal Consistency Language STeCInternational Symposium on Theoretical Aspects of Software Engineering, Sep 2014, Changsa, China. pp.201-208, ⟨10.1109/TASE.2014.10⟩
Conference papers
hal-01096687v1
|
Co-Algebraic Semantic Model for the Clock Constraint Specification LanguageFormal Techniques for Safety-Critical Systems - ICFEM/FTSCS 2014, Nov 2014, Luxembourg, Luxembourg
Conference papers
hal-01096688v1
|
|
|
Tool Support for the Analysis of TADL2 Timing Constraints using TimeSquareICECCS'2013 - 18th International Conference on Engineering of Complex Computer Systems, Jul 2013, Singapore, Singapore
Conference papers
hal-00850673v1
|
Analysis Support for TADL2 Timing Constraints on EAST-ADL ModelsECSA 2013 - 7th European Conference on Software Architecture, Jul 2013, Montpellier, France. pp.89-105, ⟨10.1007/978-3-642-39031-9_8⟩
Conference papers
hal-00839963v1
|
|
|
Schedulability analysis with CCSL specificationsAPSEC 2013 - 20th Asia-Pacific Software Engineering Conference, Dec 2013, Bangkok, Thailand. pp.414-421, ⟨10.1109/APSEC.2013.62⟩
Conference papers
hal-00926305v1
|
Boundness Issues in CCSL SpecificationsICFEM 2013 - 15th International Conference on Formal Engineering Methods, Oct 2013, Queenstown, New Zealand. pp.20-35, ⟨10.1007/978-3-642-41202-8_3⟩
Conference papers
hal-00877598v1
|
|
|
Safe CCSL Specifications and Marked GraphsMEMOCODE - 11th IEEE/ACM International Conference on Formal Methods and Models for Codesign, Oct 2013, Portland, United States. pp.157-166
Conference papers
hal-00913962v1
|
Power consumption analysis using multi-view modelingPATMOS - 23th International Workshop on Power and Timing Modeling, Optimization and Simulation, Sep 2013, Karlsruhe, Germany. pp.235-238, ⟨10.1109/PATMOS.2013.6662180⟩
Conference papers
hal-00906733v1
|
|
|
Lazy Parallel Synchronous Composition of In finite Transition SystemsInternational Conference on ICT in Education, Research and Industrial Applications, Jun 2013, Kherson, Ukraine. pp.130-145
Conference papers
hal-00839978v1
|
Verifying MARTE/CCSL Mode Behaviors Using UPPAALSEFM 2013 - 11th International Conference on Software Engineering and Formal Methods, Sep 2013, Madrid, Spain. pp.1-15, ⟨10.1007/978-3-642-40561-7_1⟩
Conference papers
hal-00866477v1
|
|
|
Reifying Concurrency for Executable MetamodelingSLE - 6th International Conference on Software Language Engineering, Oct 2013, Indianapolis, IN, United States. pp.365-384, ⟨10.1007/978-3-319-02654-1_20⟩
Conference papers
hal-00850770v2
|
Formal Specification of Hybrid MARTE StatechartsSixth International Symposium on Theoretical Aspects of Software Engineering, Jul 2012, Beijing, China. ⟨10.1109/TASE.2012.26⟩
Conference papers
hal-00764044v1
|
|
Automatic Generation of Observers from MARTE/CCSLRSP 2012 - International Symposium on Rapid System Prototyping, Oct 2012, Tampere, Finland. ⟨10.1109/RSP.2012.6380695⟩
Conference papers
hal-00764066v1
|
|
Multi-View Power Modeling based on UML, MARTE and SysMLSEAA - 38th Euromicro Conference on Software Engineering and Advanced Applications, Sep 2012, Cesme, Turkey. pp.17-20, ⟨10.1109/SEAA.2012.66⟩
Conference papers
hal-00720735v1
|
|
TimeSquare: Treat your Models with Logical TimeTOOLS - 50th International Conference on Objects, Models, Components, Patterns - 2012, Czech Technical University in Prague, in co-operation with ETH Zurich, May 2012, Prague, Czech Republic. pp.34-41, ⟨10.1007/978-3-642-30561-0_4⟩
Conference papers
hal-00688590v1
|
|
|
Modeling Timing Requirements in Problem Frames Using CCSLAPSEC 2011 - 18th Asia Pacific Software Engineering Conference, Dec 2011, Ho Chi Minh, Vietnam. pp.381-388, ⟨10.1109/APSEC.2011.30⟩
Conference papers
hal-00809644v1
|
|
A Model-Based Approach for Reconciliation of Polychronous Execution TracesSEAA 2011 - 37th EUROMICRO Conference on Software Engineering and Advanced Applications, Aug 2011, Oulu, Finland
Conference papers
inria-00597981v1
|
|
Logical time and temporal logics: comparing UML MARTE/CCSL and PSL18th International Symposium on Temporal Representation and Reasoning (TIME'11), Sep 2011, Lubeck, Germany
Conference papers
hal-00597086v1
|
|
Combining SystemC, IP-XACT and UML/MARTE in model-based SoC designWorkshop on Model Based Engineering for Embedded Systems Design (M-BED 2011), Mar 2011, Grenoble, France
Conference papers
inria-00601840v1
|
|
Logical time @ work: the RT-Simex projectSophia Antipolis Formal Approach, Apr 2011, Sophia, France
Conference papers
inria-00587151v1
|
Verification of MARTE/CCSL Time Requirements in Promela/SPINIEEE ICECCS 2011 - 16th IEEE International Conference on Engineering of Complex Computer Systems, Apr 2011, Las Vegas, United States. ⟨10.1109/ICECCS.2011.14⟩
Conference papers
hal-00650621v1
|
|
|
Semantic Multi-View model for Low-PowerJournées nationales IDM, CAL, et du GDR GPL, Jun 2011, Lille, France. pp.19
Conference papers
hal-00596239v1
|
|
Logical time at work: capturing data dependencies and platform constraintsForum for Design Languages (FDL), Electronic Chips & Systems design Initiative (ECSI), Sep 2010, Southampton, United Kingdom. pp.240-246
Conference papers
inria-00545866v1
|
|
VHDL Observers for Clock Constraint CheckingSymposium on Industrial Embedded Systems, Jul 2010, trento, Italy. ⟨10.1109/SIES.2010.5551372⟩
Conference papers
inria-00587107v1
|
RT-simex: retro-analysis of execution tracesSIGSOFT FSE, Nov 2010, Santa Fe, United States. pp.377-378, ⟨10.1145/1882291.1882357⟩
Conference papers
inria-00587116v1
|
|
|
Polychronous Analysis of Timing Constraints in UML MARTEIEEE International Workshop on Model-Based Engineering for Real-Time Embedded Systems Design, May 2010, Parador of Carmona, Spain. 7 p
Conference papers
inria-00497249v1
|
|
Executing AADL models with UML/MarteInt. Conf. Engineering of Complex Computer Systems - ICECCS'09, Jun 2009, Potsdam, Germany. pp. 371-376, ⟨10.1109/ICECCS.2009.10⟩
Conference papers
inria-00416592v1
|
Specification and Verification of Time Requirements with CCSL and EsterelLanguages, Compilers, and Tools for Embedded Systems, Jun 2009, Dublin, Ireland. pp.167-176, ⟨10.1145/1543136.1542475⟩
Conference papers
inria-00416654v1
|
|
|
An Automated Process for Implementing Multilevel Domain ModelsSoftware Language Engineering, Oct 2009, Denver, Colorado, United States. pp.314-333, ⟨10.1007/978-3-642-12107-4_22⟩
Conference papers
inria-00464880v1
|
|
On the semantics of UML/Marte Clock ConstraintsInt. Symp. on Object/component/service-oriented Real-time distributed Computing (ISORC'09), Mar 2009, Tokyo, Japan. pp.301-312, ⟨10.1109/ISORC.2009.27⟩
Conference papers
inria-00383279v1
|
|
Marte CCSL to execute East-ADL Timing RequirementsInt. Symp. on Object/component/service-oriented Real-time distributed Computing (ISORC'09), Mar 2009, Tokyo, Japan. pp.249-253, ⟨10.1109/ISORC.2009.18⟩
Conference papers
inria-00383262v1
|
|
MARTE: A Profile for RT/E Systems Modeling, Analysis (and Simulation?)First International Conference on Simulation Tools and Techniques for Communications, Networks and Systems SIMUTools'08, ICST, Mar 2008, Marseille, France. pp.1-8
Conference papers
inria-00371397v1
|
|
Dealing with AADL end-to-end Flow Latency with UML Marte.ICECCS - UML&AADL, Apr 2008, Belfast, Ireland. pp.228-233, ⟨10.1109/ICECCS.2008.14⟩
Conference papers
inria-00371400v1
|
|
Event-based vs. Time-Triggered Communications with UML MarteForum on specification, verification & Design Languages (FDL'08), ECSI, Sep 2008, Stuttgart, Germany. pp.154-159, ⟨10.1109/FDL.2008.4641438⟩
Conference papers
inria-00371392v1
|
|
Multiform Time in UML for Real-time Embedded ApplicationsIEEE Int. Conf. on Real-Time Computing Systems and Applications (RTCSA), Aug 2007, Daegu, South Korea. pp.232-237, ⟨10.1109/RTCSA.2007.51⟩
Conference papers
inria-00204503v1
|
|
Time Modeling in MARTEECSI Forum on specification & Design Languages (FDL), ECSI, Sep 2007, Barcelona, Spain. pp.268-273
Conference papers
inria-00204481v1
|
|
Modeling of Immediate vs. Delayed Data Communications: from AADL to UML MARTEECSI Forum on specification & Design Languages (FDL), ECSI, Sep 2007, Barcelona, Spain. pp.249-254
Conference papers
inria-00204484v1
|
|
Modeling Time(s)ACM/IEEE Int. Conf. on Model Driven Engineering Languages and Systems (MoDELS/UML), Oct 2007, Nashville, TN, United States. pp. 559-573, ⟨10.1007/978-3-540-75209-7_38⟩
Conference papers
inria-00204489v1
|
|
A multiform time approach to real-time system modeling: Application to an automotive systemIEEE Int. Symp. on Industrial Embedded Systems (SIES), Jul 2007, Lisbon, Portugal. pp.234-241, ⟨10.1109/SIES.2007.4297340⟩
Conference papers
inria-00204508v1
|
|
From UML to Petri Nets for non functional Property VerificationIEEE International Symposium on Industrial Embedded Systems, 2006. IES '06., Oct 2006, Sophia antipolis, France. ⟨10.1109/IES.2006.357475⟩
Conference papers
inria-00371277v1
|
MARTE: a new OMG profile RFP for the Modeling and Analysis of Real-Time Embedded SystemsDAC 2005 Workshop - UML for SoC Design, Jun 2005, Anaheim California, United States
Conference papers
hal-02466757v1
|
|
|
Concurrent control system: from Grafcet to VHDLEuromicro 2000, Sep 2000, Maastricht, Netherlands. pp.230-234, ⟨10.1109/eurmic.2000.874637⟩
Conference papers
hal-00973434v1
|
PhD Symposium at 13th International Conference on ICT in Education, Research, and Industrial ApplicationsBooks hal-01669920v1 |
|
Eleventh International Symposium on Theoretical Aspects of Software EngineeringIEEE, 2017, 978-1-5386-1924-7
Books
hal-01670407v1
|
|
Logical Time @ Work for the Modeling and Analysis of Embedded SystemsLAP LAMBERT Academic Publishing, pp.124, 2011, 978-3-8433-9388-1
Books
inria-00561247v1
|
|
A Model-Based Combination Language for Scheduling VerificationModel-Driven Engineering and Software Development, Springer International Publishing, 2020
Book sections
hal-02430903v1
|
Time in SCChartsLanguage, Design Methods, and Tools for Electronic System Design, Springer, pp.1-25, 2019, ⟨10.1007/978-3-030-31585-6_1⟩
Book sections
hal-02434885v1
|
|
|
MARTE for CPS and CPSoS: Present and Future, Methodology and ToolsJean-Pierre Talpin. Cyber-Physical System Design from an Architecture Analysis Viewpoint, Springer, pp.81-108, 2017, 978-981-10-4435-9. ⟨10.1007/978-981-10-4436-6_4⟩
Book sections
hal-01671190v1
|
Co-Algebraic Semantic Model for the Clock Constraint Specification LanguageCommunications in Computer and Information Science, 476, Springer, pp.174-188, 2015, ⟨10.1007/978-3-319-17581-2_12⟩
Book sections
hal-01257952v1
|
|
MARTE/CCSL for Modeling Cyber-Physical SystemsFormal Modeling and Verification of Cyber-Physical Systems, Springer Fachmedien Wiesbaden, pp.26-49, 2015, 978-3-658-09993-0. ⟨10.1007/978-3-658-09994-7_2⟩
Book sections
hal-01258084v1
|
|
|
Fostering Analysis from Industrial Embedded Systems ModelingAlessandra Bagnato; Leandro Soares Indrusiak; Imran Rafiq Quadri; Matteo Rossi. Handbook of Research on Embedded Systems Design, IGI Global, pp.283--300, 2014, 9781466661943. ⟨10.4018/978-1-4666-6194-3.ch011⟩
Book sections
hal-01088439v1
|
UML MARTE Time Model and Its Clock Constraint Specification LanguageAlessandra Bagnato; Leandro Soares Indrusiak; Imran Rafiq Quadri; Matteo Rossi. Embedded Systems Design, IGI Global, 2014, Handbook of Research on, 9781466661943. ⟨10.4018/978-1-4666-6194-3.ch002⟩
Book sections
hal-01079039v1
|
|
Improving the Efficiency of Synchronized Product with Infinite Transition SystemsErmolayev, Vadim and Mayr, Heinrich C. Communications in Computer and Information Science, 412, Springer, pp.287-307, 2013, Communications in Computer and Information Science, 978-3-319-03997-8. ⟨10.1007/978-3-319-03998-5_15⟩
Book sections
hal-00926299v1
|
|
Two Semantic Models for Clock Relations in the Clock Constraint Specification LanguageErmolayev, Vadim and Mayr, Heinrich C. Communications in Computer and Information Science, 412, Springer, pp.190-209, 2013, Communications in Computer and Information Science, 978-3-319-03997-8. ⟨10.1007/978-3-319-03998-5_10⟩
Book sections
hal-00926297v1
|
|
Logical Time @ Work: Capturing Data Dependencies and Platform ConstraintsKaźmierski, Tom J. J. and Morawiec, Adam. System Specification and Design Languages, 106, Springer New York, pp.223--238, 2012, Lecture Notes in Electrical Engineering, 978-1-4614-1426-1. ⟨10.1007/978-1-4614-1427-8_14⟩
Book sections
hal-00651864v1
|
|
|
The Time Model of Logical Clocks available in the OMG MARTE profileSandeep K. Shukla and Jean-Pierre Talpin. Synthesis of Embedded Software: Frameworks and Methodologies for Correctness by Construction, Springer Science+Business Media, LLC 2010, pp.28, 2010, 978-1-4419-6399-4
Book sections
inria-00495664v1
|
MARTE vs. AADL for Discrete-Event and Discrete-Time DomainsMartin Radetzki. Languages for Embedded Systems and their Applications, 36, Springer, pp.27-41, 2009, Lecture Notes in Electrical Engineering, 978-1-4020-9713-3. ⟨10.1007/978-1-4020-9714-0_2⟩
Book sections
inria-00416656v1
|
|
Modeling AADL data-communications with UML MARTEEugenio villar. Embedded Systems Specification and Design Languages, 10, Springer, pp.150-170, 2008, Lecture Notes in Electrical Engineering, 978-1-4020-8296-2. ⟨10.1007/978-1-4020-8297-9_11⟩
Book sections
inria-00371366v1
|
TimeSquareFrance, Patent n° : IDDN.FR.001.430002.000.S.A.2012.000.10600. 2012
Patents
hal-01355710v1
|
|
Logical Time in Model-Driven EngineeringEmbedded Systems. Université Nice Sophia Antipolis, 2010
Accreditation to supervise research
tel-02113377v1
|
|
Temps Logique pour l'ingénierie dirigée par le modèlesModeling and Simulation. Université Nice Sophia Antipolis, 2010
Accreditation to supervise research
tel-00541140v1
|
|
Actes des 22ème Journées des approches formelles dans l’assistance au développement de logiciels,AFADL'23pp.60, 2023, Journées AFADL
Proceedings
hal-04179353v2
|
IT&I-2021 : Information Technology and Implementation 2021IT&I-2021 - International Scientific Conference “Information Technology and Implementation, CEUR Workshop Proceedings, CEUR-3132, 2022
Proceedings
hal-03836228v1
|