
Giorgio Di Natale
259
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Publications
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Modeling Thermal Effects For Biasing PUFs29th IEEE European Test Symposium (ETS 2024), May 2024, The Hague, Netherlands. pp.1-6, ⟨10.1109/ETS61313.2024.10567656⟩
Communication dans un congrès
hal-04532564
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Internal State Monitoring in RISC-V Microarchitectures for Security Purpose25th IEEE Latin American Test Symposium (LATS 2024), Apr 2024, Maceio (Brazil), Brazil. ⟨10.1109/LATS62223.2024.10534613⟩
Communication dans un congrès
hal-04513607
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Autonomous FPGA Reconfigurability in Embedded Systems20th IEEE East-West Design & Test Symposium (EWDTS 2024), IEEE, Nov 2024, Yerevan, Armenia
Communication dans un congrès
hal-04917041
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Security Layers and Related Services within the Horizon Europe NEUROPULS Project2024 Design, Automation and Test in Europe Conference and Exhibition (DATE), Mar 2024, Valencia, Spain. pp.1-6, ⟨10.23919/DATE58400.2024.10546706⟩
Communication dans un congrès
hal-04740311
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IEEE 1838 compliant scan encryption and integrity for 2.5/3D ICsIEEE European Test Symposium, May 2024, La Haye, Netherlands
Communication dans un congrès
hal-04613326
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Adaptive Hardware Security: Leveraging FPGA and Processor Synergy for Reliable PUFsIEEE East-West Design & Test Symposium (EWDTS 2024), Nov 2024, Yerevan, Armenia
Communication dans un congrès
hal-04812561
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Enhancing Trustworthiness in the Global IC Supply ChainIEEE International Test Conference (ITC 2024), Nov 2024, San Diego, United States
Communication dans un congrès
hal-04812562
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Non-Invasive Attack on Ring Oscillator-based PUFs through Localized X-Ray IrradiationIEEE International Symposium on Hardware Oriented Security and Trust (HOST 2024), May 2024, Tysons Corner, United States. pp.01-11, ⟨10.1109/HOST55342.2024.10545397⟩
Communication dans un congrès
hal-04521587
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NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicSETS 2023 - IEEE European Test Symposium, IEEE, May 2023, Venise, Italy. ⟨10.48550/arXiv.2305.03139⟩
Communication dans un congrès
hal-04103942
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A Study of High Temperature Effects on Ring Oscillator based Physical Unclonable Functions29th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2023), Jul 2023, Chania, Greece
Communication dans un congrès
hal-04169632
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On-Line Method to Limit Unreliability and Bit-Aliasing in RO-PUFIEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS 2023), Jul 2023, Crete, Greece. ⟨10.1109/IOLTS59296.2023.10224877⟩
Communication dans un congrès
hal-04193294
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Experimental Evaluation of Delayed-Based Detectors Against Power-off AttackIEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS 2023), Jul 2023, Crete, Greece. ⟨10.1109/IOLTS59296.2023.10224876⟩
Communication dans un congrès
hal-04193277
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Ensuring trustworthiness and integrity of CPS hardware componentsCPS Summer School 2023, Sep 2023, Alghero, Italy
Communication dans un congrès
hal-04812563
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Open Automation Framework for Complex Parametric Electrical SimulationsInternational Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2023), IEEE, May 2023, Tallinn, Estonia
Communication dans un congrès
hal-04103996
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An Efficient Approach to Model Strong PUF with Multi-Layer Perceptron using Transfer LearningInternational Symposium on Quality Electronic Design (ISQED 2022), Apr 2022, Virtual event, United States. ⟨10.1109/ISQED54688.2022.9806257⟩
Communication dans un congrès
hal-03599336
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Dependability of Alternative Computing Paradigms for Machine Learning: hype or hope?IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2022), Apr 2022, Prague, Czech Republic. ⟨10.1109/DDECS54261.2022.9770138⟩
Communication dans un congrès
hal-03641285
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MBSA Approaches Applied to Next Decade Digital ComponentsIEEE European Test Symposium (ETS 2022), May 2022, Barcelona, Spain
Communication dans un congrès
hal-03767686
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Software Product Reliability Based on Basic Block Metrics RecompositionIEEE 28th International Symposium on On-Line Testing and Robust System Design (IOLTS 2022), Sep 2022, Turin, Italy. ⟨10.1109/IOLTS56730.2022.9897289⟩
Communication dans un congrès
hal-03768055
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Elaborating on Sub-Space Modeling as an Enrollment Solution for Strong PUF18th IEEE International Conference on Distributed Computing in Sensor Systems (DCOSS 2022), May 2022, Los Angeles, United States
Communication dans un congrès
hal-03767658
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On-Line Reliability Estimation of Ring Oscillator PUFIEEE European Test Symposium (ETS 2022), May 2022, Barcelona, Spain. ⟨10.1109/ETS54262.2022.9810418⟩
Communication dans un congrès
hal-03767650
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MBSA Approaches Applied to Next Decade Digital System-On-a-Chip ComponentsCongrès Lambda Mu 23 « Innovations et maîtrise des risques pour un avenir durable » - 23e Congrès de Maîtrise des Risques et de Sûreté de Fonctionnement, Institut pour la Maîtrise des Risques, Oct 2022, Paris Saclay, France
Communication dans un congrès
hal-03877954
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Secure PUF-based Authentication and Key Exchange Protocol using Machine LearningIEEE Computer Society Annual Symposium on VLSI (ISVLSI 2022), Jul 2022, Pafos, Cyprus
Communication dans un congrès
hal-03689856
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Sub-Space Modeling: An Enrollment Solution for XOR Arbiter PUF using Machine LearningInternational Symposium on Quality Electronic Design (ISQED 2022), Apr 2022, Virtual event, United States. ⟨10.1109/ISQED54688.2022.9806267⟩
Communication dans un congrès
hal-03599356
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Circuit-to-Circuit Attacks in SoCs via Trojan-Infected IEEE 1687 Test Infrastructure2022 IEEE International Test Conference (ITC), Sep 2022, Anaheim, CA, United States. pp.539-543, ⟨10.1109/ITC50671.2022.00068⟩
Communication dans un congrès
hal-03738329
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On the optimization of Software Obfuscation against Hardware Trojans in MicroprocessorsIEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2022), Apr 2022, Prague, Czech Republic
Communication dans un congrès
hal-03616490
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Design Space Exploration Applied to Security16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS 2021), Jun 2021, Montpellier, France. ⟨10.1109/DTIS53253.2021.9505151⟩
Communication dans un congrès
hal-03351948
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Plasticity in MTJ-based synapsesTIMA Scientific Days 2021 : RISC-V in Research and Education, TIMA / LCIS / VERIMAG Laboratories, Jul 2021, Grenoble (FR), France
Communication dans un congrès
hal-04358393
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Scramble cache: An efficient cache architecture for randomized set permutationDesign, Automation & Test in Europe Conference & Exhibition (DATE 2021), Feb 2021, Grenoble, France. ⟨10.23919/DATE51398.2021.9473919⟩
Communication dans un congrès
hal-03351626
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Identification of Hardware Devices based on Sensors and Switching Activity: a Preliminary StudyDesign, Automation & Test in Europe Conference & Exhibition (DATE 2021), Feb 2021, Grenoble (virtuel), France. ⟨10.23919/DATE51398.2021.9474173⟩
Communication dans un congrès
hal-03351477
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Security Primitives with Emerging MemoriesDesign Automation Conference (DAC 2021), Dec 2021, San Francisco, United States
Communication dans un congrès
hal-03652969
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Automated Dysfunctional Model Extraction for Model Based Safety Assessment of Digital SystemsIEEE 27th International Symposium on On-Line Testing and Robust System Design (IOLTS 2021), Jun 2021, Torino, Italy. ⟨10.1109/IOLTS52814.2021.9486705⟩
Communication dans un congrès
hal-03351793
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Security EDA Extension through P1687.1 and 1687 CallbacksIEEE International Test Conference (ITC 2021), Oct 2021, Anaheim (CA), United States. pp.344-353, ⟨10.1109/ITC50571.2021.00050⟩
Communication dans un congrès
hal-03629319
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Hardware Security and Machine Learning: Hero or Hoax?22nd IEEE Latin-American Test Symposium (LATS 2021), Oct 2021, Virtual event, Brazil
Communication dans un congrès
hal-03635104
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Memristive Logic-in-Memory Implementations: A Comparison16th International Conference on PRIME, Jul 2021, Online, Germany
Communication dans un congrès
hal-03370877
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On the Limitations of Concatenating Boolean Operations in Memristive-Based Logic-In-Memory Solutions16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS 2021), Jun 2021, Apulia (virtuelle), Italy. ⟨10.1109/DTIS53253.2021.9505096⟩
Communication dans un congrès
hal-03351924
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Nonlinear Codes for Control Flow CheckingIEEE European Test Symposium (ETS 2020), May 2020, Tallinn, Estonia. ⟨10.1109/ETS48528.2020.9131592⟩
Communication dans un congrès
hal-02899964
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Latest Trends in Hardware Security and PrivacyIEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2020), Oct 2020, Rome, Italy
Communication dans un congrès
hal-02999289
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PUF Enrollment and Life Cycle Management: Solutions and Perspectives for the Test CommunityIEEE European Test Symposium (ETS 2020), May 2020, Tallinn, Estonia. pp.1-10
Communication dans un congrès
hal-02999226
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Machine Learning and Hardware security: Challenges and OpportunitiesInternational Conference on Computer-Aided Design (ICCAD 2020), Nov 2020, San Diego, United States
Communication dans un congrès
hal-02999327
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Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access MechanismIEEE European Test Symposium, May 2020, Tallinn, Estonia. ⟨10.1109/ETS48528.2020.9131560⟩
Communication dans un congrès
hal-02532389
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Power of Prediction: Advantages of Deep Learning Modeling as Replacement for Traditional PUF CRP EnrollmentTrueDevice2020, Mar 2020, Grenoble, France
Communication dans un congrès
hal-02954099
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Encryption-Based Secure JTAGDDECS 2019 - 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2019, Cluj-Napoca, Romania. pp.1-6, ⟨10.1109/DDECS.2019.8724654⟩
Communication dans un congrès
hal-02149061
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HATE: a HArdware Trojan Emulation Environment for Microprocessor-based SystemsIEEE 25th International Symposium on On-Line Testing And Robust System Design (IOLTS'2019), Jul 2019, Rhodes Island, Greece
Communication dans un congrès
hal-02506766
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A Comprehensive Approach to a Trusted Test InfrastructureIVSW 2019 - 4th IEEE International Verification and Security Workshop, Jul 2019, Rhodes, Greece. pp.43-48, ⟨10.1109/IVSW.2019.8854428⟩
Communication dans un congrès
lirmm-02306980
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Providing Confidentiality and Integrity in Ultra Low Power IoT DevicesDTIS 2019 - 14th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Apr 2019, Mykonos, Greece. ⟨10.1109/DTIS.2019.8735090⟩
Communication dans un congrès
hal-02166920
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Rebooting Computing: The Challenges for Test and Reliability2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Oct 2019, Noordwijk, Netherlands. pp.8138-8143, ⟨10.1109/DFT.2019.8875270⟩
Communication dans un congrès
hal-02462194
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Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies26th IFIP IEEE International Conference on Very Large Scale Integration (VLSI SOC 2018), Oct 2018, Verona, Italy. pp.176-179, ⟨10.1109/VLSI-SoC.2018.8644897⟩
Communication dans un congrès
hal-01961756
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Hidden-Delay-Fault Sensor for Test, Reliability and SecurityIEEE Design Automation and Test Conference in Europe (DATE 2019), Mar 2019, Florence, Italy
Communication dans un congrès
hal-02166929
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Alternatives to fault injections for early safety/security evaluations24th IEEE European Test Symposium (ETS 2019), May 2019, Baden Baden, Germany. ⟨10.1109/ETS.2019.8791555⟩
Communication dans un congrès
hal-02110119
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Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN)IEEE VLSI Test Symposium (VTS 2019), Apr 2019, Monterey, United States
Communication dans un congrès
hal-02166904
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On the Reliability of the Ring Oscillator Physically Unclonable FunctionsIEEE 4th International Verification and Security Workshop (IVSW'2019), Jul 2019, Rhodes Island, Greece. pp.25-30
Communication dans un congrès
hal-02506955
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High-Entropy STT-MTJ-based TRNG8th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE'2019), May 2019, Baden Baden, Germany
Communication dans un congrès
hal-02506736
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Stream Cipher Based Encryption in IEEE Test StandardsTRUDEVICE 2019 - 8th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, May 2019, Baden Baden, Germany
Communication dans un congrès
hal-02506743
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A new secure stream cipher for scan chain encryption3rd IEEE International Verification and Security Workshop (IVSW 2018), Jul 2018, Platja d’Aro, Spain. pp.68-73, ⟨10.1109/IVSW.2018.8494852⟩
Communication dans un congrès
lirmm-01867256
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Does stream cipher-based scan chains encryption really prevent scan attacks?TRUDEVICE Workshop, Mar 2018, Dresden, Germany
Communication dans un congrès
lirmm-01867286
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Laser fault injection at the CMOS 28 nm technology node: an analysis of the fault modelFDTC: Fault Diagnosis and Tolerance in Cryptography, Sep 2018, Amsterdam, Netherlands. pp.1-6, ⟨10.1109/FDTC.2018.00009⟩
Communication dans un congrès
emse-01856008
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A Novel Use of Approximate Circuits to Thwart Hardware Trojan Insertion and Provide ObfuscationIOLTS: International Symposium on On-Line Testing And Robust System Design, Jul 2018, Platja d'Aro, Spain. pp.41-42, ⟨10.1109/IOLTS.2018.8474077⟩
Communication dans un congrès
lirmm-02095736
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The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacksIOLTS: International On-Line Testing Symposium, Jul 2018, Platja d’Aro, Spain. pp.214-219, ⟨10.1109/IOLTS.2018.8474230⟩
Communication dans un congrès
emse-01856000
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Assessing Body Built-In Current Sensors for Detection of Multiple Transient FaultsESREF 2018 - European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, Oct 2018, Aalborg, Denmark
Communication dans un congrès
hal-04457522
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Encryption of test data: which cipher is better?PRIME: PhD Research in Microelectronics and Electronics, Jul 2018, Prague, Czech Republic. pp.85-88, ⟨10.1109/PRIME.2018.8430366⟩
Communication dans un congrès
lirmm-01867249
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SI ECCS: SECure context saving for IoT devicesDTIS 2018 - 13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, Apr 2018, Taormina, Italy. ⟨10.1109/DTIS.2018.8368561⟩
Communication dans un congrès
hal-01740173
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Scan Chain EncryptionDOCTIS: Journée des Doctorants de l’école doctorale I2S, 2017, Montpellier, France
Communication dans un congrès
lirmm-01867277
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Improving Stress Quality for SoC Using Faster-than-At-Speed Execution of Functional ProgramsVLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability, Sep 2016, Tallinn, Estonia. pp.130-151, ⟨10.1007/978-3-319-67104-8_7⟩
Communication dans un congrès
hal-01675205
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Experimentations on scan chain encryption with PRESENTIVSW: International Verification and Security Workshop, Jul 2017, Thessaloniki, Greece. pp.45-50, ⟨10.1109/IVSW.2017.8031543⟩
Communication dans un congrès
lirmm-01699258
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Hacking the Control Flow error detection mechanismIVSW: International Verification and Security Workshop, Jul 2017, Thessaloniki, Greece. pp.51-56, ⟨10.1109/IVSW.2017.8031544⟩
Communication dans un congrès
lirmm-01700739
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Zero bit-error-rate weak PUF based on Spin-Transfer-Torque MRAM memoriesIVSW: International Verification and Security Workshop, Jul 2017, Thessaloniki, Greece. pp.128-133, ⟨10.1109/IVSW.2017.8031552⟩
Communication dans un congrès
hal-01591549
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Scan chain encryption for the test, diagnosis and debug of secure circuitsETS: European Test Symposium, May 2017, Limassol, Cyprus. ⟨10.1109/ETS.2017.7968248⟩
Communication dans un congrès
lirmm-01699254
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Reliability of computing systems: From flip flops to variablesIOLTS: International On-Line Testing Symposium, Jul 2017, Thessaloniki, Greece. pp.196-198, ⟨10.1109/IOLTS.2017.8046242⟩
Communication dans un congrès
lirmm-01700744
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Do we need a holistic approach for the design of secure IoT systems?CF: Computing Frontiers, May 2017, Siena, Italy. pp.425-430, ⟨10.1145/3075564.3079070⟩
Communication dans un congrès
hal-01628683
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Cross-layer system reliability assessment framework for hardware faultsITC: International Test Conference, Nov 2016, Fort Worth, TX, United States. ⟨10.1109/TEST.2016.7805863⟩
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lirmm-01444774
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STT-MTJ-based TRNG with on-the-fly temperature/current variation compensationIOLTS: International On-Line Testing Symposium, Jul 2016, Sant Feliu de Guixols, Spain. pp.179-184, ⟨10.1109/IOLTS.2016.7604694⟩
Communication dans un congrès
lirmm-01444408
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Towards a Highly Reliable SRAM-based PUFsDATE 2016 - 19th Design, Automation and Test in Europe Conference and Exhibition, Mar 2016, Dresden, Germany. pp.273-276
Communication dans un congrès
lirmm-01374279
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SCHIFI: Scalable and flexible high performance FPGA-based fault injectorDCIS 2016 - 31st Conference on Design of Circuits and Integrated Systems, Nov 2016, Granada, Spain. ⟨10.1109/DCIS.2016.7845375⟩
Communication dans un congrès
lirmm-01700747
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Towards Model Driven Design of Crypto Primitives and ProcessesSAM: Sensor Array and Multichannel Signal Processing, Jul 2016, Rio de Janeiro, Brazil. pp.152-158
Communication dans un congrès
lirmm-01444948
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True random number generator based on nanomagnetsNMDC: Nanotechnology Materials and Devices Conference, Oct 2016, Toulouse, France. ⟨10.1109/NMDC.2016.7777089⟩
Communication dans un congrès
lirmm-01444398
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Cache-aware reliability evaluation through LLVM-based analysis and fault injectionIOLTS: International On-Line Testing Symposium, Jul 2016, Sant Feliu de Guixols, Spain. pp.19-22, ⟨10.1109/IOLTS.2016.7604663⟩
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lirmm-01444619
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Using Outliers to Detect Stealthy Hardware Trojan Triggering?IVSW: International Verification and Security Workshop, Jul 2016, Sant Feliu de Guixols, France
Communication dans un congrès
lirmm-01347119
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Cache- and register-aware system reliability evaluation based on data lifetime analysisVTS: VLSI Test Symposium, Apr 2016, Las Vegas, United States. ⟨10.1109/VTS.2016.7477299⟩
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lirmm-01374569
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Duplication-based Concurrent Detection of Hardware Trojans in Integrated CircuitsTRUDEVICE, Nov 2016, Barcelona, Spain
Communication dans un congrès
lirmm-01385551
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Faster-than-at-speed execution of functional programs: An experimental analysisVLSI-SoC: Very Large Scale Integration and System-on-Chip, Sep 2016, Tallinn, Estonia. ⟨10.1109/VLSI-SoC.2016.7753581⟩
Communication dans un congrès
lirmm-01444403
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Hardware Trust through Layout Filling: a Hardware Trojan Prevention TechniqueISVLSI: International Symposium on Very Large Scale Integration, Jul 2016, Pittsburgh, United States. pp.254-259, ⟨10.1109/ISVLSI.2016.22⟩
Communication dans un congrès
lirmm-01346529
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SEcube™: An open-source security platform in a single SoCDTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2016, Istanbaul, Turkey. ⟨10.1109/DTIS.2016.7483810⟩
Communication dans un congrès
lirmm-01444711
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Security primitives (PUF and TRNG) with STT-MRAMVTS: VLSI Test Symposium, Apr 2016, Las Vegas, United States. ⟨10.1109/VTS.2016.7477292⟩
Communication dans un congrès
lirmm-01374573
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SEcubeTM: The most advanced, Open Source Security Platform in a Single ChipTRUDEVICE Workshop, Sep 2015, Saint-Malo, France
Communication dans un congrès
lirmm-01276298
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Laser-Induced Fault Effects in Security-Dedicated CircuitsVLSI-SoC: Very Large Scale Integration and System-on-Chip, Oct 2014, Playa del Carmen, Mexico. pp.220-240, ⟨10.1007/978-3-319-25279-7_12⟩
Communication dans un congrès
hal-01383737
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Hardware Trojan Prevention using Layout-Level Design ApproachECCTD: European Conference on Circuit Theory and Design, Aug 2015, Trondheim, Norway. ⟨10.1109/ECCTD.2015.7300093⟩
Communication dans un congrès
lirmm-01234072
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Zero Bit-Error-Rate Weak PUF based on Spin-Transfer-Torque MRAM MemoriesTRUDEVICE Workshop, Sep 2015, Saint-Malo, France
Communication dans un congrès
lirmm-01276300
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Exploiting the Variability of the Magnetic Tunnel Junction for Security Purposese-NVM: Leading Edge Embedded NVM, Sep 2015, Gardanne, France
Communication dans un congrès
lirmm-01276293
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STT-MRAM-Based Strong PUF ArchitectureISVLSI 2015 - International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.467-472, ⟨10.1109/ISVLSI.2015.128⟩
Communication dans un congrès
lirmm-01234079
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STT MRAM-Based PUFsDATE 2015 - 18th Design, Automation and Test in Europe Conference and Exhibition, Mar 2015, Grenoble, France. pp.872-875, ⟨10.7873/DATE.2015.0505⟩
Communication dans un congrès
lirmm-01234087
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Challenges in Designing Trustworthy Cryptographic Co-ProcessorsISCAS: International Symposium on Circuits and Systems, May 2015, Lisbon, Portugal. pp.2009-2012, ⟨10.1109/ISCAS.2015.7169070⟩
Communication dans un congrès
lirmm-01234083
v1
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Session-less based thermal-aware 3D-SIC test schedulingETS: European Test Symposium, May 2015, Cluj-Napoca, Romania. ⟨10.1109/ETS.2015.7138732⟩
Communication dans un congrès
lirmm-01922990
v1
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3D DFT Challenges and SolutionsISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.603-608, ⟨10.1109/ISVLSI.2015.11⟩
Communication dans un congrès
lirmm-01234076
v1
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Ring Oscillators Analysis for FPGA Security PurposesTRUDEVICE, Mar 2015, Grenoble, France
Communication dans un congrès
lirmm-01419909
v1
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Figure of merits of 28nm Si technologies for implementing laser attack resistant security dedicated circuitsISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.362-367, ⟨10.1109/ISVLSI.2015.76⟩
Communication dans un congrès
emse-01227138
v1
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Sensitivity to fault laser injection: a comparison between 28nm bulk and FD-SOI technologyTRUDEVICE Workshop, Sep 2015, Saint-Malo, France
Communication dans un congrès
lirmm-01234094
v1
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Validation Of Single BBICS Architecture In Detecting Multiple FaultsATS: Asian Test Symposium, Nov 2015, Mumbai, India
Communication dans un congrès
lirmm-01234067
v1
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Multi-segment Enhanced Scan-chains for Secure ICsTRUDEVICE Workshop, Sep 2015, Saint-Malo, France
Communication dans un congrès
lirmm-01276304
v1
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Digital Right Management for IP ProtectionISVLSI 2015 - International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.200-203, ⟨10.1109/ISVLSI.2015.127⟩
Communication dans un congrès
lirmm-01234082
v1
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Hierarchical Secure DfTTRUDEVICE Workshop, Sep 2015, St Malo, France
Communication dans un congrès
lirmm-01234095
v1
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New Testing Procedure for Finding Insertion Sites of Stealthy Hardware TrojansDATE 2015 - 18th Design, Automation and Test in Europe Conference and Exhibition, Mar 2015, Grenoble, France. pp.776-781, ⟨10.7873/DATE.2015.1102⟩
Communication dans un congrès
lirmm-01141619
v1
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Cross-Layer Early Reliability Evaluation: Challenges and PromisesIOLTS: International On-Line Testing Symposium, Jul 2014, Platja d'Aro, Girona, Spain. pp.228-233, ⟨10.1109/IOLTS.2014.6873704⟩
Communication dans un congrès
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v1
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Hacking and protecting IC hardwareDATE 2014 - 17th Design, Automation and Test in Europe Conference and Exhibition, Mar 2014, Dresden, Germany. ⟨10.7873/DATE.2014.112⟩
Communication dans un congrès
hal-02412114
v1
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Multi-stage Cross-layer Hardware Trojan Prevention, Detection and ToleranceJoint MEDIAN-TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands
Communication dans un congrès
lirmm-01234110
v1
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Layout-Aware Laser Fault Injection Simulation and Modeling: from physical level to gate levelDTIS: Design and Technology of Integrated Systems in Nanoscale Era, May 2014, Santorin, Greece. ⟨10.1109/DTIS.2014.6850665⟩
Communication dans un congrès
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v1
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TRUDEVICE Project: Trustworthy Manufacturing and Utilization of Secure DevicesHiPEAC Computing Systems Week (CSW), Oct 2014, Athens, Greece
Communication dans un congrès
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v1
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MRAM-based PUFJoint MEDIAN-TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands
Communication dans un congrès
lirmm-01234112
v1
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Design of Bulk Built-In Current Sensors to Detect Single Event Effects and Laser-Induced Fault Injection AttemptsJoint MEDIAN–TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands
Communication dans un congrès
emse-01099040
v1
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A novel Adaptive Fault Tolerant Flip-Flop Architecture based on TMRETS: European Test Symposium, May 2014, Paderborn, Germany. ⟨10.1109/ETS.2014.6847831⟩
Communication dans un congrès
lirmm-01234133
v1
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Laser attacks on integrated circuits: from CMOS to FD-SOIDTIS: Design and Technology of Integrated Systems in Nanoscale Era, May 2014, Santorin, Greece. ⟨10.1109/DTIS.2014.6850664⟩
Communication dans un congrès
emse-01099042
v1
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Cross-Layer Early Reliability Evaluation for the Computing cOntinuumDSD: Digital System Design, Aug 2014, Verona, Italy. pp.199-205, ⟨10.1109/DSD.2014.65⟩
Communication dans un congrès
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v1
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Simulating Laser Effects on ICs, from Physical Level to Gate Level: a comprehensive approachTRUDEVICE Workshop, May 2014, Paderborn, Germany
Communication dans un congrès
lirmm-01119614
v1
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Built-In Self-Test for Manufacturing TSV Defects before bondingVTS: VLSI Test Symposium, Apr 2014, Napa, CA, United States. ⟨10.1109/VTS.2014.6818771⟩
Communication dans un congrès
lirmm-00989682
v1
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Secure Test Method for Fuzzy ExtractorJoint MEDIAN-TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands
Communication dans un congrès
lirmm-01234106
v1
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Customized Cell Detector for Laser-Induced-Fault DetectionIOLTS: International On-Line Testing Symposium, Jul 2014, Platja d'Aro, Spain. pp.37-42, ⟨10.1109/IOLTS.2014.6873669⟩
Communication dans un congrès
lirmm-01119576
v1
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A survey on simulation-based fault injection tools for complex systemsDTIS: Design and Technology of Integrated Systems in Nanoscale Era, May 2014, Santorini, Greece. ⟨10.1109/DTIS.2014.6850649⟩
Communication dans un congrès
hal-01075473
v1
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Testing PUF-Based Secure Key Storage CircuitsDATE 2014 - 17th Design, Automation and Test in Europe Conference and Exhibition, Mar 2014, Dresden, Germany. ⟨10.7873/DATE.2014.207⟩
Communication dans un congrès
lirmm-01234141
v1
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2D to 3D Test Pattern Retargeting Using IEEE P1687 Based 3D DFT ArchitecturesISVLSI: International Symposium on Very Large Scale Integration, Jul 2014, Tampa, FL, United States. pp.386-391, ⟨10.1109/ISVLSI.2014.83⟩
Communication dans un congrès
lirmm-01119605
v1
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Hacking and Protecting IC HardwareDATE 2014 - 17th Design, Automation and Test in Europe Conference and Exhibition, Mar 2014, Dresden, Germany. ⟨10.7873/DATE.2014.112⟩
Communication dans un congrès
lirmm-01234147
v1
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Fault injection tools based on Virtual MachinesReCoSoC: Reconfigurable and Communication-Centric Systems-on-Chip, May 2014, Montpellier, France. ⟨10.1109/ReCoSoC.2014.6861351⟩
Communication dans un congrès
hal-01075479
v1
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Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS25th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2014), Sep 2014, Berlin, Germany
Communication dans un congrès
hal-03094235
v1
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A Novel Hardware Logic Encryption Technique for thwarting Illegal Overproduction and Hardware TrojansIOLTS: International On-Line Testing Symposium, Jul 2014, Platja d'Aro, Girona, Spain. pp.49-54, ⟨10.1109/IOLTS.2014.6873671⟩
Communication dans un congrès
lirmm-01025275
v1
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A 3D IC BIST for pre-bond test of TSVs using Ring OscillatorsNEWCAS: New Circuits and Systems, Jun 2013, Paris, France. pp.001-004
Communication dans un congrès
lirmm-00838524
v1
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Identification of Hardware Trojans triggering signalsFirst Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, May 2013, Avignon, France
Communication dans un congrès
lirmm-00991360
v1
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A smart test controller for scan chains in secure circuitsIOLTS: International On-Line Testing Symposium, Jul 2013, Chania, Greece. pp.228-229, ⟨10.1109/IOLTS.2013.6604085⟩
Communication dans un congrès
lirmm-01430814
v1
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A Bulk Built-in Sensor for Detection of Fault AttacksHOST: Hardware-Oriented Security and Trust, Jun 2013, Austin, TX, United States. pp.51-54, ⟨10.1109/HST.2013.6581565⟩
Communication dans un congrès
lirmm-01430800
v1
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3D Design For Test Architectures Based on IEEE P16874th IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits (3D-TEST), Sep 2013, Anaheim, CA, United States
Communication dans un congrès
lirmm-00989717
v1
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A JTAG based 3D DfT architecture using automatic die detectionPRIME 2013 - 9th Conference on Ph.D. Research in Microelectronics and Electronics, Jun 2013, Villach, France. pp.341-344, ⟨10.1109/PRIME.2013.6603184⟩
Communication dans un congrès
lirmm-05007359
v1
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Laser-Induced Fault SimulationEUROMICRO DSD/SEAA, Sep 2013, Santander, Spain. pp.609-614, ⟨10.1109/DSD.2013.72⟩
Communication dans un congrès
lirmm-01430807
v1
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A BIST Method for TSVs Pre-Bond TestIDT'13: 8th IEEE International Design & Test Symposium, Dec 2013, Marrakesh, Morocco. pp.1-6, ⟨10.1109/IDT.2013.6727081⟩
Communication dans un congrès
lirmm-00989727
v1
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Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detectionESREF: European Symposium on Reliability of Electron devices, Failure physics and analysis, Sep 2013, Arcachon, France. pp.B3c-2 #68
Communication dans un congrès
hal-00872705
v1
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TSVs Pre-Bond Testing: a test scheme for capturing BIST responses3D-Test: Testing Three-Dimensional Stacked Integrated Circuits, Sep 2013, Anaheim, CA, United States
Communication dans un congrès
lirmm-00989707
v1
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A single built-in sensor to check pull-up and pull-down CMOS networks against transient faultsPATMOS: Power and Timing Modeling, Optimization and Simulation, Sep 2013, Karlsruhe, Germany. pp.157-163, ⟨10.1109/PATMOS.2013.6662169⟩
Communication dans un congrès
lirmm-00968621
v1
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Circuits intégrés en 3DROADEF 2012 - 13e Congrès de la Société Française de Recherche Opérationnelle et d'Aide à la Décision, Apr 2012, Angers, France
Communication dans un congrès
lirmm-00805058
v1
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How to Sample Results of Concurrent Error Detection Schemes in Transient Fault Scenarios?RADECS: Radiation and Its Effects on Components and Systems, Sep 2011, Sevilla, Spain. pp.635-642, ⟨10.1109/RADECS.2011.6131361⟩
Communication dans un congrès
lirmm-00701776
v1
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On-Chip Comparison for Testing Secure ICsDCIS 2012 - 27th Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France. pp.112-117
Communication dans un congrès
lirmm-00795205
v1
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A New Scan Attack on RSA in Presence of Industrial CountermeasuresCOSADE: Constructive Side-Channel Analysis and Secure Design, May 2012, Darmstadt, Germany. pp.89-104, ⟨10.1007/978-3-642-29912-4_8⟩
Communication dans un congrès
lirmm-00719986
v1
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Is Side-Channel Analysis really reliable for detecting Hardware Trojans?DCIS 2012 - 27th Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France. pp.238-242
Communication dans un congrès
lirmm-00823477
v1
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Novel transient-fault detection circuit featuring enhanced bulk built-in current sensor with low-power sleep-modeESREF: European Symposium on Reliability of Electron devices, Failure physics and analysis, Oct 2012, Cagliari, Italy
Communication dans un congrès
hal-00867864
v1
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Calibrating Bulk Built-in Current Sensors for Detecting Transient FaultsColloque GDR SoC-SiP, 2012, Lyon, France
Communication dans un congrès
lirmm-00715126
v1
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Are Advanced DfT Structures Sufficient for Preventing Scan-Attacks?VTS'12: 30th IEEE VLSI Test Symposium, Apr 2012, Maui, Hawai, United States. pp.246-251
Communication dans un congrès
lirmm-00694536
v1
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A Scan-based Attack on Elliptic Curve Cryptosystems in presence of Industrial Design-for-Testability StructuresIEEE International Symposium on Defect and Fault Tolerance in VLSI & Nanotechnology Systems, United States. http://www.dfts.org/
Communication dans un congrès
lirmm-00744472
v1
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Power Consumption Traces Realignment to Improve Differential Power AnalysisDDECS'11: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits ans Systems, Germany. pp.201-206
Communication dans un congrès
lirmm-00592005
v1
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Timing Issues for an Efficient Use of Concurrent Error Detection CodesLATW: Latin American Test Workshop, Mar 2011, Porto de Galinhas, Brazil. pp.1-6, ⟨10.1109/LATW.2011.5985933⟩
Communication dans un congrès
lirmm-00627427
v1
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Timing Issues of Transient Faults in Concurrent Error Detection SchemesGdR SoC-SiP'2011: Colloque national du Groupement de Recherche System-On-Chip et System-In-Package, Jun 2011, Lyon, France. http://www2.lirmm.fr/~w3mic/SOCSIP/
Communication dans un congrès
lirmm-00701798
v1
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New Security Threats Against Chips Containing Scan Chain StructuresHOST'11: IEEE International Symposium on Hardware-Oriented Security and Trust, San Diego, CA, United States. pp.105-110
Communication dans un congrès
lirmm-00599690
v1
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New side-channel attack against scan chains9th CryptArchi Workshop (2011), Jun 2011, Bochum, Germany. pp.2
Communication dans un congrès
lirmm-00648575
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Scan Attacks and Countermeasures in Presence of Scan Response CompactorsETS: European Test Symposium, May 2011, Trondheim, Norway. pp.19-24, ⟨10.1109/ETS.2011.30⟩
Communication dans un congrès
lirmm-00647062
v1
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A New Bulk Built-in Current Sensor-Based Strategy for Dealing with Long-Duration Transient Faults in Deep-Submicron TechnologiesDFT'2011: International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2011, Vancouver, Canada. pp.302-308, ⟨10.1109/DFT.2011.15⟩
Communication dans un congrès
lirmm-00701789
v1
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Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for DesignersDELTA'10: Fifth IEEE International Symposium on Electronic Design, Test and Application, Jan 2010, Ho Chi Minh City, Vietnam. pp.256-261
Communication dans un congrès
lirmm-00539993
v1
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Waveforms re-Alignment to Improve DPA AttacksCryptArchi: Cryptographic Architectures, Jun 2010, Gif-sur-Yvette, France
Communication dans un congrès
lirmm-00539994
v1
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Ensuring High Testability without Degrading SecurityDDECS'10: IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Vienna, Austria. pp.6
Communication dans un congrès
lirmm-00480710
v1
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Evaluation of Concurrent Error Detection Techniques on the Advanced Encryption StandardETS: European Test Symposium, May 2010, Prague, Czech Republic
Communication dans un congrès
lirmm-00493247
v1
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Evaluation of Concurrent Error Detection Techniques on the Advanced Encryption StandardIOLTS: International On-Line Testing Symposium, Jul 2010, Corfu, Greece. pp.223-228, ⟨10.1109/IOLTS.2010.5560196⟩
Communication dans un congrès
lirmm-00539232
v1
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Ensuring High Testability without Degrading SecurityETS: European Test Symposium, May 2009, Seville, Spain
Communication dans un congrès
lirmm-00407163
v1
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Execution Time Reduction of Differential Power Analysis ExperimentsLATW'09: 10th Latin-American Test Workshop, Mar 2009, Armaçao dos Buzios, Brazil, pp.1-5, ⟨10.1109/LATW.2009.4813819⟩
Communication dans un congrès
lirmm-00367712
v1
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LIFTING: an Open-Source Logic SimulatorDATE 2009 - Design, Automation and Test in Europe Conference and Exhibition, Apr 2009, Nice, France
Communication dans un congrès
lirmm-00407166
v1
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Tutorial on Design For Testability & Digital SecurityIEEE 10th Latin American Test Workshop, 2009, Buzios, Brazil
Communication dans un congrès
lirmm-00407161
v1
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On-Line Instruction-Checking in Pipelined MicroprocessorsATS: Asian Test Symposium, Nov 2008, Saporro, Japan. pp.377-382, ⟨10.1109/ATS.2008.47⟩
Communication dans un congrès
lirmm-00363689
v1
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Modularer Selbsttest und Optimierte Reparaturanalyse für Eingebettete SpeicherZUE'08: Zuverlässigkeit und Entwurf, Germany. pp.049-056
Communication dans un congrès
lirmm-00332558
v1
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Low Cost Self-Test of Crypto-DevicesWDSN'08: 2nd Workshop on Dependable and Secure Nanocomputing, Jun 2008, Anchorage, Canada, United States. pp.41-46
Communication dans un congrès
lirmm-00295108
v1
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March Test BDN: A new March Test for Dynamic FaultsAQTR'08: Automation, Quality and Testing, Robotics, May 2008, Cluj-Napoca, Romania, pp.085-089
Communication dans un congrès
lirmm-00303528
v1
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Stuck-at-Faults Test using Differential Power AnalysisLPonTR'08: Workshop on Low Power Design Impact on Test and Reliability, May 2008, Italy
Communication dans un congrès
lirmm-00332529
v1
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Observability of Stuck-at-Faults with Differential Power AnalysisLATW'08: IEEE Latin American Test Workshop, Feb 2008, Mexico. pp.N/A
Communication dans un congrès
lirmm-00295498
v1
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An Integrated Validation Environment for Differential Power AnalysisDELTA: Electronic Design, Test and Applications, Jan 2008, Hong Kong, China. pp.527-532, ⟨10.1109/DELTA.2008.61⟩
Communication dans un congrès
lirmm-00407165
v1
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LIFTING: A Flexible Open-Source Fault SimulatorATS 2008 - 17th IEEE Asian Test Symposium, Nov 2008, Saporro, Japan. pp.035-040, ⟨10.1109/ATS.2008.17⟩
Communication dans un congrès
lirmm-00343610
v1
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A Reliable Architecture for Substitution Boxes in Integrated CryptographicDCIS'08: Conference on Design of Circuits and Integrated Systems, Nov 2008, pp.27-32
Communication dans un congrès
lirmm-00363783
v1
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LIFTING: an Open-Source Logic SimulatorSAME'08: Sophia-Antipolis Forum on MicroElectronics 2008, Sep 2008, Sophia-Antipolis, France
Communication dans un congrès
lirmm-00363795
v1
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A Reliable Architecture for the Advanced Encryption Standard13th IEEE European Test Symposium, May 2008, Verbania, Italy. pp.13-18, ⟨10.1109/ETS.2008.26⟩
Communication dans un congrès
lirmm-00285868
v1
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An Integrated Validation Environment for Differential Power AnalysisSAME'08: Sophia-Antipolis Forum on MicroElectronics 2008, Sep 2008, Sophia-Antipolis, France
Communication dans un congrès
lirmm-00363796
v1
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An On-Line Fault Detection Scheme for SBoxes in Secure CircuitsIOLTS 2007 - 13th IEEE International On-Line Testing and Robust System Design Symposium, Jul 2007, Heraklion, Crete, Greece. pp.57-62, ⟨10.1109/IOLTS.2007.16⟩
Communication dans un congrès
lirmm-00163244
v1
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A Novel Parity Bit Scheme for SBOX in AES CircuitsIEEE Design and Diagnostics of Electronic Circuits and Systems (DDECS), Apr 2007, Cracovie, Poland. pp.267-271, ⟨10.1109/DDECS.2007.4295295⟩
Communication dans un congrès
lirmm-00141799
v1
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On-Line Self-Test of AES Hardware ImplementationsDSN'07: Workshop on Dependable and Secure Nanocomputing, Jun 2007, Edinburgh, United Kingdom
Communication dans un congrès
lirmm-00163405
v1
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Test and SecurityCryptArchi: Cryptographic Architectures, Jun 2007, Montpellier, France
Communication dans un congrès
lirmm-00163017
v1
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SRAM-PUF: Platform for Acquisition of Sram-Based Pufs from Micro-ControllersUniversity Booth - IEEE Design Automation and Test Conference in Europe (DATE 2021), Feb 2021, Grenoble, France
Poster de conférence
hal-03370033
v1
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Encryption Techniques for Test Infrastructures13e Colloque National Du GDR SoC², Jun 2019, Montpellier, France.
Poster de conférence
lirmm-02306922
v1
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Scan chain encryption, a countermeasure against scan attacksPHISIC: Practical Hardware Innovations in Security Implementation and Characterization, May 2018, Gardanne, France. , Workshop on Practical Hardware Innovations in Security Implementation and Characterization, 2018
Poster de conférence
lirmm-01882565
v2
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Sécurité des moyens de test des SoCJournée thématique des GDR SoC² et Sécurité Informatique : Sécurité des SoC complexes hétérogènes – de la TEE au matériel, Sep 2018, Paris, France. 2018
Poster de conférence
lirmm-01882552
v1
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SECCS: SECure Context Saving for IoT Devices12e Colloque National du GDR SoC/SiP, Jun 2018, Paris, France. 2018
Poster de conférence
hal-02042659
v1
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Stream cipher-based scan encryption in test standards12e Colloque National du GDR SoC/SiP, Jun 2018, Paris, France. 2018
Poster de conférence
lirmm-01867283
v1
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Scan chain encryption in Test StandardsSURREALIST: SecURity, REliAbiLity, test, prIvacy, Safety and Trust of Future Devices, May 2018, Bremen, Germany. , Workshop on SecURity, REliAbiLity, test, prIvacy, Safety and Trust of Future Devices, 2018
Poster de conférence
lirmm-01882578
v2
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Scan Chain Encryption for the Test, Diagnosis and Debug of Secure CircuitsSETS: South European Test Seminar, Mar 2017, Alpe d'Huez, France. , 2017
Poster de conférence
lirmm-01892667
v1
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Sécurisation des structures de test : étude comparative11e Colloque National du GDR SoC/SiP, Jun 2017, Bordeaux, France. 2017
Poster de conférence
lirmm-01867279
v1
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Detection and Prevention of Hardware Trojan through Logic TestingTRUDEVICE, Nov 2016, Barcelona, Spain. , 4th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, Manufacturing test of secure devices / Reverse engineering countermeasures / Other topics, pp.#33, 2016, Posters IV
Poster de conférence
lirmm-01430007
v1
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tLIFTING : A Multi-level Delay-annotated Fault Simulator for Digital CircuitsDCIS 2012 - 27th Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France. , 2012
Poster de conférence
lirmm-00799892
v1
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Exact wafer matching process wafer to wafer inegration3D Integration Applications, 2012, Grenoble, France. Workshop on 3D Integration Applications, Technology, Architecture, Design, Automation, and Test, 2012
Poster de conférence
lirmm-00805059
v1
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Parallel Test of Identical Cores Using Test Elevators in 3D Circuits3D-Test: Testing Three-Dimensional Stacked Integrated Circuits, Nov 2010, Austin, TX, United States. IEEE, 1st International Workshop on Testing Three-Dimensional Stacked Integrated Circuits, 2010
Poster de conférence
lirmm-00537857
v1
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A Modular Memory BIST for Optimized Memory RepairIEEE Computer Society. IOLTS: International On-Line Testing Symposium, Jul 2008, Rhodes, Greece. 14th International On-Line Testing and Robust System Design Symposium, pp.171-172, 2008, ⟨10.1109/IOLTS.2008.30⟩
Poster de conférence
lirmm-00363724
v1
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Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoCIOLTS: International On-Line Testing Symposium, Jul 2007, Heraklion, Crete, Greece. 13th IEEE International Symposium on On-Line Testing and Robust System Design, pp.205-206, 2007, ⟨10.1109/IOLTS.2007.17⟩
Poster de conférence
lirmm-00163343
v1
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A Dependable Parallel Architecture for SBoxesReCoSoc'07: International Workshop on Reconfigurable Communication Centric System-On-Chips, Jun 2007, Montpellier, France. pp.CD-ROM, 2007
Poster de conférence
lirmm-00163414
v1
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Cross-Layer Reliability of Computing Systemsiet - the institution of engineering and technology, pp.1-328, 2020, 978-1785617973. ⟨10.1049/PBCS057E⟩
Ouvrages
hal-02986877
v1
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Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2015), 2015, 978-1-4799-8718-4
Ouvrages
lirmm-01433587
v1
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Proceedings of the 18th IEEE European Test Symposium (ETS 2013) - May 27-30, 2013 - Avignon, FranceIEEE, 2013, 978-1-4673-6375-4
Ouvrages
lirmm-01433571
v1
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Design techniques to improve the resilience of computing systems: software layerCross-Layer Reliability of Computing Systems, iet - the institution of engineering and technology, pp.95-112, 2020, 978-1785617973. ⟨10.1049/PBCS057E_ch4⟩
Chapitre d'ouvrage
hal-02986855
v1
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Componenti e Sistemi HardwareCyber Security National Lab Il Futuro della Cyber Security in Italia, 2015
Chapitre d'ouvrage
lirmm-01276291
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Chapter 9: Fault Detection in Crypto-devicesWei Zhang. Fault Detection, InTech, pp.177-194, 2010, 978-953-307-037-7. ⟨10.5772/213⟩
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Conception et test des circuits et systèmes numériques à haute fiabilité et sécuritéMicro and nanotechnologies/Microelectronics. Université de Montpellier II, 2014
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