Giorgio Di Natale
5
Documents
Présentation
Giorgio Di Natale received the PhD in Computer Engineering from the Politecnico di Torino in 2003. He is director of research for the National Research Center of France at the TIMA laboratory in Grenoble.
His research interests include hardware security and trust, secure circuits design and test, reliability evaluation and fault tolerance, software implemented hardware fault tolerance, and VLSI testing.
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Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 ExtensionsIEEE Design & Test, 2022, IEEE Design & Test, 39 (3), pp.117-124. ⟨10.1109/MDAT.2021.3117875⟩
Article dans une revue
hal-03370952v1
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Noise-free security assessment of eviction set construction algorithms with randomized cachesApplied Sciences, 2022, 12 (5), pp.2415. ⟨10.3390/app12052415⟩
Article dans une revue
hal-03640388v1
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Non-Invasive Attack on Ring Oscillator-based PUFs through Localized X-Ray IrradiationIEEE International Symposium on Hardware Oriented Security and Trust (HOST 2024), May 2024, Washington, DC, United States
Communication dans un congrès
hal-04521587v1
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Scramble Cache: An Efficient Cache Architecture for Randomized Set PermutationDesign, Automation & Test in Europe Conference & Exhibition (DATE 2021), Feb 2021, Grenoble, France. ⟨10.23919/DATE51398.2021.9473919⟩
Communication dans un congrès
hal-03351626v1
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Power of Prediction: Advantages of Deep Learning Modeling as Replacement for Traditional PUF CRP EnrollmentTrueDevice2020, Mar 2020, Grenoble, France
Communication dans un congrès
hal-02954099v1
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