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Jean-Philippe Noel

24
Documents

Publications

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Analysis of resistive defects on a foundry 8T SRAM-based IMC architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noel , Arnaud Virazel
Microelectronics Reliability, 2023, 147, pp.115029. ⟨10.1016/j.microrel.2023.115029⟩
Article dans une revue hal-04129470v1

Towards a truly integrated vector processing unit for memory-bound applications based on a cost-competitive computational SRAM design solution

Maha Kooli , Antoine Heraud , Henri-Pierre Charles , Bastien Giraud , Roman Gauchi
ACM Journal on Emerging Technologies in Computing Systems, 2022, 18 (2), pp.1-26. ⟨10.1145/3485823⟩
Article dans une revue cea-04129882v1
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SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration

Ivan Miro-Panades , Benoit Tain , Jean-Frederic Christmann , David Coriat , Romain Lemaire
IEEE Journal of Solid-State Circuits, 2022, pp.1. ⟨10.1109/JSSC.2022.3198505⟩
Article dans une revue hal-04061172v1
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A 35.6TOPS/W/mm$^2$ 3-Stage Pipelined Computational SRAM with Adjustable Form Factor for Highly Data-Centric Applications

J.-P Noel , M. Pezzin , R. Gauchi , J.-F Christmann , M. Kooli
IEEE Solid-State Circuits Letters, 2020, ⟨10.1109/LSSC.2020.3010377⟩
Article dans une revue cea-02904882v1
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A 35.6 TOPS/W/mm2 3-Stage Pipelined Computational SRAM With Adjustable Form Factor for Highly Data-Centric Applications

Jean-Philippe Noel Noel , Manuel Pezzin , Roman Gauchi , Jean-Frédéric Christmann , Maha Kooli
IEEE Journal of Solid-State Circuits, 2020, 2, pp.286-298. ⟨10.1109/LSSC.2020.3010377⟩
Article dans une revue cea-03605066v1
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Ultrahigh-Density 3-D Vertical RRAM With Stacked Junctionless Nanowires for In-Memory-Computing Applications

M. Ezzadeen , D. Bosch , B. Giraud , S. Barraud , J. -P. Noel
IEEE Transactions on Electron Devices, 2020, 67 (11), pp.4626-4630. ⟨10.1109/TED.2020.3020779⟩
Article dans une revue hal-04442663v1

Resistive Switching Memory Architecture Based on Polarity Controllable Selectors

Alexandre Levisse , Pierre-Emmanuel Gaillardon , Bastien Giraud , Ian O'Connor , Jean-Philippe Noel
IEEE Transactions on Nanotechnology, 2019, 18, pp.183-194. ⟨10.1109/TNANO.2018.2887140⟩
Article dans une revue hal-02060199v1
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High-Density 4T SRAM Bitcell in 14-nm 3-D CoolCube Technology Exploiting Assist Techniques

Reda Boumchedda , Jean-Philippe Noel , Bastien Giraud , Kaya Can Akyel , Mélanie Brocard
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017, 25 (8), pp.2296-2306. ⟨10.1109/TVLSI.2017.2688862⟩
Article dans une revue cea-02193602v1
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Intra-cell Resistive-Open Defect Analysis on a Foundry 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noël , Arnaud Virazel
ETS 2023 - 28th IEEE European Test Symposium, May 2023, Venise, Italy. ⟨10.1109/ETS56758.2023.10174107⟩
Communication dans un congrès hal-04164663v1
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Binary ReRAM-based BNN first-layer implementation

Mona Ezzadeen , Atreya Majumdar , Sigrid Thomas , Jean-Philippe Noël , Bastien Giraud
2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), Apr 2023, Antwerp, Belgium. pp.1-6, ⟨10.23919/DATE56975.2023.10137057⟩
Communication dans un congrès hal-04270562v1
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Analysis of Read Port Short Defects in an 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noel , Arnaud Virazel
16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Communication dans un congrès lirmm-03990078v1
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A near-instantaneous and non-invasive erasure design technique to protect sensitive data stored in secure SRAMs

Jean-Philippe Noel , Manuel Pezzin , Jean-Frédéric Christmann , Lorenzo Ciampolini , Mikael Le Coadou
ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Sep 2021, Grenoble, France. pp. 455-458, ⟨10.1109/ESSCIRC53450.2021.9567885⟩
Communication dans un congrès cea-03605067v1
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Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing

J.-P Noel , Valentin Egloff , M. Kooli , R. Gauchi , J.-M. Portal
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), Mar 2020, Grenoble, France. pp.1187-1192, ⟨10.23919/DATE48585.2020.9116506⟩
Communication dans un congrès cea-02889406v1
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Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization

Roman Gauchi , Valentin Egloff , Maha Kooli , Jean-Philippe Noel , Bastien Giraud
ISLPED 2020: ACM/IEEE International Symposium on Low Power Electronics and Design, Aug 2020, Boston, MA, United States. pp.121-126, ⟨10.1145/3370748.3406550⟩
Communication dans un congrès cea-02963719v1
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Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture

R Gauchi , M Kooli , P Vivet , J.-P Noel , E. Beigné
IFIP/IEEE International Conference on Very Large Scale Integration and System-on-Chip (VLSI-SoC), Oct 2019, Cuzco, Peru
Communication dans un congrès cea-02399937v1
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Prospects for energy-efficient edge computing with integrated HfO 2-based ferroelectric devices

Ian O'Connor , Mayeul Cantan , Cedric Marchand , Bertrand Vilquin , Bastien Giraud
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC), Oct 2018, Verona, Italy. ⟨10.1109/VLSI-SoC.2018.8644809⟩
Communication dans un congrès hal-01916992v1
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Smart Instruction Codes for In-Memory Computing Architectures Compatible with Standard SRAM Interfaces

Maha Kooli , Henri-Pierre Charles , Clément Touzet , Bastien Giraud , Jean-Philippe Noel
Design, Automation and Test in Europe, Mar 2018, Dresde, Germany
Communication dans un congrès cea-01757656v1
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Software Platform Dedicated for In-Memory Computing Circuit Evaluation

Maha Kooli , Henri-Pierre Charles , Clément Touzet , Bastien Giraud , Jean-Philippe Noel
RSP'17 (Rapid System Prototyping), Oct 2017, Séoul, South Korea. ⟨10.1145/3130265.3130322⟩
Communication dans un congrès cea-01625320v1
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DRC 2 : Dynamically Reconfigurable Computing Circuit based on Memory Architecture

Kaya Can Akyel , Henri-Pierre Charles , Julien Mottin , Bastien Giraud , Suraci Grégory
IEEE International Conference on Rebooting Computing, Oct 2016, San Diego, France
Communication dans un congrès cea-01376554v1

Capacitor based SneakPath compensation circuit for transistor-less ReRAM architectures

Alexandre Levisse , Bastien Giraud , Jean-Philippe Noel , Mathieu Moreau , Jean-Michel Portal
Proceedings of the 2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Jul 2016, Beijing, China. pp.7-12, ⟨10.1145/2950067.2950073⟩
Communication dans un congrès hal-01435118v1
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SneakPath compensation circuit for programming and read operations in RRAM-based CrossPoint architectures

Alexandre Levisse , Bastien Giraud , Jean-Philippe Noel , Mathieu Moreau , Jean-Michel Portal
2015 15th Non-Volatile Memory Technology Symposium (NVMTS), Oct 2015, Beijing, China. ⟨10.1109/NVMTS.2015.7457426⟩
Communication dans un congrès hal-01745689v1