
Julie Dumas
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Publications
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Towards integration of a dedicated memory controller and its instruction set to improve performance of systems containing computational SRAMJournal of Low Power Electronics and Applications, 2022, 12 (1), pp.18. ⟨10.3390/jlpea12010018⟩
Article dans une revue
cea-04132511
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Dynamic Compilation for Transprecision Applications on Heterogeneous PlatformJournal of Low Power Electronics and Applications, 2021, 11 (3), https://doi.org/10.3390/jlpea11030028. ⟨10.3390/jlpea11030028⟩
Article dans une revue
cea-03313560
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Fast Instruction Cache Simulation is Trickier than You ThinkDroneSE and RAPIDO: System Engineering for constrained embedded systems (RAPIDO 2023), Jan 2023, Toulouse, France. pp.48-53, ⟨10.1145/3579170.3579261⟩
Communication dans un congrès
hal-04131264
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Instruction Set Design Methodology for In-Memory Computing through QEMU-based System Emulator32nd International Workshop on Rapid System Prototyping (RSP), Oct 2021, (En ligne), France
Communication dans un congrès
cea-03452244
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Instruction Set Design Methodology for In-Memory Computing through QEMU-based System Emulator32rd International Workshop on Rapid System Prototyping, Oct 2021, Rennes (Virtual Conference), France
Communication dans un congrès
hal-03449840
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Dynamic Coherent Cluster: A Scalable Sharing Set Management Approach29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP'2018), Jul 2018, Milano, Italy. pp.1-8
Communication dans un congrès
hal-01908799
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Trace-driven exploration of sharing set management strategies for cache coherence in manycores15th IEEE International New Circuits and Systems Conference (NEWCAS'17), Jun 2017, Strasbourg, France. pp.77-80
Communication dans un congrès
hal-01701046
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A Method for Fast Evaluation of Sharing Set Management Strategies in Cache Coherence Protocols30th International Conference on Architecture of Computing Systems (ARCS 2017), Apr 2017, Vienna, Austria. pp.111-123
Communication dans un congrès
hal-01523232
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Représentation dynamique de la liste des copies pour le passage à l'échelle des protocoles de cohérence de cacheArchitectures Matérielles [cs.AR]. Université Grenoble Alpes, 2017. Français. ⟨NNT : 2017GREAM093⟩
Thèse
tel-01879032
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