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Marcello TRAIOLA
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Documents
Présentation
I obtained my “laurea” degrees (BSc and MSc) in Computer Engineering - cum laude - both from the University of Naples “Federico II” , in Italy, in 2012 and 2016, respectively.
In 2019, I obtained my Ph.D. degree in Computer Engineering from the University of Montpellier , working at the Laboratory of Computer Science, Robotics and Microelectronics of Montpellier (LIRMM) , in France.
In 2013, I was at Fiat Chrysler Automobiles (now part of the group Stellantis ) Information Technology, Excellence and Methods S.p.A. (FCA ITEM), Pomigliano d’arco (Naples, Italy), as a software engineer intern.
From October 2019 to January 2020, I was in the United States for a four-months internship at the semiconductor company MediaTek USA Inc , as an R&D engineer.
From February 2020 to September 2021, I was with the Heterogeneous Systems Design team at the Lyon Institute of Nanotechnology (Institut des Nanotechnologies de Lyon, INL), in France, as a post-doctoral researcher.
Since October 2021, I am with the TARAN research group (ex CAIRN) at the Inria research center at Rennes University , in France, first as a post-doctoral researcher and then as Inria permanent researcher (CRCN), since October 2022
My fields of research concern mainly emerging computing paradigms, with a focus on hardware digital design, testing, and reliability. I am an IEEE member.
Publications
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Emerging Technologies: Challenges and Opportunities for Logic Synthesis2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Apr 2021, Vienna (virtual), Austria. pp.93-98, ⟨10.1109/DDECS52668.2021.9417062⟩
Communication dans un congrès
hal-03266914v1
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