
Matthieu Moy
Maître de conférences à l'UCBL/LIP
51
Documents
Identifiants chercheurs
Présentation
Publications
12
8
7
6
5
5
4
4
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
5
3
1
3
6
2
2
4
3
5
5
1
1
1
1
5
27
12
11
6
4
3
1
Publications
|
A Transistor Level Relational Semantics for Electrical Rule Checking by SMT SolvingDesign, Automation and Test in Europe Conference, Mar 2024, Valencia, Spain. pp.1-6, ⟨10.23919/DATE58400.2024.10546537⟩
Communication dans un congrès
hal-04527225
v1
|
|
Affine Multibanking for High-Level SynthesisIMPACT'22 - 12th International Workshop on Polyhedral Compilation Techniques, Jun 2022, Budapest, Hungary
Communication dans un congrès
hal-03862220
v1
|
|
Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo TheoryDATE 2023 - Design, Automation and Test in Europe Conference, Apr 2023, Anvers (Antwerpen), Belgium. pp.1-2, ⟨10.23919/DATE56975.2023.10137147⟩
Communication dans un congrès
hal-04007446
v1
|
|
Promise Plus: Flexible Synchronization for Parallel Computations on ArraysFSEN 2021 - 9th IPM International Conference on Fundamentals of Software Engineering, May 2021, Tehran, Iran. pp.1-7, ⟨10.1007/978-3-030-89247-0_13⟩
Communication dans un congrès
hal-03143269
v1
|
|
S4BXI: the MPI-ready Portals 4 SimulatorMASCOTS 2021 - 29th IEEE International Symposium on the Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, Nov 2021, Houston, United States. pp.1-8, ⟨10.1109/MASCOTS53633.2021.9614285⟩
Communication dans un congrès
hal-03366573
v1
|
|
Simulation of the Portals 4 protocol, and case study on the BXI interconnectHPCS 2020 - International Conference on High Performance Computing & Simulation, Dec 2020, Barcelona, Spain. pp.1-8
Communication dans un congrès
hal-02972297
v1
|
|
Scaling Up the Memory Interference Analysis for Hard Real-Time Many-Core SystemsDATE 2020 - Design, Automation and Test in Europe Conference, Mar 2020, Grenoble, France. pp.1-4
Communication dans un congrès
hal-02431273
v1
|
|
Standard-compliant parallel systemC simulation of loosely-timed Transaction Level ModelsASP-DAC 2020 - 25th Asia and South Pacific Design Automation Conference, Jan 2020, Beijing, China. pp.1-6, ⟨10.1109/ASP-DAC47756.2020.9045568⟩
Communication dans un congrès
hal-02416253
v1
|
|
Response Time Analysis of Dataflow Applications on a Many-Core Processor with Shared-Memory and Network-on-ChipRTNS 2019 - 27th International Conference on Real-Time Networks and Systems, Nov 2019, Toulouse, France. pp.61-69, ⟨10.1145/3356401.3356416⟩
Communication dans un congrès
hal-02320463
v1
|
|
Estimating the Impact of Architectural and Software Design Choices on Dynamic Allocation of Heterogeneous MemoriesRSP 2018 - 29th International Symposium on Rapid System Prototyping, Oct 2018, Turin, Italy. pp.1-7
Communication dans un congrès
hal-01891599
v1
|
|
Quels objets en NVRAM ? Placement en mémoires de travail hétérogènesCompas 2018 - Conférence d’informatique en Parallélisme, Architecture et Système, Jul 2018, Toulouse, France. pp.1-8
Communication dans un congrès
hal-01891398
v1
|
|
Parallel Code Generation of Synchronous Programs for a Many-core ArchitectureDATE 2018 - Design, Automation and Test in Europe, Mar 2018, Dresden, Germany. pp.1139-1142, ⟨10.23919/DATE.2018.8342182⟩
Communication dans un congrès
hal-01667594
v2
|
|
Response Time Analysis of Synchronous Data Flow Programs on a Many-Core ProcessorRTNS, Nov 2016, Brest, France
Communication dans un congrès
hal-01406145
v1
|
|
SycView: Visualize and Profile SystemC Simulations3rd Workshop on Design Automation for Understanding Hardware Designs, DUHDe 2016, Mar 2016, Dresden, Germany
Communication dans un congrès
hal-01295282
v1
|
|
Efficient Execution of Dependent Tasks on Many-Core ProcessorsRTSOPS, Jul 2016, Toulouse, France
Communication dans un congrès
hal-01406057
v1
|
|
WCET analysis in shared resources real-time systems with TDMA busesRTNS 2015, Nov 2015, Lille, France. ⟨10.1145/2834848.2834871⟩
Communication dans un congrès
hal-01243244
v1
|
|
Challenges for the Parallelization of Loosely Timed SystemC ProgramsIEEE International Symposium on Rapid System Prototyping, Oct 2015, Amsterdam, Netherlands
Communication dans un congrès
hal-01214891
v1
|
|
Co-Simulation of Functional SystemC TLM Models with Power/Thermal SolversVirtual Prototyping of Parallel and Embedded Systems (VIPES), May 2013, Boston, United States
Communication dans un congrès
hal-00807354
v1
|
|
Fast and Accurate TLM Simulations using Temporal Decoupling for FIFO-based CommunicationsDesign, Automation and Test in Europe (DATE), Mar 2013, Grenoble, France. pp.1185
Communication dans un congrès
hal-00807046
v1
|
|
Parallel Programming with SystemC for Loosely Timed Models: A Non-Intrusive ApproachDATE, Mar 2013, Grenoble, France. pp.9
Communication dans un congrès
hal-00761047
v1
|
|
System-Level Modeling of Energy in TLM for Early Validation of Power and Thermal ManagementDesign, Automation, and Test in Europe (DATE), Mar 2013, Grenoble, France. pp.1609
Communication dans un congrès
hal-00807048
v1
|
|
PAGAI: a path sensitive static analyzerTools for Automatic Program AnalysiS (TAPAS 2012), Sep 2012, Deauville, France. pp.3, ⟨10.1016/j.entcs.2012.11.003⟩
Communication dans un congrès
hal-00718438
v1
|
Co-Simulation of a SystemC TLM Virtual Platform with a Power Simulator at the Architectural Level: Case of a Set-Top BoxDAC, Jun 2012, San Francisco, United States. pp.SESSION 10U: USER TRACK
Communication dans un congrès
hal-00716051
v1
|
|
|
Succinct Representations for Abstract InterpretationStatic analysis symposium (SAS), Sep 2012, Deauville, France. pp.283-299, ⟨10.1007/978-3-642-33125-1_20⟩
Communication dans un congrès
hal-00709833
v1
|
|
Faithfulness Considerations for Virtual Prototyping of Systems-on-Chip3rd Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools, Jan 2011, Greece
Communication dans un congrès
hal-00559986
v1
|
|
Causality closure for a new class of curves in real-time calculusProceedings of the 1st International Workshop on Worst-Case Traversal Time, Nov 2011, Vienna, Austria. pp.3--10, ⟨10.1145/2071589.2071590⟩
Communication dans un congrès
hal-00648628
v1
|
|
Efficient Encoding of SystemC/TLM in PromelaDATICS-IMECS, Mar 2011, Hong Kong SAR China
Communication dans un congrès
hal-00557515
v1
|
|
Modeling of Time in Discrete-Event Simulation of Systems-on-ChipMEMOCODE, Jul 2011, Cambridge, United Kingdom
Communication dans un congrès
hal-00595637
v1
|
|
Efficient and Playful Tools to Teach Unix to New StudentsITiCSE, Jun 2011, Darmstadt, Germany. pp.0
Communication dans un congrès
hal-00574783
v1
|
|
Arrival Curves for Real-Time Calculus: the Causality Problem and its SolutionsTools and Algorithms for the Construction and Analysis of Systems, Mar 2010, Paphos, Cyprus. pp.358
Communication dans un congrès
hal-00442257
v1
|
|
Performance Evaluation of Components Using a Granularity-based Interface Between Real-Time Calculus and Timed Automata8th Workshop on Quantitative Aspects of Programming Languages, Mar 2010, Paphos, Cyprus. pp.166, ⟨10.4204/EPTCS⟩
Communication dans un congrès
hal-00450292
v1
|
|
PinaVM: a SystemC Front-End Based on an Executable Intermediate RepresentationInternational Conference on Embedded Software, Oct 2010, Scottsdale, United States. pp.79
Communication dans un congrès
hal-00495874
v1
|
|
SystemC/TLM Semantics for Heterogeneous System-on-Chip Validation2008 Joint IEEE-NEWCAS and TAISA Conference, Jun 2008, Montréal, Canada
Communication dans un congrès
hal-00311011
v1
|
|
Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-ChipFormal Methods in Computer Aided Design (FMCAD'06), Nov 2006, San Jose, United States. pp.171-178, ⟨10.1109/FMCAD.2006.10⟩
Communication dans un congrès
hal-00311006
v1
|
|
LusSy: A toolbox for the analysis of systems-on-a-chip at the transactional levelInternational Conference on Application of Concurrency to System Design (ACSD), Jun 2005, Saint-Malo, France. pp.26 - 35, ⟨10.1109/ACSD.2005.23⟩
Communication dans un congrès
hal-00198681
v1
|
|
Pinapa: An extraction tool for systemc descriptions of systems-on-a-chipACM international conference on Embedded software, Jun 2005, New-York, United States. pp.317 - 324, ⟨10.1145/1086228.1086286⟩
Communication dans un congrès
hal-00198669
v1
|
Chapter "Formal VerificationFrank Ghenassia. Transaction-Level Modeling with SystemC. TLM Concepts and Applications for Embedded Systems, Springer, 15 p., 2005, ISBN: 0-387-26232-6
Chapitre d'ouvrage
hal-00311014
v1
|
|
A Theoretical and Experimental Review of SystemC Front-ends2010
Pré-publication, Document de travail
hal-00495886
v1
|
|
ac2lus: Bringing SMT-solving and Abstract Interpretation Techniques to Real-Time Calculus through the Synchronous Language Lustre2010
Pré-publication, Document de travail
hal-00475745
v1
|
|
A SystemC/TLM semantics in Promela and its Possible Applications2007
Pré-publication, Document de travail
hal-00294143
v1
|
|
Affine Multibanking for High-Level Synthesis[Research Report] RR-9440, Inria - Research Centre Grenoble – Rhône-Alpes. 2021
Rapport
(rapport de recherche)
hal-03481328
v1
|
|
Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form[Research Report] RR-6976, INRIA. 2009, pp.16
Rapport
(rapport de recherche)
inria-00400272
v1
|
|
Techniques and Tools for the Verification of Systems-on-a-Chip at the Transaction LevelComputer Science [cs]. Institut National Polytechnique de Grenoble - INPG, 2005. English. ⟨NNT : ⟩
Thèse
tel-00311033
v1
|
|
Modélisation à haut niveau d'abstraction pour les systèmes embarquésSystèmes embarqués. Université de Grenoble, 2014
HDR
tel-01054555
v1
|
Chargement...
Chargement...