mr

michel renovell

189
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Publications

Image document

Cost-Effective Analytical Models of Resistive Opens Defects in FinFET Technology

Gustavo Aguirre , Freddy Forero , Victor Champac , Michel Renovell , Florence Azaïs et al.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, In press, ⟨10.1109/TVLSI.2024.3479068⟩
Article dans une revue lirmm-04796404 v1
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Multilinear Regression Analysis between Local Bioimpedance Spectroscopy and Fish Morphological Parameters

Vincent Kerzérho , Florence Azaïs , Serge Bernard , Sylvain Bonhommeau , Blandine Brisset et al.
Fishes, 2023, 8 (2), pp.88. ⟨10.3390/fishes8020088⟩
Article dans une revue lirmm-03970313 v1
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Study differentiating fish oocyte developmental stages using bioimpedance spectroscopy

Eloïse Détrez , Vincent Kerzérho , Mohamed-Moez Belhaj , Alain Vergnet , Hugues de Verdal et al.
Aquaculture, 2022, 547, pp.#737396. ⟨10.1016/j.aquaculture.2021.737396⟩
Article dans une revue lirmm-03334895 v1

B-open Defect: A Novel Defect Model in FinFET Technology

Freddy Forero , Victor Champac , Michel Renovell
ACM Journal on Emerging Technologies in Computing Systems, 2022, 19 (1), pp.1-19. ⟨10.1145/3564244⟩
Article dans une revue lirmm-04687231 v1

Modeling and Detectability of Full Open Gate Defects in FinFET Technology

Freddy Forero , Hector Villacorta , Michel Renovell , Victor Champac
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2019, 27 (9), pp.2180-2190. ⟨10.1109/TVLSI.2019.2918768⟩
Article dans une revue lirmm-04798134 v1

Analytical Models for the Evaluation of Resistive Short Defect Detectability in Presence of Process Variations: Application to 28nm Bulk and FDSOI Technologies

Amit Karel , Florence Azaïs , Mariane Comte , Jean-Marc J.-M. Galliere , Michel Renovell
Journal of Electronic Testing: : Theory and Applications, 2019, 35 (1), pp.59-75. ⟨10.1007/s10836-019-05776-1⟩
Article dans une revue lirmm-02075690 v1

Detectability Challenges of Bridge Defects in FinFET Based Logic Cells

Freddy Forero , Jean-Marc J.-M. Galliere , Michel Renovell , Victor Champac
Journal of Electronic Testing: : Theory and Applications, 2018, 34 (2), pp.123-134. ⟨10.1007/s10836-018-5714-0⟩
Article dans une revue lirmm-03109355 v1

Influence of Body-Biasing, Supply Voltage, and Temperature on the Detection of Resistive Short Defects in FDSOI Technology

Amit Karel , Mariane Comte , Jean-Marc J.-M. Galliere , Florence Azaïs , Michel Renovell
IEEE Transactions on Nanotechnology, 2017, 16 (3), pp.417-430. ⟨10.1109/TNANO.2017.2664895⟩
Article dans une revue hal-01709588 v1

Resistive Bridging Defect Detection in Bulk, FDSOI and FinFET Technologies

Amit Karel , Mariane Comte , Jean-Marc J.-M. Galliere , Florence Azaïs , Michel Renovell
Journal of Electronic Testing: : Theory and Applications, 2017, 33 (4), pp.515-527. ⟨10.1007/s10836-017-5674-9⟩
Article dans une revue hal-01709587 v1

Efficiency evaluation of analog/RF alternate test: Comparative study of indirect measurement selection strategies

Syhem Larguech , Florence Azaïs , Serge Bernard , Mariane Comte , Vincent Kerzérho et al.
Microelectronics Journal, 2015, 46 (11), pp.1091-1102. ⟨10.1016/j.mejo.2015.09.014⟩
Article dans une revue lirmm-01232890 v1

Testing for Gate Oxide Short Defects using the Detectability Interval Paradigm

Jean-Marc J.-M. Galliere , Florence Azaïs , Mariane Comte , Michel Renovell
Information Technology, 2014, 56 (4), pp.173-181. ⟨10.1515/itit-2013-1040⟩
Article dans une revue hal-01167054 v1
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Enhancing Confidence in Indirect Analog/RF Testing against the Lack of Correlation between Regular Parameters and Indirect Measurements

Haithem Ayari , Florence Azaïs , Serge Bernard , Mariane Comte , Vincent Kerzérho et al.
Microelectronics Journal, 2014, 45 (3), pp.336-344. ⟨10.1016/j.mejo.2013.12.006⟩
Article dans une revue lirmm-00936443 v1
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A novel implementation of the histogram-based technique for measurement of INL of LUT-based correction of ADC

Vincent Kerzérho , Serge Bernard , Florence Azaïs , Mariane Comte , Olivier Potin et al.
Microelectronics Journal, 2013, 44 (9), pp.840-843. ⟨10.1016/j.mejo.2013.06.009⟩
Article dans une revue lirmm-00875985 v1
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Digital Test Method for Embedded Converters with Unknown-Phase Harmonics

Vincent Kerzérho , Mariane Comte , Florence Azaïs , Philippe Cauvet , Serge Bernard et al.
Journal of Electronic Testing: : Theory and Applications, 2011, 27 (3), pp.335-350. ⟨10.1007/s10836-011-5194-y⟩
Article dans une revue istex lirmm-00609243 v1

On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing

Piet Engelke , Ilia Polian , Michel Renovell , Sandip Kundu , Bharath Seshadri et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2008, 27 (2), pp.327-338. ⟨10.1109/TCAD.2007.913382⟩
Article dans une revue lirmm-00375007 v1
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ADC Production Test Technique Using Low-Resolution Arbitrary Waveform Generator

Vincent Kerzérho , Philippe Cauvet , Serge Bernard , Florence Azaïs , Michel Renovell et al.
VLSI Design, 2008, 2008 (#482159), ⟨10.1155/2008/482159⟩
Article dans une revue lirmm-00346722 v1
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Fully Digital Test Solution for a Set of ADCs and DACs embedded in a SiP or SoC

Vincent Kerzérho , Philippe Cauvet , Serge Bernard , Florence Azaïs , Mariane Comte et al.
IET Computers & Digital Techniques, 2007, 1 (3), pp.146-153. ⟨10.1049/iet-cdt:20060136⟩
Article dans une revue lirmm-00195172 v1

An Efficient BIST Architecture for Delay Faults in the Logic Cells of Symmetrical SRAM-Based FPGAs

Patrick Girard , Serge Pravossoudovitch , Olivier Héron , Michel Renovell
Journal of Electronic Testing: : Theory and Applications, 2006, 22 (2), pp.161-172. ⟨10.1007/s10836-005-4631-1⟩
Article dans une revue istex lirmm-00135456 v1

Automatic Test Pattern Generation for Resistive Bridging Faults

Piet Engelke , Michel Renovell , Bernd Becker
Journal of Electronic Testing: : Theory and Applications, 2006, 22 (1), pp.61-69. ⟨10.1007/s10836-006-6392-x⟩
Article dans une revue istex lirmm-00375014 v1

Simulating Resistive-Bridging and Stuck-At Faults

Piet Engelke , Ilia Polian , Michel Renovell , Bernd Becker
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2006, 25 (10), pp.2181-2192. ⟨10.1109/TCAD.2006.871626⟩
Article dans une revue lirmm-00375012 v1
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A Novel DFT Technique to Test a Complete Set of ADC's and DAC's Embedded in a Complex SiP

Serge Bernard , Vincent Kerzérho , Philippe Cauvet , Florence Azaïs , Mariane Comte et al.
IEEE Design & Test of Computers, 2006, 23 (3), pp.237-243. ⟨10.1109/MDT.2006.59⟩
Article dans une revue lirmm-00115131 v1

A Strategy for Optimal Test Point Insertion in Analog Cascaded Filters

Florence Azaïs , Marcelo Lubaszewski , Pascal Nouet , Michel Renovell
Journal of Electronic Testing: : Theory and Applications, 2005, 21 (1), pp.9-16. ⟨10.1007/s10836-005-5283-x⟩
Article dans une revue istex lirmm-00105328 v1

Delay Fault Testing of Look-Up Tables in SRAM-Based FPGAs

Patrick Girard , Olivier Héron , Serge Pravossoudovitch , Michel Renovell
Journal of Electronic Testing: : Theory and Applications, 2005, 21 (1), pp.43-55. ⟨10.1007/s10836-005-5286-7⟩
Article dans une revue istex lirmm-00105329 v1

Built-In Self-Test of Global Interconnects of Field Programmable Analog Arrays

Antonio Andrade , Gustavo Vieira , Tiago Balen , Marcelo Lubaszewski , Florence Azaïs et al.
Microelectronics Journal, 2005, 36 (12), pp.1112-1123. ⟨10.1016/j.mejo.2005.06.001⟩
Article dans une revue istex lirmm-00367974 v1

Delay Testing Viability of Gate Oxide Short Defect

Jean-Marc J.-M. Galliere , Michel Renovell , Florence Azaïs , Yves Bertrand
Journal of Computer Science and Technology, 2005, 20 (2), pp.195-200. ⟨10.1007/s11390-005-0195-x⟩
Article dans une revue istex lirmm-00105323 v1

Modeling Feedback Bridging Faults with Non-Zero Resistance

I. Polian , P. Engelke , Michel Renovell , P. Becker
Journal of Electronic Testing: : Theory and Applications, 2005, 21 (1), pp.57-69. ⟨10.1007/s10836-005-5287-6⟩
Article dans une revue istex lirmm-00105327 v1

Viability of a Delay Testing of Gate Oxide Short Transistors

Jean-Marc J.-M. Galliere , Michel Renovell , Florence Azaïs , Yves Bertrand
Journal of Computer Science and Technology, 2005, 20 (2), pp.6. ⟨10.1007/s11390-005-0195-x⟩
Article dans une revue istex lirmm-00370370 v1

Efficiency of Optimized Dynamic Test Flows for ADCs: Sensitivity to Specifications

Florence Azaïs , Serge Bernard , Mariane Comte , Yves Bertrand , Michel Renovell
Journal of Electronic Testing: : Theory and Applications, 2005, 21 (3), pp.291-298. ⟨10.1007/s10836-005-6358-4⟩
Article dans une revue istex lirmm-00105322 v1

Applying the Oscillation Test Strategy to FPAA's Configurable Analog Blocks

Tiago R. Balen , Antonio Andrade Jr. , Florence Azaïs , Marcelo Lubaszewski , Michel Renovell
Journal of Electronic Testing: : Theory and Applications, 2005, 21 (2), pp.135-146. ⟨10.1007/s10836-005-6143-4⟩
Article dans une revue istex lirmm-00105334 v1

Efficiency of Spectral-Based ADC Test Flows to Detect Static Errors

Mariane Comte , Florence Azaïs , Yves Bertrand , Michel Renovell
Journal of Electronic Testing: : Theory and Applications, 2004, Vol. 20 n°3, pp. 257-267. ⟨10.1023/B:JETT.0000029459.74815.56⟩
Article dans une revue istex hal-00004514 v1
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Correlation Between Static and Dynamic Parameters of A-to-D Converters: In the View of a Unique Test Procedure

Florence Azaïs , Serge Bernard , Yves Bertrand , Mariane Comte , Michel Renovell
Journal of Electronic Testing: : Theory and Applications, 2004, 20 (4), pp.375-387. ⟨10.1023/B:JETT.0000039605.02565.ef⟩
Article dans une revue lirmm-00108545 v1

A Compact DC Model of Gate Oxide Short Defect

Rachid Bouchakour , Jean-Michel Portal , Jean-Marc J.-M. Galliere , Florence Azaïs , Yves Bertrand et al.
Microelectronic Engineering, 2004, 72 (1-4), pp.140-148. ⟨10.1016/j.mee.2003.12.051⟩
Article dans une revue istex lirmm-00108564 v1

Modeling the Random Parameter Effects in a Non-Split Model of Gate Oxide Short

Michel Renovell , Jean-Marc J.-M. Galliere , Florence Azaïs , Yves Bertrand
Journal of Electronic Testing: : Theory and Applications, 2003, 19 (4), pp. 377-386. ⟨10.1023/A:1024683708105⟩
Article dans une revue istex lirmm-00269754 v1

On-Chip Generation of Ramp and Triangle-Wave Stimuli for ADC BIST

Serge Bernard , Florence Azaïs , Yves Bertrand , Michel Renovell
Journal of Electronic Testing: : Theory and Applications, 2003, 19 (4), pp. 469-479. ⟨10.1023/A:1024652328578⟩
Article dans une revue istex lirmm-00269602 v1

Extending IEEE Std. 1149.4 analog boundary modules to enhance mixed-signal test

Uroš Kač , Franc Novak , Florence Azaïs , Pascal Nouet , Michel Renovell
IEEE Design & Test, 2003, 20 (2), pp.32-39. ⟨10.1109/MDT.2003.1188260⟩
Article dans une revue lirmm-00269600 v1

An All-Digital DFT Scheme for Testing Catastrophic Faults in PLLs

Florence Azaïs , Yves Bertrand , Michel Renovell , André Ivanov , Sassan Tabatabaei
IEEE Design & Test, 2003, 20 (1), pp.60-67. ⟨10.1109/MDT.2003.1173054⟩
Article dans une revue lirmm-00269822 v1

A-to-D Converter Static Error Detection from Dynamic Parameter Measurements

Florence Azaïs , Serge Bernard , Yves Bertrand , Mariane Comte , Michel Renovell
Microelectronics Journal, 2003, 34 (10), pp. 945-953. ⟨10.1016/S0026-2692(03)00161-7⟩
Article dans une revue istex lirmm-00269601 v1

Analog Built-In Saw-Tooth Generator for ADC Histogram Test

Florence Azaïs , Serge Bernard , Yves Bertrand , Michel Renovell
Microelectronics Journal, 2002, 33 (10), pp.781-789. ⟨10.1016/S0026-2692(02)00090-3⟩
Article dans une revue istex lirmm-00268587 v1

Improving Defect Detection in Static-Voltage Testing

Michel Renovell , Florence Azaïs , Yves Bertrand
IEEE Design & Test, 2002, 17 (6), pp.83-89. ⟨10.1109/MDT.2002.1047747⟩
Article dans une revue lirmm-00268605 v1

Dead-reckoning for marine animals: trade-offs between estimation accuracy and power consumption

Pierre Gogendeau , Sylvain Bonhommeau , Hassen Fourati , Michel Renovell , Fabien Soulier et al.
BLS7 2021 - 7th International Bio-Logging Science Symposium, Oct 2021, Honolulu, United States
Communication dans un congrès hal-03392214 v1

Impact of process variations on the detectability of resistive short defects: Comparative analysis between 28nm Bulk and FDSOI technologies

Amit Karel , Florence Azaïs , Mariane Comte , Jean-Marc J.-M. Galliere , Michel Renovell
LATS 2018 - 19th IEEE Latin American Test Symposium, Mar 2018, Sao Paulo, Brazil. ⟨10.1109/LATW.2018.8349696⟩
Communication dans un congrès lirmm-02064921 v1

Detection of resistive open and short defects in FDSOI under delay-based test: Optimal VDD and body biasing conditions

Amit Karel , Florence Azaïs , Mariane Comte , Jean-Marc J.-M. Galliere , Michel Renovell et al.
ETS: European Test Symposium, May 2017, Limassol, Cyprus. ⟨10.1109/ETS.2017.7968208⟩
Communication dans un congrès hal-01709615 v1

Analysis of short defects in FinFET based logic cells

Freddy Forero , Jean-Marc J.-M. Galliere , Michel Renovell , Víctor H. Champac
LATS 2017 - 18th IEEE Latin American Test Symposium, Mar 2017, Bogota, Colombia. ⟨10.1109/LATW.2017.7906755⟩
Communication dans un congrès hal-01709620 v1

Comprehensive Study for Detection of Weak Resistive Open and Short Defects in FDSOI Technology

Amit Karel , Florence Azaïs , Mariane Comte , Jean-Marc J.-M. Galliere , Michel Renovell et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2017, Bochum, Germany. pp.320-325, ⟨10.1109/ISVLSI.2017.63⟩
Communication dans un congrès hal-01709614 v1

Mitigating Read & Write Errors in STT-MRAM Memories under DVS

Elena Ioana Vatajelu , Rosa Rodríguez-Montañés , Michel Renovell , Joan Figueras
ETS: European Test Symposium, May 2017, Limassol, Cyprus. ⟨10.1109/ETS.2017.7968209⟩
Communication dans un congrès hal-01525720 v1

Mixed-level simulation tool for design optimization of electrical impedance spectroscopy systems

Achraf Lamlih , Vincent Kerzérho , Serge Bernard , Fabien Soulier , Mariane Comte et al.
IWIS: International Workshop on Impedance Spectroscopy, Sep 2016, Chemnitz, Germany
Communication dans un congrès lirmm-01457544 v1

Behavior and test of open-gate defects in FinFET based cells

Francisco Mesalles , Hector Villacorta , Michel Renovell , Víctor H. Champac
ETS: European Test Symposium, May 2016, Amsterdam, Netherlands. ⟨10.1109/ETS.2016.7519305⟩
Communication dans un congrès lirmm-01923016 v1

Comparative study of Bulk, FDSOI and FinFET technologies in presence of a resistive short defect

Amit Karel , Mariane Comte , Jean-Marc J.-M. Galliere , Florence Azaïs , Michel Renovell
LATS: Latin-American Test Symposium, Mar 2016, Foz do Iguacu, Brazil. pp.129-134, ⟨10.1109/LATW.2016.7483352⟩
Communication dans un congrès lirmm-01374300 v1

Impact of VT and Body-Biasing on Resistive short detection in 28nm UTBB FDSOI – LVT and RVT configurations

Amit Karel , Mariane Comte , Jean-Marc J.-M. Galliere , Florence Azaïs , Michel Renovell
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2016, Pittsburgh, PA, United States. pp.164-169, ⟨10.1109/ISVLSI.2016.102⟩
Communication dans un congrès lirmm-01374292 v1
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Power-aware voltage tuning for STT-MRAM reliability

Elena Ioana Vatajelu , Rosa Rodríguez-Montañés , Stefano Di Carlo , Marco Indaco , Michel Renovell et al.
ETS: European Test Symposium, May 2015, Cluj-Napoca, Romania. ⟨10.1109/ETS.2015.7138748⟩
Communication dans un congrès lirmm-01922971 v1

A framework for efficient implementation of analog/RF alternate test with model redundancy

Syhem Larguech , Florence Azaïs , Serge Bernard , Mariane Comte , Vincent Kerzérho et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.621-626, ⟨10.1109/ISVLSI.2015.30⟩
Communication dans un congrès lirmm-01233104 v1

A generic methodology for building efficient prediction models in the context of alternate testing

Syhem Larguech , Florence Azaïs , Serge Bernard , Mariane Comte , Vincent Kerzérho et al.
IMSTW: International Mixed-Signals Test Workshop, Jun 2015, Paris, France. ⟨10.1109/IMS3TW.2015.7177873⟩
Communication dans un congrès lirmm-01233150 v1

Toward adaptation of ADCs to operating conditions through on-chip correction

Vincent Kerzérho , Ludovic Guillaume-Sage , Florence Azaïs , Mariane Comte , Michel Renovell et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.634-639, ⟨10.1109/ISVLSI.2015.62⟩
Communication dans un congrès lirmm-01233117 v1

Study of adaptive tuning strategies for Near Field Communication (NFC) transmitter module

Mouhamadou Dieng , Florence Azaïs , Mariane Comte , Serge Bernard , Vincent Kerzérho et al.
IMS3TW: International Mixed-Signals, Sensors, and Systems Test Workshop, Sep 2014, Porto ALegre, Brazil. ⟨10.1109/IMS3TW.2014.6997401⟩
Communication dans un congrès lirmm-01119365 v1

Solutions for the self-adaptation of communicating systems in operation

Martin Andraud , Anthony Deluthault , Mouhamadou Dieng , Florence Azaïs , Serge Bernard et al.
IOLTS: International On-line Test Symposium, Jul 2014, Platja d’Aro, Spain. pp.234-239, ⟨10.1109/IOLTS.2014.6873705⟩
Communication dans un congrès hal-01118068 v1
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New implementions of predictive alternate analog/RF test with augmented model redundancy

Haithem Ayari , Florence Azaïs , Serge Bernard , Mariane Comte , Vincent Kerzérho et al.
DATE 2014 - 17th Design, Automation and Test in Europe Conference and Exhibition, Mar 2014, Dresden, Germany. ⟨10.7873/DATE2014.144⟩
Communication dans un congrès lirmm-00994714 v1

Self-Adaptive NFC Systems

Vincent Kerzérho , Florence Azaïs , Mouhamadou Dieng , Mariane Comte , Serge Bernard et al.
IOLTS: International On-Line Testing Symposium, Jul 2014, Platja d'Aro, Spain
Communication dans un congrès lirmm-01084355 v1

Investigations on alternate analog/RF test with model redundancy

Haithem Ayari , Florence Azaïs , Serge Bernard , Vincent Kerzérho , Syhem Larguech et al.
STEM Workshop, May 2014, Paderborn, Germany
Communication dans un congrès lirmm-01119374 v1

Evaluation of indirect measurement selection strategies in the context of analog/RF alternate testing

Syhem Larguech , Florence Azaïs , Serge Bernard , Vincent Kerzérho , Mariane Comte et al.
LATW: Latin American Test Workshop, Mar 2014, Fortaleza, Brazil. ⟨10.1109/LATW.2014.6841930⟩
Communication dans un congrès lirmm-01119361 v1
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MIRID: Mixed-Mode IR-Drop Induced Delay Simulator

Jie Jiang , Marina Aparicio Rodriguez , Mariane Comte , Florence Azaïs , Michel Renovell et al.
ATS: Asian Test Symposium, Nov 2013, Jiaosi Township, Taiwan. pp.177-182, ⟨10.1109/ATS.2013.41⟩
Communication dans un congrès lirmm-00932357 v1
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Accurate and Efficient Analytical Electrical Model of Antenna for NFC Applications

Mouhamadou Dieng , Mariane Comte , Serge Bernard , Vincent Kerzérho , Florence Azaïs et al.
NEWCAS: New Circuits and Systems, Jun 2013, Paris, France. pp.137-141, ⟨10.1109/NEWCAS.2013.6573657⟩
Communication dans un congrès lirmm-00839190 v1

A Comparative Analysis of Indirect Measurement Selection Strategies for Analog/RF Alternate Testing

Syhem Larguech , Florence Azaïs , Serge Bernard , Vincent Kerzérho , Mariane Comte et al.
3rd IEEE International Workshop on Test and Validation of High Speed Analog Circuits, Sep 2013, Anaheim, CA, United States
Communication dans un congrès lirmm-00985422 v1

Pre-characterization Procedure for a Mixed Mode Simulation of IR-Drop Induced Delays

Marina Aparicio Rodriguez , Mariane Comte , Florence Azaïs , Michel Renovell , Jie Jiang et al.
LATW: Latin American Test Workshop, Apr 2013, Cordoba, Argentina. ⟨10.1109/LATW.2013.6562657⟩
Communication dans un congrès lirmm-00820067 v1
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An IR-Drop Simulation Principle Oriented to Delay Testing

Marina Aparicio Rodriguez , Mariane Comte , Florence Azaïs , Yves Bertrand , Michel Renovell et al.
DCIS 2012 - 27th Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France. pp.404-409
Communication dans un congrès lirmm-00804254 v1

Smart selection of indirect parameters for DC-based alternate RF IC testing

Haithem Ayari , Florence Azaïs , Serge Bernard , Mariane Comte , Michel Renovell et al.
VTS: VLSI Test Symposium, Apr 2012, Hyatt Maui, HI, United States. pp.19-24, ⟨10.1109/VTS.2012.6231074⟩
Communication dans un congrès lirmm-00803453 v1

Making predictive analog/RF alternate test strategy independent of training set size

Haithem Ayari , Florence Azaïs , Serge Bernard , Mariane Comte , Vincent Kerzérho et al.
ITC'2012: International Test Conference, Nov 2012, Anaheim, CA, United States. pp.9, ⟨10.1109/TEST.2012.6401560⟩
Communication dans un congrès lirmm-00803564 v1

On the use of redundancy to reduce prediction error in alternate analog/RF test

Haithem Ayari , Florence Azaïs , Serge Bernard , Mariane Comte , Vincent Kerzérho et al.
IMS3TW: International Mixed-Signals, Sensors, and Systems Test Workshop, May 2012, Taipei, Taiwan. pp.34-39, ⟨10.1109/IMS3TW.2012.17⟩
Communication dans un congrès lirmm-00803556 v1
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ANC-Based Method for Testing Converters with Random-Phase Harmonics

Vincent Kerzérho , Florence Azaïs , Mariane Comte , Philippe Cauvet , Serge Bernard et al.
IMS3TW'10: 16th International Mixed-Signals, Sensors and Systems Test Workshop, La Grande Motte, Montpellier, France. pp.N/A
Communication dans un congrès lirmm-00494578 v1
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Adaptive LUT-Based System for In Situ ADC Auto-correction

Serge Bernard , Florence Azaïs , Mariane Comte , Olivier Potin , Vincent Kerzérho et al.
IMS3TW'10: 16th IEEE International Mixed-Signals, Sensors and Systems Test Workshop, La Grande Motte, Montpellier, France. pp.N/A
Communication dans un congrès lirmm-00494424 v1

LH-BIST for Digital Correction of ADC Offset

Serge Bernard , Florence Azaïs , Mariane Comte , Yves Bertrand , Michel Renovell
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, 2009, Cairo, Egypt. pp.199-203
Communication dans un congrès lirmm-00375659 v1

Influence of Gate Oxide Short Defects on the Stability of Minimal Sized SRAM Core-Cell by Applying Non-Split Models

Jean-Marc J.-M. Galliere , Florence Azaïs , Michel Renovell , Luigi Dilillo
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, 2009, Cairo, Egypt. pp.225-229
Communication dans un congrès lirmm-00370798 v1

An Analysis of the Timing Behavior of CMOS Digital Blocks under Simultaneous Switching Noise Conditions

Florence Azaïs , Yves Bertrand , Michel Renovell
DDECS'09: IEEE Design and Diagnostics of Electronic Circuits and Systems, Apr 2009, Liberec, Czech Republic. pp.158-163
Communication dans un congrès lirmm-00386906 v1

Deriving an Electrical Model for Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects

Nicolas Houarche , Alejandro Czutro , Mariane Comte , Piet Engelke , Ilia Polian et al.
LATW'09: 10th Latin-American Test Workshop, Mar 2009, Armaçao dos Buzios, Brazil, pp.N/A
Communication dans un congrès lirmm-00367708 v1
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An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects

Nicolas Houarche , Mariane Comte , Michel Renovell , Alejandro Czutro , Piet Engelke et al.
VTS'09: 27th VLSI Test Symposium, May 2009, Santa Cruz, Californie, United States. pp.21-26, ⟨10.1109/VTS.2009.57⟩
Communication dans un congrès lirmm-00374941 v1

Analyzing the Impact of Simultaneous Switching Noise on the Timing Behavior of CMOS Digital Blocks

Florence Azaïs , Yves Bertrand , Michel Renovell
LATW'09: 10th Latin-American Test Workshop, Mar 2009, Armaçao dos Buzios, Brazil, pp.N/A
Communication dans un congrès lirmm-00367718 v1
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A Multi-Converter DFT Technique for Complex SIP: Concepts and Validation

Vincent Kerzérho , Philippe Cauvet , Serge Bernard , Florence Azaïs , Mariane Comte et al.
ECCTD: European Conference on Circuit Theory and Design, Aug 2009, Antalya, Turkey. pp.747-750
Communication dans un congrès lirmm-00448863 v1

A Model for Resistive Open Recursivity in CMOS Random Logic

Michel Renovell , Mariane Comte , Nicolas Houarche , Ilia Polian , Piet Engelke et al.
EWDTS: East-West Design & Test Symposium, Oct 2008, Lviv, Ukraine. pp.21-24
Communication dans un congrès lirmm-00381465 v1

On-Chip Monitor for the Detection of Logic Errors due to Simultaneous Switching Noise

Florence Azaïs , Laurent Larguier , Yves Bertrand , Michel Renovell
LATW'08: 9th Latin-American Test Workshop, Puebla, Mexico, pp.11-16
Communication dans un congrès lirmm-00260194 v1
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On the Detection of SSN-Induced Logic Errors Through On-Chip Monitoring

Florence Azaïs , Laurent Larguier , Yves Bertrand , Michel Renovell
IOLTS: International On-Line Testing Symposium, Jul 2008, Rhodes, Greece. pp.233-238, ⟨10.1109/IOLTS.2008.19⟩
Communication dans un congrès lirmm-00294767 v1

A Simulator of Small-Delay Faults Caused by Resistive-Open Defects

Alejandro Czutro , Nicolas Houarche , Piet Engelke , Ilia Polian , Mariane Comte et al.
ETS: European Test Symposium, May 2008, Verbania, Italy. pp.113-118
Communication dans un congrès lirmm-00285886 v1

System-in-Package, a Combination of Challenges and Solutions

Philippe Cauvet , Serge Bernard , Michel Renovell
ETS: European Test Symposium, May 2007, Freiburg, Germany. pp.193-199
Communication dans un congrès lirmm-00158123 v1

Analogue Network of Converters": A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC

Vincent Kerzérho , Philippe Cauvet , Serge Bernard , Florence Azaïs , Mariane Comte et al.
ETS: European Test Symposium, May 2007, Freiburg, Germany. pp.211-216, ⟨10.1109/ETS.2007.1⟩
Communication dans un congrès lirmm-00158527 v1

SUPERB: Simulator Utilizing Parallel Evaluation of Resistive Bridges

Piet Engelke , Bettina Braitling , Ilia Polian , Michel Renovell , Bernd Becker
ATS: Asian Test Symposium, Oct 2007, Beijing, China. pp.433-438
Communication dans un congrès lirmm-00179272 v1

Fully-Efficient ADC Test Technique for ATE with Low Resolution Arbitrary Wave Generators

Vincent Kerzérho , Philippe Cauvet , Serge Bernard , Florence Azaïs , Michel Renovell et al.
IMSTW'07: International Mixed-Signals Testing Workshop and 3rd International GHz/Gbps Test Workshop, Jun 2007, Povoa de Varzim, Portugal. pp.196-201
Communication dans un congrès lirmm-00161708 v1

Accessibility to Embedded A/MS Cores: An Oscillation-Based S-R DFT

Rahebeh Niaraki Asli , Zainalabedin Navabi , Sattar Mirzakuchaki , Michel Renovell
ETS: European Test Symposium, May 2007, Freiburg, Germany. pp.77-81
Communication dans un congrès lirmm-00158961 v1

Impact of Simultaneous Switching Noise on the Static Behavior of Digital CMOS Circuits

Florence Azaïs , Laurent Larguier , Michel Renovell
ATS: Asian Test Symposium, Oct 2007, Beijing, China. pp.239-244
Communication dans un congrès lirmm-00179262 v1
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Analyzing the Logic Behavior of Digital CMOS Circuits in Presence of Simultaneous Switching Noise

Florence Azaïs , Laurent Larguier , Michel Renovell
LATW: Latin American Test Workshop, Mar 2007, Cuzco, Peru
Communication dans un congrès lirmm-00199261 v1
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Analysing the Memory Effect of Resistive Open in CMOS Random Logic

Michel Renovell , Mariane Comte , Ilia Polian , Piet Engelke , Bernd Becker
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, 2006, Tunis, Tunisia. pp.251-256
Communication dans un congrès lirmm-00093383 v1
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Experimental Validation of the "Analogue Network of Converters" Technique to Test Complex SiP/SoC

Serge Bernard , Florence Azaïs , Philippe Cauvet , Mariane Comte , Vincent Kerzérho et al.
IEEE International Mixed-Signal Testing Workshop, Jun 2006, Paris, France. pp.84-88
Communication dans un congrès lirmm-00119266 v1

State of the art in soc testing: The analog challenge

Serge Bernard , Michel Renovell
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, 2006, Tunis, Tunisia
Communication dans un congrès lirmm-00407019 v1

Electrical Behavior of GOS Fault Affected Domino Logic Cell

Mariane Comte , Satoshi Ohtake , Hideo Fujiwara , Michel Renovell
DELTA'06: IEEE International Workshop on Electronics DesignTest & Applications, Jan 2006, Kuala Lumpur, Malaysia, pp.183-189
Communication dans un congrès lirmm-00102703 v1
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“Analogue Network of Converters”: A DFT Technique to Test a Complete Set of ADCs and DACs Embedded in a Complex SiP or SOC

Florence Azaïs , Serge Bernard , Philippe Cauvet , Mariane Comte , Vincent Kerzérho et al.
ETS: European Test Symposium, May 2006, Southampton, United Kingdom. pp.159-164
Communication dans un congrès lirmm-00115676 v1

Delta-Iddq Testing of Resistive Short Defects

Piet Engelke , Ilia Polian , Hans Manhaeve , Michel Renovell , Bernd Becker
ATS: Asian Test Symposium, Nov 2006, Fukuoka, Japan. pp.63-68
Communication dans un congrès lirmm-00117020 v1

A Specific ATPG Technique for Resistive Open with Sequence Recursive Dependency

Michel Renovell , Mariane Comte , Ilia Polian , Piet Engelke , Bernd Becker
ATS: Asian Test Symposium, Nov 2006, Fukuoka, Japan. pp.273-278, ⟨10.1109/ATS.2006.261031⟩
Communication dans un congrès lirmm-00117022 v1

Testing for Realistic Spot Defects in CMOS Technology: a Unified View

Michel Renovell
EWDTW: East-West Design & Test Workshop, Sep 2006, Sochi, Russia
Communication dans un congrès lirmm-00096254 v1
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Electrical Analysis of a Domino Logic Cell with GOS Faults

Mariane Comte , Satoshi Ohtake , Hideo Fujiwara , Michel Renovell
DBT'05: International Workshop on Current & Defect Based Testing, May 2005, Palm Springs, CA, United States
Communication dans un congrès lirmm-00374937 v1

Fast and Fully-Efficient Test Flow for ADCs

Serge Bernard , Mariane Comte , Florence Azaïs , Yves Bertrand , Michel Renovell
IMSTW'05: 11th IEEE International Mixed-Signal Testing Workshop, Jun 2005, Cannes, pp.244-249
Communication dans un congrès lirmm-00106523 v1

Resistive Bridge Fault Model Evolution From Conventional to Ultra Deep Submicron Technologies

I. Polian , Kundu Sandip , Jean-Marc J.-M. Galliere , P. Engelke , Michel Renovell et al.
VTS'05: 23rd IEEE VLSI Test Symposium, May 2005, Palm Springs, CA (USA), pp.343-348
Communication dans un congrès lirmm-00105997 v1

Analysis and Attenuation Proposal in Ground Bounce: II

Antonio Zenteno , Víctor H. Champac , Michel Renovell , Florence Azaïs
LATW: Latin American Test Workshop, Mar 2005, Salvador, Bahia, Brazil. pp.34-39
Communication dans un congrès lirmm-00106514 v1

Electrical Behavior of GOS Faults in Domino Logic

Mariane Comte , Satoshi Ohtake , Hideo Fujiwara , Michel Renovell
DDECS'05: IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Apr 2005, Sopron, Hungary, pp.210-215
Communication dans un congrès lirmm-00105991 v1

Testing the Interconnect Networks and I/O Resources of Field Programmable Analog Arrays

Gustavo Pereira , Antonio Andrade Jr. , Tiago R. Balen , Marcelo Lubaszewski , Florence Azaïs et al.
VTS: VLSI Test Symposium, May 2005, Palm Springs, CA, United States. pp.389-400, ⟨10.1109/VTS.2005.85⟩
Communication dans un congrès lirmm-00105998 v1

The Transient Reponse Analysis Method Applied to the Test of Field Programmable Analog Arrays: Feasibility Study

Tiago R. Balen , Tiago A. Jost , Jose Vicente Calvano , Marcelo Lubaszewski , Michel Renovell
LATW: Latin American Test Workshop, Mar 2005, Salvador, Brazil. pp.252-257
Communication dans un congrès lirmm-00106518 v1

A Set of Test Configurations for the Global Routing of Hierarchical SRAM-Based FPGA

Michel Renovell , Sébastien Tanguy
IBERCHIP, 2005, Salvador da Bahía, Brazil. pp.277-280
Communication dans un congrès lirmm-00106512 v1

Modeling Halo Implant Failures in MOS Sub-Micron Technology

Arnaud Regnier , Jean-Michel Portal , Rachid Bouchakour , Michel Renovell
LATW: Latin American Test Workshop, Mar 2005, Salvador, Bahia, Brazil. pp.29-33
Communication dans un congrès lirmm-00106513 v1

The Pros and Cons of Very-Low-Voltage Testing: An Analysis Based on Resistive Bridging Faults

P. Engelke , I. Polian , Michel Renovell , B. Seshadri , P. Becker
VTS'04: 22nd IEEE VLSI Test Symposium, Apr 2004, Napa Valley, CA (USA), pp.171-178
Communication dans un congrès lirmm-00108845 v1

Digital and Analog System Testing: Fundamentals and New Challenges

Michel Renovell
ICM 2004 - 16th International Conference on Microelectronics, Dec 2004, Tunis, Tunisia. pp.8-10, ⟨10.1109/ICM.2004.1434191⟩
Communication dans un congrès lirmm-00108936 v1

A Multi-Configuration Strategy for an Application Dependant Testing of FPGAs

Mehdi B. Tahoori , Edward J. Mccluskey , Michel Renovell , Philippe Faure
VTS: VLSI Test Symposium, Apr 2004, Napa Valley, CA, United States. pp.154-159, ⟨10.1109/VTEST.2004.1299239⟩
Communication dans un congrès lirmm-00108844 v1

Manufacturing-Oriented Testing of Delay Faults in the Logic Architecture of Symmetrical FPGAs

Patrick Girard , Olivier Héron , Serge Pravossoudovitch , Michel Renovell
ETS: European Test Symposium, May 2004, Ajaccio, Corsica, France. pp.117-122
Communication dans un congrès lirmm-00108905 v1

High Quality TPG for Delay Faults in Look-Up Tables of FPGAs

Patrick Girard , Olivier Héron , Serge Pravossoudovitch , Michel Renovell
DELTA'04: 2nd International Workshop on Electronic DesignTest and Applications, Jan 2004, Perth (Australia), pp.83-88
Communication dans un congrès lirmm-00108830 v1

Testing Global Interconnects of Field Programmable Analog Arrays

Antonio Andrade Jr , Gustavo Vieira , Tiago R. Balen , Marcelo Lubaszewski , Florence Azaïs et al.
IMSTW'04: 10th International Mixed-Signal Testing Workshop, Jun 2004, Portland, Oregon, United States
Communication dans un congrès lirmm-00108657 v1

Fundamentals of System Testing: Challenges for System-On-Chips

Michel Renovell
ICM'04: 16th International Conference on Microelectronics, Dec 2004, P., France. pp.176-180
Communication dans un congrès lirmm-00109135 v1

Analysis and Attenuation Proposal in Ground Bounce

Antonio Zenteno , Víctor H. Champac , Michel Renovell , Florence Azaïs
ATS: Asian Test Symposium, Nov 2004, Kenting Taiwan. pp.460-463, ⟨10.1109/ATS.2004.25⟩
Communication dans un congrès lirmm-00108931 v1

Impact of Gate Oxide Reduction Failure on Analog Applications: Example of the Current Mirror

S. Bernardini , P. Masson , Jean-Michel Portal , Jean-Marc J.-M. Galliere , Michel Renovell
LATW: Latin American Test Workshop, Mar 2004, Cartagena, Spain. pp.12-17
Communication dans un congrès lirmm-00108659 v1

Principe et Problèmatique pour le Test des System-0n-Chip

Michel Renovell
SCS'04: SignauxCircuits et Systèmes, Mar 2004, Monastir (Tunisie), pp.1-3
Communication dans un congrès lirmm-00108842 v1

Realistic Fault Models for Defects in Electronic Circuits

Michel Renovell
BEC'04: International Baltic Electronic Conference, Oct 2004, pp.33-37
Communication dans un congrès lirmm-00109134 v1

Automatic Test Pattern Generation for Resistive Bridging Faults

Piet Engelke , I. Polian , Michel Renovell , P. Becker
ETS: European Test Symposium, May 2004, Ajaccio, Corsica, France. pp.160-165
Communication dans un congrès lirmm-00108902 v1
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Scan design and secure chip [secure IC testing]

David Hely , Marie-Lise Flottes , Frédéric Bancel , Bruno Rouzeyre , Nicolas Berard et al.
IOLTS: International On-Line Testing Symposium, Jul 2004, Madeira Island, Portugal. pp.219-224, ⟨10.1109/OLT.2004.1319691⟩
Communication dans un congrès lirmm-00108909 v1

Automatic Test Pattern Generation for Resistive Bridging Faults

P. Engelke , I. Polian , Michel Renovell , P. Becker
IEEE International Workshop on Current and Defect-Based Testing, May 2004, Napa Valley, CA, pp.89-94
Communication dans un congrès lirmm-00108661 v1

An Approach to the Built-in-Self of Field Programmable Analog Arrays

Tiago R. Balen , Antonio Andrade Jr. , Florence Azaïs , Marcelo Lubaszewski , Michel Renovell
VTS: VLSI Test Symposium, Apr 2004, Napa Valley, CA, United States. pp.383-388
Communication dans un congrès lirmm-00108908 v1
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Testing the Configurable Analog Blocks of Field Programmable Analog Arrays

Tiago R. Balen , Antonio Andrade Jr. , Florence Azaïs , Marcelo Lubaszewski , Michel Renovell
ITC: International Test Conference, Oct 2004, Charlotte, United States. pp.893-902
Communication dans un congrès lirmm-00108897 v1

The Pros and Cons of Very-Low-Voltage Testing: An Analysis Based on Resistive Bridging Faults

P. Engelke , I. Polian , Michel Renovell , B. Seshadri , P. Becker
GI/ITG Workshop Testmethoden und Zuverlassigkeit von Schaltungen und Systemen, Feb 2004, Dresden, Germany. pp.149-153
Communication dans un congrès lirmm-00108660 v1
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BIST of Delay Faults in the Logic Architecture of Symmetrical FPGAs

Patrick Girard , Olivier Héron , Serge Pravossoudovitch , Michel Renovell
IOLTS: International On-Line Testing Symposium, Jul 2004, Madeira Island, Portugal. pp.187-192, ⟨10.1109/OLT.2004.1319686⟩
Communication dans un congrès lirmm-00108824 v1

Hard to Detect Bridging Defects in a Cross-Point Digital Switch

M. Zottino , Alfredo Benso , Michel Renovell , Yves Bertrand , Luz Maria Balado Suarez et al.
LATW: Latin American Test Workshop, Feb 2003, Natal, Brazil. pp.12-18
Communication dans un congrès lirmm-00269496 v1

Conditions pour le Test de Pannes de Délai des Look-Up Table dans les FPGA à Base de SRAM

Patrick Girard , Olivier Héron , Serge Pravossoudovitch , Michel Renovell
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, May 2003, Toulouse, France. pp.381-383
Communication dans un congrès lirmm-00269544 v1

Defect Analysis for Delay-Fault BIST in FPGAs

Patrick Girard , Olivier Héron , Serge Pravossoudovitch , Michel Renovell
IOLTS: International On-Line Testing Symposium, Jul 2003, Kos, Greece. pp.124-128, ⟨10.1109/OLT.2003.1214378⟩
Communication dans un congrès lirmm-00269553 v1

Timing Defect Analysis in Look-Up Tables of SRAM-Based FPGAs

Patrick Girard , Olivier Héron , Serge Pravossoudovitch , Michel Renovell
LATW: Latin American Test Workshop, Feb 2003, Natal, Brazil. pp.26-31
Communication dans un congrès lirmm-00269497 v1
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Simulating Resistive Bridging and Stuck-At Faults

Piet Engelke , Ilia Polian , Michel Renovell , Bernd Becker
ITC 2003 - IEEE International Test Conference, Sep 2003, Charlotte, NC, United States. pp.1051-1059, ⟨10.1109/TCAD.2006.871626⟩
Communication dans un congrès lirmm-00269611 v1

Automatic Generation of LH-BIST Architecture for ADC Testing

Serge Bernard , Florence Azaïs , Mariane Comte , Yves Bertrand , Michel Renovell
IWADC'03: IEEE International Workshop on ADC Modelling and Testing, Sep 2003, Perugia, Italy. pp.7-12
Communication dans un congrès lirmm-00269683 v1

An Automatic Tool for Generation of ADC BIST Architecture

Serge Bernard , Florence Azaïs , Mariane Comte , Yves Bertrand , Michel Renovell
IMSTW: International Mixed-Signal Testing Workshop, Jun 2003, Sevilla, Spain. pp.79-84
Communication dans un congrès lirmm-00269580 v1

Analysis of the Specification Influence on the Efficiency of an Optimized Test Flow for ADCs

Mariane Comte , Florence Azaïs , Serge Bernard , Yves Bertrand , Michel Renovell
IMSTW: International Mixed-Signal Testing Workshop, Jun 2003, Sevilla, Spain. pp.185-190
Communication dans un congrès lirmm-00269583 v1

Delay Testing of MOS Transistor with Gate Oxide Short

Michel Renovell , Jean-Marc J.-M. Galliere , Florence Azaïs , Yves Bertrand
ATS: Asian Test Symposium, Nov 2003, Xian, China. pp.168-173
Communication dans un congrès lirmm-00269641 v1

OBIST Applied to FPAAs: A Case Study

Michel Renovell , Tiago R. Balen , M. Schreiber , Florence Azaïs , Marcelo Lubaszewski
LATW 2003 - 4th IEEE Latin American Test Workshop, Feb 2003, Natal, Brazil. pp.238-243
Communication dans un congrès lirmm-00269501 v1
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Structural Testing of Modern Reconfigurable Chips

Michel Renovell
EWDTC 2003 - East-West Design & Test Conference, Sep 2003, Moscou, Russia. pp.5-9
Communication dans un congrès lirmm-00269648 v1

Testing Challenges for Modern FPGAs

Michel Renovell
ECS: Electronic Circuits and Systems, Sep 2003, Bratislava, Slovenia. pp.1-9
Communication dans un congrès lirmm-00269565 v1

On the Synthesis of Analog Cascaded Filters with Optimal Test Point Insertion

Florence Azaïs , Marcelo Lubaszewski , Pascal Nouet , Michel Renovell
LATW: Latin American Test Workshop, Feb 2003, Natal, Brazil. pp.212-216
Communication dans un congrès lirmm-00269499 v1

GOSMOS: A Gate Oxide Short Defect Embedded in a MOS Compact Model

Michel Renovell , Jean-Marc J.-M. Galliere , Florence Azaïs , Yves Bertrand , Jean-Michel Portal et al.
LATW: Latin American Test Workshop, Feb 2003, Natal, Brazil
Communication dans un congrès lirmm-00269604 v1

Requirements for Delay Testing of Look-Up Tables in SRAM-Based FPGAs

Patrick Girard , Olivier Héron , Serge Pravossoudovitch , Michel Renovell
ETW: European Test Workshop, May 2003, Maastricht, Netherlands. pp.147-152
Communication dans un congrès lirmm-00269530 v1
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A New Methodology for ADC Test Flow Optimization

Serge Bernard , Mariane Comte , Florence Azaïs , Yves Bertrand , Michel Renovell
ITC: International Test Conference, Sep 2003, Charlotte, NC, United States. pp.201-209, ⟨10.1109/TEST.2003.1270841⟩
Communication dans un congrès lirmm-00269527 v1

On the Efficiency of Measuring ADC Dynamic Parameters to Detect ADC Static Errors

Mariane Comte , Florence Azaïs , Serge Bernard , Yves Bertrand , Michel Renovell
LATW: Latin American Test Workshop, Feb 2003, Natal, Brazil. pp.198-203
Communication dans un congrès lirmm-00269498 v1

A high accuracy triangle-wave signal generator for on-chip ADC testing

Serge Bernard , Florence Azaïs , Yves Bertrand , Michel Renovell
ETW 2002 - 7th IEEE European Test Workshop, May 2002, Corfu, Greece. pp.89-94, ⟨10.1109/ETW.2002.1029644⟩
Communication dans un congrès lirmm-00268483 v1

Non-Linear and Non-Split Transistor MOS Model for Gate Oxyde Short

Michel Renovell , Jean-Marc J.-M. Galliere , Florence Azaïs , Yves Bertrand
DBT: Defect Based Testing, Apr 2002, Monterey, CA, United States. pp.11-16
Communication dans un congrès lirmm-00269333 v1

Low Voltage Testing of Gate Oxide Short in CMOS Technology

Michel Renovell , Jean-Marc J.-M. Galliere , Florence Azaïs , Yves Bertrand
DDECS: Design and Diagnostics of Electronic Circuits and Systems, 2002, Brno, Czech Republic. pp.168-174
Communication dans un congrès lirmm-00268526 v1

A Non-Split Model for Realistic Gate Oxide Short in CMOS Technology

Michel Renovell , Jean-Marc J.-M. Galliere , Florence Azaïs , Yves Bertrand
DCIS: Design of Circuits and Integrated Systems, 2002, Santander, Spain. pp.197-204
Communication dans un congrès lirmm-00268432 v1

On the Evaluation of ADC Static Parameters Through Dynamic Testing

Mariane Comte , Florence Azaïs , Serge Bernard , Yves Bertrand , Michel Renovell
ADDA & EWADC, Jun 2002, Prague, Czech Republic. pp.95-98
Communication dans un congrès lirmm-00269338 v1

Testing the Unidimensionnal Interconnect Architecture of Symmetrical SRAM-based FPGA

Michel Renovell , Philippe Faure , Paolo Prinetto , Yervant Zorian
DELTA: Electronic Design, Test and Applications, Jan 2002, Christchurch, New Zealand. pp.297-301, ⟨10.1109/DELTA.2002.994634⟩
Communication dans un congrès lirmm-00268528 v1
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Implementation of an Experimental IEEE 1149.4 Mixed-Signal Test Chip

Uroš Kač , Franc Novak , Florence Azaïs , Pascal Nouet , Michel Renovell
BTW 2002 - 1st IEEE International Board Test Workshop, Oct 2002, Baltimore, United States. paper 4.2
Communication dans un congrès lirmm-00269342 v1
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Experimental test infrastructure supporting IEEE 11494 Standard

Uroš Kač , Franc Novak , Jozef Stefan , Florence Azaïs , Pascal Nouet et al.
ETW: European Test Workshop, 2002, Corfou, Greece
Communication dans un congrès lirmm-00268606 v1

Pannes Temporelles dans les FPGA

Patrick Girard , Olivier Héron , Serge Pravossoudovitch , Michel Renovell
Colloque du GDR CAO de Circuits et Systèmes Intégrés, May 2002, Paris, France. pp.43-46
Communication dans un congrès lirmm-00269327 v1

Estimating Static Parameters of A-to-D Converters from Spectral Analysis

Florence Azaïs , Serge Bernard , Yves Bertrand , Mariane Comte , Michel Renovell et al.
LATW: Latin American Test Workshop, Feb 2002, Montevideo, Uruguay. pp.174-179
Communication dans un congrès lirmm-00269320 v1

A New FPGA for DSP Applications Integrating BIST Capabilities

Alex Gonsales , Marcelo Lubaszewski , Luigi Carro , Michel Renovell
LATW'02: 3rd IEEE Latin American Test Workshop, Feb 2002, Montevideo, Uruguay. pp.76-81
Communication dans un congrès lirmm-00269328 v1

Mesure des Paramètres Statiques des Convertisseurs A/N par une Analyse Spectrale

Mariane Comte , Florence Azaïs , Serge Bernard , Yves Bertrand , Michel Renovell
Colloque du GDR CAO de Circuits et Systèmes Intégrés, May 2002, Paris, France. pp.47-50
Communication dans un congrès lirmm-00269325 v1

Designing Testable Analog Filters with Optimal DFT Insertion

Florence Azaïs , Yves Bertrand , Jose Vicente Calvano , Marcelo Lubaszewski , Pascal Nouet et al.
IMSTW: International Mixed-Signal Testing Workshop, Jun 2002, Montreux, Switzerland. pp.201-203
Communication dans un congrès lirmm-00269341 v1

Evaluation of ADC Static Parameters via Frequency Domain

Florence Azaïs , Serge Bernard , Yves Bertrand , Mariane Comte , Michel Renovell
IMSTW'02: 8th IEEE International Mixed-Signal Testing Workshop, Jun 2002, Montreux, Switzerland. pp.165-169
Communication dans un congrès lirmm-00269347 v1
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Modeling Gate Oxide Short Defects in CMOS Minimum Transistors

Michel Renovell , Jean-Marc J.-M. Galliere , Florence Azaïs , Yves Bertrand
ETW: European Test Workshop, 2002, Corfu, Greece. pp.15-20
Communication dans un congrès lirmm-00268527 v1

Boolean and Current Detection of MOS Transistor with Gate Oxide Short

Michel Renovell , Jean-Marc J.-M. Galliere , Florence Azaïs , Yves Bertrand
IEEE International Test Conference, Oct 2001, Baltimore, USA, pp.10
Communication dans un congrès lirmm-00370400 v1

A multi-mode stimuli generator for analogue and mixed-signal built-in-self-test

Marcelo Lubaszewski , Michel Renovell , Florence Azaïs , Yves Bertrand
IMSTW: International Mixed Signal Testing Workshop, Jun 1998, The Hague, Pays-Bas. pp.100-106
Communication dans un congrès hal-01384740 v1

From dependable computing systems to computing for integrated dependable systems?

Karl-Erwin Grosspietsch , Jacob Abraham , Jürgen Maier , Hans-Dieter Kochs , Michael Nicolaidis et al.
FTCS: Fault-Tolerant Computing Symposium, Jun 1998, Munich, Germany. pp.296-301, ⟨10.1109/FTCS.1998.689480⟩
Communication dans un congrès hal-00013844 v1

A built-in multi-mode stimuli generator for analogue and mixed-signal testing

Marcelo Lubaszewski , Michel Renovell , Salvador Mir , Florence Azaïs , Yves Bertrand
Brazilian Symposium on Integrated Circuit Design, 1998, Rio de Janeiro, Brazil. pp.175-178, ⟨10.1109/SBCCI.1998.715435⟩
Communication dans un congrès hal-00005876 v1
Image document

A multi-mode signature analyzer for analog and mixed circuits

Michel Renovell , Marcelo Lubaszewski , Salvador Mir , Florence Azaïs , Yves Bertrand
VLSI: Integrated Systems on Silicon, Aug 1997, Gramado, Brazil. pp.65-76, ⟨10.1007/978-0-387-35311-1_6⟩
Communication dans un congrès hal-01399998 v1

Implementing model redundancy in predictive alternate test to improve test confidence

Haithem Ayari , Florence Azaïs , Serge Bernard , Mariane Comte , Vincent Kerzérho et al.
ETS: European Test Symposium, May 2013, Avignon, France. 18th IEEE European Test Symposium, 2013, ⟨10.1109/ETS.2013.6569386⟩
Poster de conférence lirmm-00820077 v1

Influence of Parasitic Memory Effect on Single-Cell Faults in SRAMs

Sandra Irobi , Zaid Al-Ars , Said Hamdioui , Michel Renovell
DDECS'11: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits ans Systems, Germany. pp.159-162, 2011
Poster de conférence lirmm-00591995 v1

Logic Errors in CMOS Circuits due to Simultaneous Switching Noise

Florence Azaïs , Laurent Larguier , Michel Renovell
ETS: European Test Symposium, May 2007, Freiburg, Germany. 12th IEEE European Test Symposium, pp.59-64, 2007
Poster de conférence lirmm-00154744 v1
Image document

Mixed-level simulation tool for design optimization of electrical impedance spectroscopy systems

Achraf Lamlih , Vincent Kerzérho , Serge Bernard , Fabien Soulier , Mariane Comte et al.
Kanoun, Olfa. Impedance Spectroscopy
Advanced Applications: Battery Research, Bioimpedance, System Design
, Walter de Gruyter, pp.71-80, 2018, 9783110558920. ⟨10.1515/9783110558920-008⟩
Chapitre d'ouvrage lirmm-02007013 v1

Models for Bridging Defects

Michel Renovell , Florence Azaïs , Joan Figueras , Rosa Rodríguez-Montañés , Daniel Arumi
Models in Hardware Testing, 43, Springer Netherlands, pp.33-70, 2010, Frontiers in Electronic Testing, 978-90-481-3281-2
Chapitre d'ouvrage lirmm-00371365 v1

SIP Test Architectures

Serge Bernard , Philippe Cauvet , Michel Renovell
Morgan Kaufmann Publishers. System-on-chip Test Architectures: Nanometer Design for Testability, Elsevier, pp.405-441, 2007, 978-0-12-373973-5
Chapitre d'ouvrage lirmm-00195243 v1
Image document

On-Chip Generator of a Saw-Tooth Test Stimulus for ADC BIST

Florence Azaïs , Serge Bernard , Yves Bertrand , Michel Renovell
SOC Design Methodologies, 90, Kluwer Academic Publishers, pp.425-436, 2002, IFIP — The International Federation for Information Processing, 978-1-4757-6530-4. ⟨10.1007/978-0-387-35597-9_36⟩
Chapitre d'ouvrage lirmm-00268477 v1

Rapport Technique intermédiaire, Contrat TOETS CT 302, Programme CEE CATRENE

Patrick Girard , Serge Bernard , Florence Azaïs , Alberto Bosio , Luigi Dilillo et al.
2011
Rapport (rapport contrat/projet) lirmm-00679018 v1

Rapport Technique de fin d'année, Contrat TOETS CT 302, Programme CEE CATRENE

Patrick Girard , Serge Bernard , Florence Azaïs , Alberto Bosio , Luigi Dilillo et al.
2011
Rapport (rapport contrat/projet) lirmm-00679022 v1

Contrat TOETS CT 302 - Programme CEE CATRENE (Rapport Intermédiaire)

Patrick Girard , Serge Bernard , Florence Azaïs , Alberto Bosio , Luigi Dilillo et al.
2010
Rapport (rapport contrat/projet) lirmm-00504873 v1

TOETS CT302 - Programme CEE CATRENE - Summary Technical Report 2S-2009 - Rapport Technique de Fin d'année

Patrick Girard , Florence Azaïs , Serge Bernard , Alberto Bosio , Luigi Dilillo et al.
2010
Rapport (rapport contrat/projet) lirmm-00461745 v1

Rapport Technique de fin de Contrat NanoTEST 2A702, Programme CEE MEDEA+

Patrick Girard , Serge Bernard , Alberto Bosio , Luigi Dilillo , Marie-Lise Flottes et al.
2009
Rapport (rapport contrat/projet) lirmm-00406974 v1

Contrat Nano TEST 2A702, Programme CEE MEDEA (Rapport Technique de fin d'année)

Patrick Girard , Serge Bernard , Alberto Bosio , Marie-Lise Flottes , Serge Pravossoudovitch et al.
08026, 2008
Rapport lirmm-00344408 v1

Contrat Nano TEST 2A702, Programme CEE MEDEA (Rapport Intermédiaire)

Patrick Girard , Serge Bernard , Alberto Bosio , Marie-Lise Flottes , Serge Pravossoudovitch et al.
08027, 2008
Rapport lirmm-00344415 v1

Contrat NanoTEST 2A702 - Programme CEE MEDEA - Rapport Technique intermédiaire

Patrick Girard , Serge Bernard , Alberto Bosio , Marie-Lise Flottes , Serge Pravossoudovitch et al.
2007
Rapport (rapport technique) lirmm-00199966 v1

Contrat NanoTEST 2A702 - Programme CEE MEDEA - Rapport Technique de fin d'année

Patrick Girard , Serge Bernard , Alberto Bosio , Marie-Lise Flottes , Serge Pravossoudovitch et al.
2007
Rapport (rapport contrat/projet) lirmm-00199958 v1

Contrat NanoTEST 2A702 - Programme CEE MEDEA+

Patrick Girard , Serge Bernard , Marie-Lise Flottes , Christian Landrault , Serge Pravossoudovitch et al.
2006
Rapport (rapport technique) lirmm-00102699 v1

Contrat NanoTEST 2A702, Programme CEE MEDEA +

Patrick Girard , Serge Bernard , Marie-Lise Flottes , Christian Landrault , Serge Pravossoudovitch et al.
2006
Rapport (rapport contrat/projet) lirmm-00130759 v1

Contrat NanoTEST 2A702, Programme CEE MEDEA+

Patrick Girard , Serge Bernard , Marie-Lise Flottes , Christian Landrault , Serge Pravossoudovitch et al.
2006
Rapport (rapport contrat/projet) lirmm-00130758 v1

A Compact Model for Electrical Simulation of MOS Transistor with Gate Oxide Short Defect

Michel Renovell , Jean-Marc J.-M. Galliere , Florence Azaïs , Yves Bertrand , Jean-Michel Portal
[Research Report] 04080, Lirmm, University of Montpellier. 2004
Rapport (rapport de recherche) lirmm-00109221 v1

Advanced Solutions for Innovative SOC Testing in Europe

Patrick Girard , Michel Renovell , Serge Bernard , Marie-Lise Flottes , Serge Pravossoudovitch et al.
2004
Rapport (rapport technique) lirmm-00109190 v1

Advanced Solutions for Innovative SOC Testing in Europe, Contrat CEE ASSOCIATE A503, Programme MEDEA+ (Rapport Technique Intermédiaire)

Patrick Girard , Michel Renovell , Florence Azaïs , Yves Bertrand , Marie-Lise Flottes et al.
2003, pp.P nd
Rapport (rapport technique) lirmm-00269720 v1

Advanced Solutions for Innovative SOC Testing in Europe, Contrat CEE ASSOCIATE A503, Programme MEDEA+ (Rapport Technique de Fin d'Année)

Patrick Girard , Michel Renovell , Florence Azaïs , Serge Bernard , Marie-Lise Flottes et al.
2003, pp.P nd
Rapport (rapport technique) lirmm-00269749 v1

Advanced Solutions for Innovative SOC Testing in Europe

Patrick Girard , Florence Azaïs , Serge Bernard , Yves Bertrand , Marie-Lise Flottes et al.
2002
Rapport (rapport technique) lirmm-00268586 v1

Mixed-Signal BISR

Florence Azaïs , Serge Bernard , Yves Bertrand , Michel Renovell
2002
Rapport (rapport technique) lirmm-00268607 v1