|
Butterfly probes: estimating the derivative of the magnetic field
Philippe Maurine
,
Jérémy Raoult
,
Anselme Mouette
,
Julien Toulemont
EMC COMPO 2024 - 14th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, Oct 2024, Turin, Italy
Conference papers
hal-04699339
v1
|
|
Bernoulli at the Root of Horizontal Side Channel Attacks
Gauthier Cler
,
Sebastien Ordas
,
Philippe Maurine
CARDIS 2023 - 22nd International Conference on Smart Card Research and Advanced Applications, Nov 2023, Amsterdam, Netherlands. pp.107-126, ⟨10.1007/978-3-031-54409-5_6⟩
Conference papers
lirmm-04703364
v1
|
|
The EVIL Machine: Encode, Visualize and Interpret the Leakage
Valence Cristiani
,
Maxime Lecomte
,
Philippe Maurine
SAC 2023 - 38th ACM/SIGAPP Symposium on Applied Computing, Mar 2023, Tallinn, Estonia. pp.1566-1575, ⟨10.1145/3555776.3577688⟩
Conference papers
lirmm-04230167
v1
|
|
A better practice for Body Biasing Injection
Geoffrey Chancel
,
Jean-Marc J.-M. Galliere
,
Philippe Maurine
Conference papers
lirmm-04703372
v1
|
|
Body Biasing Injection: To Thin or Not to Thin the Substrate?
Geoffrey Chancel
,
Jean-Marc J.-M. Galliere
,
Philippe Maurine
COSADE 2022 - 13th International Workshop on Constructive Side-Channel Analysis and Secure Design, Apr 2022, Leuwen, Belgium. pp.125-139, ⟨10.1007/978-3-030-99766-3_6⟩
Conference papers
lirmm-04703379
v1
|
|
EM emission modeling for secure IC design
Davide Poggi
,
Philippe Maurine
,
Thomas Ordas
,
Alexandre Sarafianos
,
Jérémy Raoult
Conference papers
lirmm-04703382
v1
|
|
Body Biasing Injection: Impact of substrate types on the induced disturbancesƒ
Geoffrey Chancel
,
Jean-Marc J.-M. Galliere
,
Philippe Maurine
Conference papers
lirmm-04703375
v1
|
|
Spatial Dependency Analysis to Extract Information from Side-Channel Mixtures
Aurélien Vasselle
,
Hugues Thiebeauld
,
Philippe Maurine
ASHES 2021 - 5th Workshop on Attacks and Solutions in Hardware Security @CCS 2021, Nov 2021, Virtual Event, South Korea. pp.73-84, ⟨10.1145/3474376.3487280⟩
Conference papers
lirmm-03476806
v1
|
|
Iterative Method for Performance Prediction Improvement of Integrated Circuits
Gwenaël Chaillou
,
Philippe Maurine
,
Jean-Marc J.-M. Galliere
,
Nadine Azemard
Conference papers
lirmm-03710383
v1
|
|
Protecting Secure ICs Against Side-Channel Attacks by Identifying and Quantifying Potential EM and Leakage Hotspots at Simulation Stage
Davide Poggi
,
Philippe Maurine
,
Thomas Ordas
,
Alexandre Sarafianos
COSADE 2021 - 12th International Workshop on Constructive Side-Channel Analysis and Secure Design, Oct 2021, Lugano, Switzerland. pp.129-147, ⟨10.1007/978-3-030-89915-8_6⟩
Conference papers
lirmm-04703388
v1
|
|
Exploring flexible and 3D printing technologies for the design of high spatial resolution EM probes
Julien Toulemont
,
Frédérick Mailly
,
Philippe Maurine
,
Pascal Nouet
Conference papers
lirmm-03278789
v1
|
|
On the scaling of EMFI probes
Julien Toulemont
,
Geoffrey Chancel
,
Jean-Marc J.-M. Galliere
,
Frédérick Mailly
,
Pascal Nouet
et al.
Conference papers
lirmm-03476820
v1
|
|
Leakage Assessment through Neural Estimation of the Mutual Information
Valence Cristiani
,
Maxime Lecomte
,
Philippe Maurine
ACNS 2020 - International Conference on Applied Cryptography and Network Security, Oct 2020, Rome, Italy. pp.144-162, ⟨10.1007/978-3-030-61638-0_9⟩
Conference papers
hal-02980501
v1
|
|
Electromagnetic Activity vs. Logical Activity: Near Field Scans for Reverse Engineering
Marc Lacruche
,
Philippe Maurine
CARDIS 2018 - 17th International Conference on Smart Card Research and Advanced Applications, Nov 2018, Montpellier, France. pp.140-155, ⟨10.1007/978-3-030-15462-2_10⟩
Conference papers
lirmm-01943151
v1
|
|
Breaking Mobile Firmware Encryption through Near-Field Side-Channel Analysis
Aurélien Vasselle
,
Philippe Maurine
,
Maxime Cozzi
ASHES 2019 - 3rd Attacks and Solutions in Hardware Security Workshop, Nov 2019, London, United Kingdom. pp.23-32, ⟨10.1145/3338508.3359571⟩
Conference papers
lirmm-03660638
v1
|
|
Electromagnetic Fault Injection : How Faults Occur
Mathieu Dumont
,
Mathieu Lisart
,
Philippe Maurine
FDTC 2019 - Workshop on Fault Diagnosis and Tolerance in Cryptography, Aug 2019, Atlanta, GA, United States. pp.9-16, ⟨10.1109/FDTC.2019.00010⟩
Conference papers
lirmm-02328109
v1
|
|
Standard CAD Tool-Based Method for Simulation of Laser-Induced Faults in Large-Scale Circuits
Raphael Andreoni Camponogara-Viera
,
Jean-Max Dutertre
,
Philippe Maurine
,
Rodrigo Possamai Bastos
ISPD 2018 - International Symposium on Physical Design, Mar 2018, Monterey, CA, United States. pp.160-167, ⟨10.1145/3177540.3178243⟩
Conference papers
lirmm-01743368
v1
|
|
An {EM} Fault Injection Susceptibility Criterion and Its Application to the Localization of Hotspots
Maxime Madau
,
Michel Agoyan
,
Philippe Maurine
CARDIS 2017 - 16th International Conference on Smart Card Research and Advanced Applications, Nov 2017, Lugano, Switzerland. pp.180-195, ⟨10.1007/978-3-319-75208-2_11⟩
Conference papers
lirmm-02100194
v1
|
|
Exploiting Phase Information in Thermal Scans for Stealthy Trojan Detection
Maxime Cozzi
,
Jean-Marc J.-M. Galliere
,
Philippe Maurine
DSD 2018 - 21st Euromicro Conference on Digital System Design, Aug 2018, Prague, Slovakia. pp.573-576, ⟨10.1109/DSD.2018.00100⟩
Conference papers
lirmm-01872499
v1
|
|
The impact of pulsed electromagnetic fault injection on true random number generators
Maxime Madau
,
Michel Agoyan
,
Josep Balash
,
Milos Grujic
,
Patrick Haddad
et al.
FDTC 2018 - Workshop on Fault Diagnosis and Tolerance in Cryptography, Sep 2018, Amsterdam, Netherlands. pp.43-48, ⟨10.1109/FDTC.2018.00015⟩
Conference papers
lirmm-01943112
v1
|
|
Thermal Scans for Detecting Hardware Trojans
Maxime Cozzi
,
Philippe Maurine
,
Jean-Marc J.-M. Galliere
COSADE 2018 - 9th International Workshop on Constructive Side-Channel Analysis and Secure Design, Apr 2018, Singapour, Singapore. pp.117-132, ⟨10.1007/978-3-319-89641-0_7⟩
Conference papers
lirmm-01823444
v1
|
|
Method for evaluation of transient-fault detection techniques
Raphael Andreoni Camponogara-Viera
,
Rodrigo Possamai Bastos
,
Jean-Max Dutertre
,
Philippe Maurine
ESREF: European Symposium on Reliability of Electron devices, Failure physics and analysis, Sep 2017, Bordeaux, France
Conference papers
hal-01721081
v1
|
|
Importance of IR Drops on the Modeling of Laser-Induced Transient Faults
Raphael Viera
,
Philippe Maurine
,
Jean-Max Dutertre
,
Rodrigo Possamai Bastos
SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Jun 2017, Giardini Naxos, Italy. ⟨10.1109/SMACD.2017.7981593⟩
Conference papers
hal-01721087
v1
|
|
Impacts of Technology Trends on Physical Attacks?
Philippe Maurine
,
Sylvain Guilley
COSADE 2017 - 8th International Workshop on Constructive Side-Channel Analysis and Secure Design, Apr 2017, Paris, France. pp.190-206, ⟨10.1007/978-3-319-64647-3_12⟩
Conference papers
lirmm-01690188
v1
|
|
Role of Laser-Induced IR Drops in the Occurrence of Faults: Assessment and Simulation
Raphael Andreoni Camponogara-Viera
,
Jean-Max Dutertre
,
Rodrigo Possamai Bastos
,
Philippe Maurine
DSD 2017 - Euromicro Symposium on Digital System Design, Aug 2017, Vienna, Austria. pp.252-259, ⟨10.1109/DSD.2017.43⟩
Conference papers
lirmm-01699776
v1
|
|
A Fully-Digital Em Pulse Detector
David El-Baze
,
Jean-Baptiste Rigaud
,
Philippe Maurine
DATE 2016 - 19th Design, Automation and Test in Europe Conference and Exhibition, Mar 2016, Dresden, Germany. pp.439-444
Conference papers
lirmm-01269860
v1
|
|
Granularity and detection capability of an adaptive embedded Hardware Trojan detection system
Maxime Lecomte
,
Jacques Jean-Alain Fournier
,
Philippe Maurine
Conference papers
lirmm-01434150
v1
|
|
An Embedded Digital Sensor against EM and BB Fault Injection
David El-Baze
,
Jean-Baptiste Rigaud
,
Philippe Maurine
FDTC: Fault Diagnosis and Tolerance in Cryptography, Aug 2016, Santa Barbara, CA, United States. pp.78-86, ⟨10.1109/FDTC.2016.14⟩
Conference papers
lirmm-01434028
v1
|
|
Electromagnetic Analysis Perturbation using Chaos Generator
Thomas Sarno
,
Romain Wacquez
,
Edith Kussener
,
Philippe Maurine
,
Khalil Jradi
et al.
Truedevice 2016, Nov 2016, Barcelona, Spain
Conference papers
hal-01455446
v1
|
|
Body Biasing Injection Attacks in Practice
Noemie Beringuier-Boher
,
Marc Lacruche
,
David El-Baze
,
Jean-Max Dutertre
,
Jean-Baptiste Rigaud
et al.
Conference papers
lirmm-01434143
v1
|
|
Collision for Estimating SCA Measurement Quality and Related Applications
Ibrahima Diop
,
Mathieu Carbone
,
Sébastien Ordas
,
Yanis Linge
,
Pierre Yvan Liardet
et al.
Conference papers
lirmm-01319093
v1
|
|
On-Chip Fingerprinting of IC Topology for Integrity Verification
Maxime Lecomte
,
Jacques Jean-Alain Fournier
,
Philippe Maurine
DATE 2016 - 19th Design, Automation and Test in Europe Conference and Exhibition, Mar 2016, Dresden, Germany. pp.133-138, ⟨10.3850/9783981537079_0169⟩
Conference papers
lirmm-01269856
v1
|
|
EM Injection: Fault Model and Locality
Sébastien Ordas
,
Ludovic Guillaume-Sage
,
Philippe Maurine
FDTC: Fault Diagnosis and Tolerance in Cryptography, Sep 2015, Saint Malo, France. pp.3-13, ⟨10.1109/FDTC.2015.9⟩
Conference papers
lirmm-01319078
v1
|
|
Interest of MIA in frequency domain?
Mathieu Carbone
,
Yannick Teglia
,
Philippe Maurine
,
Gilles R. Ducharme
Conference papers
lirmm-01111693
v1
|
|
Collision Based Attacks in Practice
Ibrahima Diop
,
Pierre-Yvan Liardet
,
Yanis Linge
,
Philippe Maurine
Conference papers
lirmm-01269809
v1
|
|
Evidence of a larger EM-induced fault model
Sébastien Ordas
,
Ludovic Guillaume-Sage
,
Karim Tobich
,
Jean-Max Dutertre
,
Philippe Maurine
Conference papers
emse-01099037
v1
|
|
Thoroughly analyzing the use of ring oscillators for on-chip hardware trojan detection
Maxime Lecomte
,
Philippe Maurine
,
Jacques Jean-Alain Fournier
Conference papers
lirmm-01354318
v1
|
|
Attacking Randomized Exponentiations Using Unsupervised Learning
Guilherme Perin
,
Laurent Imbert
,
Lionel Torres
,
Philippe Maurine
Conference papers
lirmm-01096039
v1
|
|
On Adaptive Bandwidth Selection for Efficient MIA
Mathieu Carbone
,
Sébastien Tiran
,
Sébastien Ordas
,
Michel Agoyan
,
Yannick Teglia
et al.
Conference papers
lirmm-01096033
v1
|
|
A frequency leakage model for SCA
Sébastien Tiran
,
Sébastien Ordas
,
Yannick Teglia
,
Michel Agoyan
,
Philippe Maurine
HOST 2014 - IEEE International Symposium on Hardware-Oriented Security and Trust, May 2014, Arlington, VA, United States. pp.97-100, ⟨10.1109/HST.2014.6855577⟩
Conference papers
lirmm-01096058
v1
|
|
ElectroMagnetic Analysis and Fault Injection onto Secure Circuits
Paolo Maistri
,
Régis Leveugle
,
Lilian Bossuet
,
Alain Aubert
,
Viktor Fischer
et al.
Conference papers
emse-01099025
v1
|
|
Efficiency of a glitch detector against electromagnetic fault injection
Loic Zussa
,
Amine Dehbaoui
,
Karim Tobich
,
Jean-Max Dutertre
,
Philippe Maurine
et al.
DATE 2014 - 17th Design, Automation and Test in Europe Conference and Exhibition, Mar 2014, Dresden, Germany. ⟨10.7873/DATE.2014.216⟩
Conference papers
lirmm-01096047
v1
|
|
Electromagnetic analysis, deciphering and reverse engineering of integrated circuits (E-MATA HARI)
Laurent Chusseau
,
Rachid Omarouayache
,
Jérémy Raoult
,
Sylvie Jarrix
,
Philippe Maurine
et al.
Conference papers
lirmm-01434592
v1
|
|
Magnetic Microprobe design for EM fault attack
Rachid Omarouayache
,
Jérémy Raoult
,
Sylvie Jarrix
,
Laurent Chusseau
,
Philippe Maurine
EMC EUROPE: Electromagnetic Compatibility, Sep 2013, Bruges, Belgium
Conference papers
hal-01893856
v1
|
|
Countermeasures against EM analysis for a secured FPGA-based AES implementation
Paolo Maistri
,
Sébastien Tiran
,
Philippe Maurine
,
Israel Koren
,
Régis Leveugle
Conference papers
hal-00963133
v1
|
|
An evaluation of an AES implementation protected against EM analysis
Paolo Maistri
,
Sébastien Tiran
,
Philippe Maurine
,
Israel Koren
,
Régis Leveugle
Conference papers
hal-00862787
v1
|
|
Practical Analysis of RSA Countermeasures Against Side-Channel Electromagnetic Attacks
Guilherme Perin
,
Laurent Imbert
,
Lionel Torres
,
Philippe Maurine
Conference papers
lirmm-01096070
v1
|
|
Electromagnetic Analysis on RSA Algorithm Based on RNS
Guilherme Perin
,
Laurent Imbert
,
Lionel Torres
,
Philippe Maurine
Conference papers
lirmm-00861215
v1
|
|
Temperature and Fast Voltage On-Chip Monitoring using Low-Cost Digital Sensors
Lionel Vincent
,
Philippe Maurine
,
Edith Beigné
,
Suzanne Lesecq
,
Julien Mottin
VARI: Workshop on CMOS Variability, Sep 2013, Karlsruhe, Germany
Conference papers
hal-01067982
v1
|
|
Voltage Spikes on the Substrate to Obtain Timing Faults
Karim Tobich
,
Philippe Maurine
,
Pierre-Yvan Liardet
,
Mathieu Lisart
,
Thomas Ordas
Conference papers
lirmm-01096076
v1
|
|
On the use of the EM medium as a fault injection means
Philippe Maurine
,
Amine Dehbaoui
,
François Poucheret
,
Jean-Max Dutertre
,
Bruno Robisson
et al.
CryptArchi: Cryptographic Architectures, Jun 2012, St-Etienne, France
Conference papers
emse-00742707
v1
|
|
Embedding Statistical Tests for On-Chip Dynamic Voltage and Temperature Monitoring
Philippe Maurine
,
Lionel Vincent
,
Suzanne Lesecq
,
Edith Beigné
DAC: Design Automation Conference, Jun 2012, San Francisco, CA, United States. pp.994-999
Conference papers
lirmm-00762020
v1
|
|
Techniques for EM Fault Injection: Equipments and Experimental Results
Philippe Maurine
FDTC'2012: Fault Diagnosis and Tolerance in Cryptography, Sep 2012, Lewen, Belgium. pp.003-004
Conference papers
lirmm-00761778
v1
|
|
Countermeasures against EM Analysis
Paolo Maistri
,
Sébastien Tiran
,
Amine Dehbaoui
,
Philippe Maurine
,
Jean-Max Dutertre
10th CryptArchi Workshop - St-Etienne Goutelas 2012, Jun 2012, Saint-Etienne, France
Conference papers
emse-01130646
v1
|
|
Amplitude Demodulation-Based EM Analysis of Different RSA Implementations
Philippe Maurine
,
Guilherme Perin
,
Lionel Torres
,
Pascal Benoit
Conference papers
lirmm-00762023
v1
|
|
Electromagnetic Attacks on Ring Oscillator-Based True Random Number Generator
Pierre Bayon
,
Lilian Bossuet
,
Alain Aubert
,
Viktor Fischer
,
François Poucheret
et al.
CryptArchi: Cryptographic Architectures, Jun 2012, Saint-Etienne, France
Conference papers
ujm-00712545
v1
|
|
Yet Another Fault Injection Technique : by Forward Body Biasing Injection
Philippe Maurine
,
Karim Tobich
,
Thomas Ordas
,
Pierre Yvan Liardet
YACC'2012: Yet Another Conference on Cryptography, Sep 2012, Porquerolles Island, France
Conference papers
lirmm-00762035
v1
|
|
Statistical Cells Timing Metrics Characterization
Nadine Azemard
,
Zeqin Wu
,
Philippe Maurine
,
Gilles R. Ducharme
FTFC: Faible Tension - Faible Consommation, Jun 2012, Paris, France
Conference papers
lirmm-00762131
v1
|
|
SECNUM: an Open Characterizing Platform for Integrated Circuits
Morgan Bourrée
,
Florent Bruguier
,
Lyonel Barthe
,
Pascal Benoit
,
Philippe Maurine
et al.
European Workshop on Microelectronics Education (EWME), May 2012, Grenoble, France
Conference papers
hal-01139176
v1
|
|
Contactless Electromagnetic Active Attack on Ring Oscillator Based True Random Number Generator
Pierre Bayon
,
Lilian Bossuet
,
Alain Aubert
,
Viktor Fischer
,
François Poucheret
et al.
Conference papers
ujm-00699618
v1
|
|
SCA with Magnitude Squared Coherence
Philippe Maurine
,
Sébastien Tiran
Conference papers
lirmm-00762038
v1
|
|
Local Condition Monitoring in Integrated Circuits Using a Set of Kolmogorov-Smirnov Tests
Philippe Maurine
,
Lionel Vincent
,
Suzanne Lesecq
,
Edith Beigné
MSC'2012: Multi-conference on Systems and Control, Oct 2012, Dubrovnik, Croatia. pp.001-010
Conference papers
lirmm-00762045
v1
|
|
Characterizing Statistical Cells Timing Metrics with Semi-Monte-Carlo Method
Nadine Azemard
,
Zeqin Wu
,
Philippe Maurine
,
Gilles R. Ducharme
VLSI-SoC: Very Large Scale Integration - System-on-Chip, Oct 2011, Hong-Kong, China
Conference papers
lirmm-00617606
v1
|
|
A Fully Integrated 32 nm MultiProbe for Dynamic PVT Measurements within Complex Digital SoC
Lionel Vincent
,
Edith Beigné
,
Laurent Alacoque
,
Suzanne Lesecq
,
Catherine Bour
et al.
VARI: International Workshop on CMOS Variability, May 2011, Grenoble, France
Conference papers
hal-01067989
v1
|
|
Local ElectroMagnetic Coupling with CMOS Integrated Circuits
François Poucheret
,
Laurent Chusseau
,
Bruno Robisson
,
Philippe Maurine
8th International Workshop on Electromagnetic Compatibility of Integrated Circuits (EMC COMPO), 2011, Dubrovnik, Croatia. pp.137-141
Conference papers
hal-01904161
v1
|
|
Sondes de champ proche pour l'injection de fautes
Rachid Omarouayache
,
Jérémy Raoult
,
Sylvie Jarrix
,
Philippe Maurine
,
Laurent Chusseau
Journée "Antenne de Champ Proche'' du GDR Ondes, 2011, Paris, France
Conference papers
hal-01904165
v1
|
|
Statistical Timing Characterization of Standard Cells with Semi-Monte-Carlo Method
Nadine Azemard
,
Zeqin Wu
,
Philippe Maurine
,
Gilles R. Ducharme
VARI: Workshop on CMOS Variaility, May 2011, Grenoble, France
Conference papers
lirmm-00617593
v1
|
|
A Secure D Flip-Flop against Side Channel Attacks
Bruno Vaquie
,
Sébastien Tiran
,
Philippe Maurine
Conference papers
istex
lirmm-00762027
v1
|
|
Local EM perturbations into CMOS ring oscillator
François Poucheret
,
Karim Tobich
,
Mathieu Lisart
,
Laurent Chusseau
,
Philippe Maurine
5th International Conference on Electromagnetic Near-Field Characterization and Imaging (ICONIC), Nov 2011, Rouen, France
Conference papers
hal-01904164
v1
|
|
Local and Direct Power Injection on CMOS Integrated Circuits
Philippe Maurine
,
François Poucheret
,
Karim Tobich
,
Mathieu Lisart
,
Bruno Robisson
et al.
FDTC'2011: Fault Diagnosis and Tolerance in Cryptography, Sep 2011, Nara, Japan. pp.100-104, ⟨10.1109/FDTC.2011.18⟩
Conference papers
lirmm-00607868
v1
|
|
Spatial EM Jamming: a Countermeasure Against EM Analysis ?
François Poucheret
,
Lyonel Barthe
,
Pascal Benoit
,
Lionel Torres
,
Philippe Maurine
et al.
VLSI-SoC'10: 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, Madrid, Spain. pp.105-110
Conference papers
lirmm-00544358
v1
|
|
Modeling Time Domain Magnetic Emissions of ICs
Victor Lomné
,
Philippe Maurine
,
Lionel Torres
,
Thomas Ordas
,
Mathieu Lisart
et al.
Conference papers
lirmm-00762033
v1
|
|
Voltage Scaling and Body Biasing Methodology for High Performance Hardwired LDPC
Nabila Moubdi
,
Philippe Maurine
,
Nadine Azemard
,
Robin M. Wilson
,
Sylvain Engels
Conference papers
lirmm-00546316
v1
|
|
On-Chip Process Variability Monitoring
Nabila Moubdi
,
Philippe Maurine
,
Robin M. Wilson
,
Nadine Azemard
,
Vincent Dumettier
et al.
VARI: Workshop on CMOS Variability, May 2010, Montpellier, France
Conference papers
lirmm-00546337
v1
|
|
Computing Delay Correlations in SSTA
Zeqin Wu
,
Philippe Maurine
,
Nadine Azemard
,
Gilles R. Ducharme
ICICDT: International Conference on Integrated Circuit Design & Technology, Jun 2010, Grenoble, France. pp.130-133, ⟨10.1109/ICICDT.2010.5510277⟩
Conference papers
lirmm-00546301
v1
|
|
Incoherence Analysis and its Application to Time Domain EM Analysis of Secure Circuits
Philippe Maurine
,
Amine Dehbaoui
,
Thomas Ordas
,
Victor Lomné
,
Lionel Torres
et al.
Conference papers
lirmm-00607894
v1
|
|
SSTA with Cell-to-Cell Delay Correlations
Zeqin Wu
,
Philippe Maurine
,
Nadine Azemard
,
Gilles R. Ducharme
VARI: Workshop on CMOS Variability, May 2010, Montpellier, France
Conference papers
lirmm-00546322
v1
|
|
SSTA with Delay Correlations
Zeqin Wu
,
Philippe Maurine
,
Nadine Azemard
,
Gilles R. Ducharme
Conference papers
lirmm-00504882
v1
|
|
Differential Power Analysis Enhancement with Statistical Preprocessing
Victor Lomné
,
Amine Dehbaoui
,
Philippe Maurine
,
Lionel Torres
,
Michel Robert
Conference papers
lirmm-00548738
v1
|
|
Product On-Chip Process Compensation for Low Power and Yield Enhancement
Nabila Moubdi
,
Philippe Maurine
,
Robin M. Wilson
,
Nadine Azemard
,
Vincent Dumettier
et al.
Conference papers
istex
lirmm-00433504
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Fingerprinting Hardware Security Module Using ICs Radiations
Lionel Torres
,
Victor Lomné
,
Philippe Maurine
,
Amine Dehbaoui
EMC Compo 2009 - 7th International Workshop on Electromagnetic Compatibility of Integrated Circuits, Nov 2009, Toulouse, France
Conference papers
lirmm-00433331
v1
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Interpretation of SSTA Results
Zeqin Wu
,
Nadine Azemard
,
Philippe Maurine
,
Gilles R. Ducharme
FTFC: Faible Tension - Faible Consommation, Jun 2009, Neuchâtel, Switzerland
Conference papers
lirmm-00374060
v1
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Evaluation of Countermeasures against Electromagnetic Analysis
Thomas Ordas
,
Ali Alaeldine
,
Philippe Maurine
,
Richard Perdriau
,
Lionel Torres
et al.
Conference papers
hal-01271857
v1
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Digital Timing Slack Monitors and their Specific Insertion Flow for Adaptive Compensation of Variabilities
Bettina Rebaud
,
Marc Belleville
,
Edith Beigné
,
Christian Bernard
,
Michel Robert
et al.
Conference papers
istex
lirmm-00433462
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Un nouveau système d'instrumentation en ligne pour la caractérisation et l'adaptation dynamique aux variations
Bettina Rebaud
,
Marc Belleville
,
Edith Beigné
,
Michel Robert
,
Philippe Maurine
et al.
FTFC: Faible Tension - Faible Consommation, Jun 2009, Neuchâtel, Suisse
Conference papers
lirmm-00404810
v1
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An Innovative Timing Slack Monitor for Variation Tolerant Circuits
Bettina Rebaud
,
Marc Belleville
,
Edith Beigné
,
Michel Robert
,
Philippe Maurine
et al.
Conference papers
lirmm-00371174
v1
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On-Chip Process Variability Monitoring
Nabila Moubdi
,
Robin M. Wilson
,
Sylvain Engels
,
Nadine Azemard
,
Philippe Maurine
DATE: Design, Automation and Test in Europe, Apr 2009, Nice, France
Conference papers
lirmm-00374368
v1
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Electromagnetic analyses of secure circuits: Results on FPGA & ASIC
Philippe Maurine
MARITE : Centre d'ELectronique de l'Armement (CELAR), France
Conference papers
lirmm-00407014
v1
|
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Assessment of the Immunity of Unshielded Multicore Integrated Circuits to Near Field Injection
Ali Alaeldine
,
Thomas Ordas
,
Richard Perdriau
,
Philippe Maurine
,
Mohamed Ramdani
et al.
International Zurich Symposium on Electromagnetic Compatibility, France. pp.361-364
Conference papers
lirmm-00394411
v1
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Interpreting SSTA Results with Correlation
Zeqin Wu
,
Philippe Maurine
,
Nadine Azemard
,
Gilles R. Ducharme
Conference papers
istex
lirmm-00433505
v1
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Evaluation on FPGA of Triple Rail Logic Robustness Against DPA and DEMA
Victor Lomné
,
Philippe Maurine
,
Lionel Torres
,
Michel Robert
,
Rafael Soares
et al.
Conference papers
lirmm-00372847
v1
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Etude de l'effet du boîtier sur l'immunité en champ proche des circuits intégrés
Ali Alaeldine
,
Thomas Ordas
,
Richard Perdriau
,
Philippe Maurine
,
Mohamed Ramdani
et al.
Telecom 2009 & 6èmes JFMMA, Mar 2009, Agadir, Maroc. 4 p
Conference papers
hal-00522766
v1
|
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Enhancing Electromagnetic Attacks using Spectral Coherence based Cartography
Amine Dehbaoui
,
Victor Lomné
,
Philippe Maurine
,
Lionel Torres
,
Michel Robert
VLSI-SoC 2009 - 17th IFIP International Conference on Very Large Scale Integration, Oct 2009, Florianopolis, Brazil. pp.11-16, ⟨10.1109/VLSISOC.2009.6041323⟩
Conference papers
lirmm-00429342
v1
|
|
On-Chip Timing Slack Monitoring
Bettina Rebaud
,
Marc Belleville
,
Edith Beigné
,
Michel Robert
,
Philippe Maurine
et al.
Conference papers
lirmm-00429350
v1
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|
Étude des violations de temps d'établissement et de maintien dues aux variations du processus de fabrication dans un opérateur arithmétique
Bettina Rebaud
,
Zeqin Wu
,
Marc Belleville
,
Christian Bernard
,
Michel Robert
et al.
JNRDM 2008 - 11e Journées Nationales du Réseau Doctoral de Microélectronique, May 2008, Bordeaux, France
Conference papers
lirmm-00281175
v2
|
|
SSTA with Correlations Considering input Slope and Output Load Variations
Zeqin Wu
,
Philippe Maurine
,
Nadine Azemard
,
Gilles R. Ducharme
VLSI-SoC: Very Large Scale Integration - System-on-Chip, Oct 2008, Rhodes Island, Greece. pp.164-167
Conference papers
lirmm-00332757
v1
|
|
Prototyping Secure Triple Track Logic (STTL) Robustness Against DPA & DEMA on FPGA
Victor Lomné
,
Rafael A. Soares
,
Thomas Ordas
,
Philippe Maurine
,
Lionel Torres
et al.
CryptArchi: Cryptographic Architectures, Jun 2008, Tregastel, France
Conference papers
lirmm-00373539
v1
|
|
Technological countermeasures for IC protection against EM Analysis
Thomas Ordas
,
M. Lisart
,
Lionel Torres
,
Philippe Maurine
PAca Security Trends In embedded Security, Gardanne, France
Conference papers
lirmm-00407011
v1
|
|
Triple Rail Logic Robustness against DPA
Victor Lomné
,
Thomas Ordas
,
Philippe Maurine
,
Lionel Torres
,
Michel Robert
et al.
ReConFig 2008 - International Conference on Reconfigurable Computing and FPGAs, Dec 2008, Cancun, Mexico. pp.415-420, ⟨10.1109/ReConFig.2008.75⟩
Conference papers
lirmm-00350573
v1
|
|
Near-field Mapping System to Scan in Time Domain the Magnetic Emissions of Integrated Circuits
Thomas Ordas
,
Mathieu Lisart
,
Etienne Sicard
,
Philippe Maurine
,
Lionel Torres
Conference papers
lirmm-00394395
v1
|
|
Evaluating the Robustness of Secure Triple Track Logic Through Prototyping
Rafael A. Soares
,
Ney Calazans
,
Victor Lomné
,
Philippe Maurine
,
Lionel Torres
et al.
SBCCI'08: Symposium on Integrated Circuits and Systems Design, Sep 2008, Gramado, Brazil, France. pp.193-198, ⟨10.1145/1404371.1404425⟩
Conference papers
lirmm-00373516
v1
|
|
Conditional Moments based SSTA Considering Switching Process Induced Correlations
Zeqin Wu
,
Philippe Maurine
,
Gilles R. Ducharme
,
Nadine Azemard
DCIS: Design of Circuits and Integrated Systems, Nov 2008, Grenoble, France. pp.70-77
Conference papers
lirmm-00340221
v1
|
|
A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM
Michael Yap San Min
,
Philippe Maurine
,
Magali Bastian Hage-Hassan
,
Michel Robert
DELTA 2008 - 4th IEEE International Symposium on Electronic Design, Test and Applications, Jan 2008, Hong Kong, China. pp.107-110, ⟨10.1109/DELTA.2008.72⟩
Conference papers
lirmm-00243966
v1
|
|
SSTA Considering Effects of Structure Correlations, Input Slope and Output Load Variations
Zeqin Wu
,
Philippe Maurine
,
Gilles R. Ducharme
,
Nadine Azemard
FTFC: Faible Tension - Faible Consommation, May 2008, Louvain-la-Neuve, Belgium. pp.39-43
Conference papers
lirmm-00288537
v1
|
|
Impact de la variabilité des caractéristiques temporelles des cellules combinatoires et séquentielles sur un opérateur numérique
Bettina Rebaud
,
Marc Belleville
,
Christian Bernard
,
Zeqin Wu
,
Michel Robert
et al.
FTFC: Faible Tension - Faible Consommation, May 2008, Louvain-La-Neuve, Belgique
Conference papers
lirmm-00283731
v1
|
|
Setup and Hold Timing Violations Induced by Process Variations, in a Digital Multiplier
Bettina Rebaud
,
Marc Belleville
,
Christian Bernard
,
Zeqin Wu
,
Michel Robert
et al.
ISVLSI: International Symposium on Very Large Scale Integration, Apr 2008, Montpellier, France. pp.316-321, ⟨10.1109/ISVLSI.2008.70⟩
Conference papers
lirmm-00280809
v1
|
|
SSTA Considering Switching Process Induced Correlations
Zeqin Wu
,
Philippe Maurine
,
Nadine Azemard
,
Gilles R. Ducharme
Conference papers
lirmm-00340564
v1
|
|
SSTA with Structure Correlations Considering input Slope and Output Load Variations
Zeqin Wu
,
Philippe Maurine
,
Nadine Azemard
,
Gilles R. Ducharme
GDR SOC-SIP, Jun 2008, Paris, France. pp.3
Conference papers
lirmm-00340231
v1
|
|
Statistical Sizing of an eSRAM Dummy Bitline Driver for Read Margin Improvement in the Presence of Variability Aspects
Michael Yap San Min
,
Philippe Maurine
,
Magali Bastian Hage-Hassan
,
Michel Robert
ISVLSI'08: IEEE Computer Society Annual Symposium on VLSI, Apr 2008, Montpellier, France, pp.310-315
Conference papers
lirmm-00280716
v1
|
|
Process Variability Considerations in the Design of an eSRAM
Michael Yap San Min
,
Philippe Maurine
,
Michel Robert
,
Magali Bastian Hage-Hassan
MTDT 2007 - IEEE International Workshop on Memory Technology, Design and Testing, Dec 2007, Taipei, Taiwan. pp.23-26, ⟨10.1109/MTDT.2007.4547609⟩
Conference papers
lirmm-00275258
v1
|
|
A Simple Statistical Timing Analysis Flow and Its Application to Timing Margin Evaluation
Vincent Migairou
,
Robin Wilson
,
Sylvain Engels
,
Zeqin Wu
,
Nadine Azemard
et al.
FTFC: Faible Tension - Faible Consommation, May 2007, Paris, France. pp.19-25
Conference papers
lirmm-00178454
v1
|
|
Improvement of Dual Rail Logic as a Countermeasure Against DPA
Hanitriniaina Razafindraibe
,
Michel Robert
,
Philippe Maurine
VLSI-SoC 2007 - IFIP International Conference on Very Large Scale Integration, Oct 2007, Atlanta, GA, United States. pp.270-275, ⟨10.1109/VLSISOC.2007.4402510⟩
Conference papers
lirmm-00186174
v1
|
|
Méthodologie d'estimation de l'influence de la variabilité sur un opérateur numérique
Bettina Rebaud
,
Marc Belleville
,
Christian Bernard
,
Michel Robert
,
Philippe Maurine
FTFC 2007 - 6e journées d'Etudes Faible Tension Faible Consommation, May 2007, Paris, France
Conference papers
lirmm-00204621
v1
|
|
Process Variabilities and Performances in a 90nm embedded SRAM
Michael Yap San Min
,
Philippe Maurine
,
Magali Bastian Hage-Hassan
,
Michel Robert
IEEE International Integrated Reliability Workshop, Oct 2007, pp.050-055
Conference papers
lirmm-00198373
v1
|
|
A Model of DPA Syndrome and Its Application to the Identification of Leaking Gates
Alin Razafindraibe
,
Philippe Maurine
Conference papers
istex
lirmm-00175108
v1
|
|
Une Famille d'Additionneurs Asynchrones CMOS Bundled Data à Temps de Calcul Dépendant aux Données
Robin Perrot
,
Nadine Azemard
,
Philippe Maurine
FTFC: Faible Tension - Faible Consommation, May 2007, Paris, France. pp.75-80
Conference papers
lirmm-00178466
v1
|
|
A Simple Statistical Timing Analysis Flow and its Application to Timing Margin Evaluation
Vincent Migairou
,
Robin Wilson
,
Sylvain Engels
,
Zeqin Wu
,
Nadine Azemard
et al.
Conference papers
istex
lirmm-00175076
v1
|
|
Temperature and Voltage Aware Timing Analysis: Application to Voltage Drops
Benoit Lasbouygues
,
Robin M. Wilson
,
Nadine Azemard
,
Philippe Maurine
Conference papers
lirmm-00178525
v1
|
|
Analysis and Improvement of Dual Rail Logic as a Countermeasure Against DPA
Alin Razafindraibe
,
Michel Robert
,
Philippe Maurine
Conference papers
istex
lirmm-00175100
v1
|
|
Variabilité de Process et Performances des Mémoires SRAM Embarquées
Michael Yap San Min
,
Philippe Maurine
,
Magali Bastian Hage-Hassan
,
Michel Robert
FTFC'07: 6èmes Journées d'Etudes Faible Tension Faible Consommation, May 2007, Paris, France, pp.7-11
Conference papers
lirmm-00178319
v1
|
|
Une Famille d'Additionneur Asynchrones CMOS à Temps de Calcul Dépendant de Données
Robin Perrot
,
Nadine Azemard
,
Philippe Maurine
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, May 2006, Rennes, France. pp.469-472
Conference papers
lirmm-00102842
v1
|
|
Request-Skip Adders: CMOS Standard Cell Data Dependent Adders
Robin Perrot
,
Nadine Azemard
,
Philippe Maurine
Conference papers
lirmm-00130195
v1
|
|
Security Evaluation of Dual Rail Logic Against DPA Attacks
Hanitriniaina Razafindraibe
,
Philippe Maurine
,
Michel Robert
,
Marc Renaudin
VLSI-SoC 2006 - 14th IFIP International Conference on Very Large Scale Integration, Oct 2006, Nice, France. pp.181-186, ⟨10.1109/VLSISOC.2006.313230⟩
Conference papers
lirmm-00109692
v1
|
|
Statistical Characterization of Library Timing Performance
Vincent Migairou
,
Robin P. Wilson
,
Sylvain Engels
,
Nadine Azemard
,
Philippe Maurine
PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2006, Montpellier, France. pp.468-476, ⟨10.1007/11847083_45⟩
Conference papers
istex
lirmm-00093233
v1
|
|
Circuit Performance Optimization under Delay Constraints
Alexandre Verle
,
Alexis Landrault
,
Philippe Maurine
,
Nadine Azemard
DCIS: Design of Circuits and Integrated Systems, Nov 2006, Barcelona, Spain
Conference papers
lirmm-00117119
v1
|
|
Timing Analysis in Presence of Voltage Drops and Temperature Gradients
Benoit Lasbouygues
,
Robin M. Wilson
,
Nadine Azemard
,
Philippe Maurine
TAU: Timing Issues in the Specification and Synthesis of Digital Systems, Feb 2006, San Jose, CA, United States. pp.28-34
Conference papers
lirmm-00106705
v1
|
|
Exploration of the Area-Latency Tradeoff of Asynchronous CMOS data Dependent Adders
Robin Perrot
,
Philippe Maurine
,
Nadine Azemard
DCIS: Design of Circuits and Integrated Systems, Nov 2006, Barcelona, Spain
Conference papers
lirmm-00117102
v1
|
|
Timing Analysis in Presence of Supply Voltage and Temperature Variations
Benoit Lasbouygues
,
Robin M. Wilson
,
Nadine Azemard
,
Philippe Maurine
Conference papers
lirmm-00102760
v1
|
|
Circuit Sizing Method under Delay Constraint
Alexandre Verle
,
Alexis Landrault
,
Philippe Maurine
,
Nadine Azemard
Conference papers
lirmm-00106911
v1
|
|
Optimization Protocol Based on Low Power Metrics
Alexandre Verle
,
Alexis Landrault
,
Philippe Maurine
,
Nadine Azemard
IWLS: International Workshop on Logic Synthesis, Jun 2005, Lake Arrowhead Resort, CA, United States. pp.288-293
Conference papers
lirmm-00106018
v1
|
|
Circuit Optimization Based on Speed Indicators
Alexandre Verle
,
Alexis Landrault
,
Philippe Maurine
,
Nadine Azemard
Conference papers
lirmm-00106439
v1
|
|
Design of Compact Dual Rail Asynchronous Primitives
Alin Razafindraibe
,
Michel Robert
,
Philippe Maurine
DCIS 2005 - 20th Conference on Design of Circuits and Integrated Systems, 2005, Lisbonne, Portugal
Conference papers
lirmm-00106434
v1
|
|
A Method to Design Compact Dual-rail Asynchronous Primitives
Alin Razafindraibe
,
Michel Robert
,
Marc Renaudin
,
Philippe Maurine
PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2005, Leuven, Belgium. pp.571-580, ⟨10.1007/11556930_58⟩
Conference papers
istex
hal-00105846
v1
|
|
Path Optimization Protocol Based on Speed Low Power Metrics
Alexandre Verle
,
Alexis Landrault
,
Philippe Maurine
,
Nadine Azemard
Conference papers
lirmm-00106428
v1
|
|
Temperature Dependency in UDSM Process
Benoit Lasbouygues
,
Robin M. Wilson
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2005, Leuven, Belgium. pp.693-703, ⟨10.1007/11556930_71⟩
Conference papers
istex
lirmm-00106077
v1
|
|
Asynchronous Dual rail Cells to Secure Cryptosystem Against Side Channel Attacks
Alin Razafindraibe
,
Michel Robert
,
Marc Renaudin
,
Philippe Maurine
SAME'05: Sophia-Antipolis Forum on MicroElectronics, Oct 2005, Sophia-Antipolis
Conference papers
lirmm-00106539
v1
|
|
Low Power Oriented CMOS Circuit Optimization Protocol
Alexandre Verle
,
Xavier Michel
,
Nadine Azemard
,
Philippe Maurine
,
Daniel Auvergne
DATE 2005 - 8th Design, Automation and Test in Europe Conference and Exhibition, Mar 2005, Munich, Germany. pp.640-645, ⟨10.1109/DATE.2005.202⟩
Conference papers
lirmm-00106452
v1
|
|
Additionneurs RCA Data Dependent Micropipelines
Robin Perrot
,
Nadine Azemard
,
Philippe Maurine
FTFC: Faible Tension - Faible Consommation, May 2005, Paris, France. pp.183-188
Conference papers
lirmm-00106005
v1
|
|
Méthode de Conception de Primitives Asynchrones Double Rail
Alin Razafindraibe
,
Michel Robert
,
Philippe Maurine
FTFC'05 : 5èmes Journées d'Etudes Francophones Faible Tension - Faible Consommation, May 2005, Paris, France, pp.23-27
Conference papers
lirmm-00106003
v1
|
|
Protocole d'Optimisation de Circuit CMOS Orienté Basse Puissance
Alexandre Verle
,
Xavier Michel
,
Philippe Maurine
,
Nadine Azemard
FTFC: Faible Tension - Faible Consommation, May 2005, Paris, France. pp.17-22
Conference papers
lirmm-00106002
v1
|
|
Speed Indicators for Circuit Optimization
Alexandre Verle
,
Alexis Landrault
,
Philippe Maurine
,
Nadine Azemard
PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2005, Leuven, Belgium. pp.618-628, ⟨10.1007/11556930_63⟩
Conference papers
istex
lirmm-00106076
v1
|
|
Ripple Carry Adder for Micropipeline Circuits
Robin Perrot
,
Nadine Azemard
,
Philippe Maurine
DCIS 2005 - 20th Conference on Design of Circuits and Integrated Systems, Nov 2005, Lisbonne, Portugal
Conference papers
lirmm-00106075
v1
|
|
La Technologie Asynchrone QDI pour la Sécurité des Cryptosystèmes
Alin Razafindraibe
,
Philippe Maurine
,
Michel Robert
JNRDM 2005 - 8e Journées Nationales du Réseau Doctoral de Microélectronique, May 2005, Paris, France. pp.461-463
Conference papers
lirmm-00106530
v1
|
|
Synthèse Physique et Optimisation des Performances au Niveau Transistor
Alexis Landrault
,
Alexandre Verle
,
Philippe Maurine
,
Nadine Azemard
FTFC: Faible Tension - Faible Consommation, May 2005, Paris, France. pp.91-95
Conference papers
lirmm-00106004
v1
|
|
Design Optimization with Automated Cell Generation
Alexis Landrault
,
Nadine Azemard
,
Philippe Maurine
,
Michel Robert
,
Daniel Auvergne
Conference papers
istex
lirmm-00108894
v1
|
|
RC on-chip interconnect Performance revisited
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
DCIS: Design of Circuits and Integrated Systems, Nov 2004, Bordeaux, France. pp.809-814
Conference papers
lirmm-00108934
v1
|
|
Definition of P/N Width Ratio for CMOS Standard Cell Library
Alexandre Verle
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
DCIS: Design of Circuits and Integrated Systems, Nov 2004, Bordeaux, France. pp.769-773
Conference papers
lirmm-00108933
v1
|
|
Physical Extension of the Logical Effort Model
Benoit Lasbouygues
,
Robin M. Wilson
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
Conference papers
istex
lirmm-00108895
v1
|
|
Temperature Dependence in Low Power CMOS UDSM Process
Benoit Lasbouygues
,
Robin M. Wilson
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
Conference papers
istex
lirmm-00108893
v1
|
|
Performance Metric Based Optimization Protocol
Xavier Michel
,
Alexandre Verle
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
Conference papers
istex
lirmm-00108892
v1
|
|
Conception et Modélisation de Briques Elémentaires CMOS
Guy Cathébras
,
S. Dussausay
,
Michel Robert
,
Philippe Maurine
CNFM'04 : 8ème Journées Pédagogiques du Comité National de Formation en Microélectronique, 2004, Saint-Malo, France. pp.35-37
Conference papers
lirmm-00108672
v1
|
|
Secured Structures for Secured Asynchronous QDI Circuits
Alin Razafindraibe
,
Michel Robert
,
Bertrand Folco
,
Philippe Maurine
,
Ghislain Fraidy Bouesse
et al.
DCIS: Design of Circuits and Integrated Systems, Nov 2004, Bordeaux, France
Conference papers
hal-01393250
v1
|
|
Automatic Layout Synthesis Based Performance Optimization
Alexis Landrault
,
Nadine Azemard
,
Philippe Maurine
,
Michel Robert
,
Daniel Auvergne
IWLS: International Workshop on Logic Synthesis, Jun 2004, Temecula, CA, United States. pp.80-85
Conference papers
lirmm-00108654
v1
|
|
Delay Bound Based CMOS Gate Sizing Technique
Alexandre Verle
,
Xavier Michel
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
Conference papers
lirmm-00108856
v1
|
|
Optimization Protocol Based on Performance Metric
Xavier Michel
,
Alexandre Verle
,
Nadine Azemard
,
Philippe Maurine
,
Daniel Auvergne
DCIS 2004 - 19th International Conference on Design of Circuits and Integrated Systems, Nov 2004, Bordeaux, France. pp.964-968
Conference papers
lirmm-00108935
v1
|
|
Static Implementation of QDI Asynchronous Primitives
Philippe Maurine
,
Jean-Baptiste Rigaud
,
Ghislain Fraidy Bouesse
,
Gilles Sicard
,
Marc Renaudin
Conference papers
istex
lirmm-00269567
v1
|
|
Représentation Unifiée des Performances Temporelles d'une Bibliothèque de Cellules Standards
Benoit Lasbouygues
,
J. Schindler
,
Sylvain Engels
,
Philippe Maurine
,
Nadine Azemard
et al.
FTFC: Faible Tension - Faible Consommation, May 2003, Paris, France. pp.119-124
Conference papers
lirmm-00269519
v1
|
|
CMOS Gate Sizing under Delay Constraint
Alexandre Verle
,
Xavier Michel
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
Conference papers
istex
lirmm-00244021
v1
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TAL : Une Bibliothèque de Cellules pour le Design de Circuits Asynchrones QDI
Philippe Maurine
,
Jean-Baptiste Rigaud
,
Ghislain Fraidy Bouesse
,
Gilles Sicard
,
Marc Renaudin
FTFC: Faible Tension - Faible Consommation, May 2003, Paris, France. pp.41-49
Conference papers
lirmm-00269521
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Dimensionnement de Portes CMOS Sous Contrainte de Délai
Alexandre Verle
,
Xavier Michel
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
FTFC: Faible Tension - Faible Consommation, May 2003, Paris, France. pp.111-117
Conference papers
lirmm-00269522
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Continuous Representation of the Performance of a CMOS Library
Benoit Lasbouygues
,
J. Schindler
,
Sylvain Engels
,
Philippe Maurine
,
Xavier Michel
et al.
Conference papers
lirmm-00239459
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Metric Definition for Circuit Speed Optimization
Xavier Michel
,
Alexandre Verle
,
Nadine Azemard
,
Philippe Maurine
,
Daniel Auvergne
PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2003, Turin, Italy. pp.451-460
Conference papers
lirmm-00269568
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Metric Definition for Circuit Speed Optimization
Xavier Michel
,
Alexandre Verle
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
IWLS: International Workshop on Logic Synthesis, May 2003, Laguna Beach, CA, United States
Conference papers
lirmm-00269689
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Timing Performance Representation of a CMOS Standard Cell Library
Benoit Lasbouygues
,
J. Schindler
,
Sylvain Engels
,
Philippe Maurine
,
Xavier Michel
et al.
DCIS: Design of Circuits and Integrated Systems, Nov 2003, Ciudad Real, Spain. pp.83-88
Conference papers
lirmm-00239460
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Définition d'une Métrique d'Insertion de Buffers
Xavier Michel
,
Alexandre Verle
,
Nadine Azemard
,
Philippe Maurine
,
Daniel Auvergne
FTFC: Faible Tension - Faible Consommation, May 2003, Paris, France. pp.131-136
Conference papers
lirmm-00269520
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Gate Speed Improvement at Minimal Power Dissipation
Philippe Maurine
,
Xavier Michel
,
Nadine Azemard
,
Daniel Auvergne
APPCAS: Asia-Pacific Conference on Circuits and Systems, Oct 2002, Denpasar, Bali, pp.278-282
Conference papers
lirmm-00239453
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Metric Definition for Buffer Insertion
Xavier Michel
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
DCIS: Design of Circuits and Integrated Systems, Nov 2002, Santander, Spain. pp.307-312
Conference papers
lirmm-00239458
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Evaluation et Optimisation de Chemins Combinatoires
Xavier Michel
,
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
Colloque du GDR CAO de Circuits et Systèmes Intégrés, May 2002, Paris, France. pp.173-176
Conference papers
lirmm-00269329
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Defining the Maximum Speed of CMOS Gate Library
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
DCIS: Design of Circuits and Integrated Systems, Nov 2002, Santander, Spain. pp.81-86
Conference papers
lirmm-00239455
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Structure Independent Representation of Output Transition Time for CMOS Library
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
Conference papers
istex
lirmm-00244012
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Full Analyttical Model for delay Performance Estimation in Submicron CMOS
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
MIXDES: Mixed Design of Integrated Circuits and Systems, Jun 2001, Zakopane, Poland. pp.355-359
Conference papers
lirmm-00239444
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Deep Submicron Switching Current Modeling for CMOS Logic Output Transition Time Determination
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2001, Yverdon-Les-Bains, Switzerland. pp.5.3.1-5.3.10
Conference papers
lirmm-00244010
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Delay Bound Determination for Timing Closure on CMOS Circuits
Nadine Azemard
,
Michel Aline
,
Philippe Maurine
,
Daniel Auvergne
IWLS: International Workshop on Logic and Synthesis, Jun 2001, Granlibakken Conference Center, United States. pp.96-100
Conference papers
lirmm-00244007
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Performance Indicators for Designing CMOS Logic
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
Conference papers
lirmm-00239446
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Technological Assignment for a Minimal Power Consumption
Philippe Maurine
,
Nadine Azemard
,
Daniel Auvergne
VLSI-SoC: Very Large Scale Integration - System-on-Chip, Dec 2001, Montpellier, France. pp.236-241
Conference papers
lirmm-00239450
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Timing Closure Management based on Delay Bound Determination
Nadine Azemard
,
Michel Aline
,
Philippe Maurine
,
Daniel Auvergne
VLSI-SoC: Very Large Scale Integration - System-on-Chip, Dec 2001, Montpellier, France. pp.430-434
Conference papers
lirmm-00239452
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Switching Current Modeling in CMOS Inverter for Speed and Power Estimation
Philippe Maurine
,
Régis Poirier
,
Nadine Azemard
,
Daniel Auvergne
DCIS: Design of Circuits and Integrated Systems, Nov 2001, Porto, Portugal. pp.618-622
Conference papers
lirmm-00239448
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