César Fuguet

32
Documents

Publications

Publications

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Hardware-software co-design for supporting shared distributed virtual memory

Eduardo Tomasi Ribeiro , César Fuguet Tortolero , Christian Fabre , Frédéric Pétrot
CF 2025 - 22nd ACM International Conference on Computing Frontiers: Workshops and Special Sessions, May 2025, Cagliari, Italy. pp.58-61, ⟨10.1145/3706594.3726977⟩
Communication dans un congrès hal-05163673 v1
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Open source heterogeneous Chiplet-based Computing Architectures

Adrian Evans , César Fuguet Tortolero , Davy Million
ICCAD 2024 - 2024 ACM/IEEE International Conference on Computer-Aided Design, Oct 2024, New Jersey, United States
Communication dans un congrès cea-05026001 v1
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Will 4K pages last forever ?

Frédéric Pétrot , Eduardo Tomasi Ribeiro , César Fuguet Tortolero , Christian Fabre
22nd International Forum on MPSoC (MPSoC 2024), Jul 2024, Kanazawa, Japan
Communication dans un congrès hal-04795087 v1
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Breaking the Memory Wall with a Flexible Open-Source L1 Data-Cache

Davy Million , Noelia Oliete-Escuín , César Fuguet
DATE 2024, Mar 2024, Valencia, Spain
Communication dans un congrès hal-04600058 v1
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Preliminary integration of vortex within the OpenPiton platform

Davy Million , César Fuguet , Adrian Evans , Jonathan Balkind , Frédéric Pétrot
2024 Vortex Workshop co-located with MICRO 2024, Nov 2024, Austin, United States
Communication dans un congrès cea-04772235 v1
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Page size exploration for RISC-V systems: the case for HPC

Eduardo Tomasi Ribeiro , César Fuguet , Christian Fabre , Frédéric Pétrot
35th International Workshop on Rapid System Prototyping (RSP), IEEE, Nov 2024, Raleigh (North Carolina), United States
Communication dans un congrès hal-04932966 v1
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HPDcache: Open-source high-performance L1 data cache for RISC-V cores

César Fuguet
20th ACM International Conference on Computing Frontiers, May 2023, Bologne, Italy. pp.385, ⟨10.1145/3587135.3591413⟩
Communication dans un congrès cea-04110679 v1

Accelerating Variants of the Conjugate Gradient with the Variable Precision Processor

Yves Durand , Eric Guthmuller , Cesar Fuguet , Jerome Fereyre , Andrea Bocco et al.
2022 IEEE 29th Symposium on Computer Arithmetic (ARITH), Sep 2022, Lyon, France. pp.51-57, ⟨10.1109/ARITH54963.2022.00017⟩
Communication dans un congrès hal-04392747 v1
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Accelerating Variants of the Conjugate Gradient with the Variable Precision Processor

Yves Durand , Eric Guthmuller , César Fuguet , Jérome Fereyre , Andrea Bocco et al.
2022 IEEE Symposium on Computer Arithmetic, Sep 2022, Lyon, France. ⟨10.1109/ARITH54963.2022.00017⟩
Communication dans un congrès cea-04487789 v1
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Storage class memory with computing row buffer: A design space exploration

Valentin Egloff , Jean-Philippe Noel , Maha Kooli , Bastien Giraud , Lorenzo Ciampolini et al.
2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), Feb 2021, grenoble, France. pp.1-6, ⟨10.23919/DATE51398.2021.9473992⟩
Communication dans un congrès cea-03605068 v1

A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm 2 Inter-Chiplet Interconnects and 156mW/mm 2 @ 82%-Peak-Efficiency DC-DC Converters

Pascal Vivet , Eric Guthmuller , Yvain Thonnart , Gaël Pillonnet , Guillaume Moritz et al.
2020 IEEE International Solid- State Circuits Conference - (ISSCC), Feb 2020, San Francisco, United States. pp.46-48, ⟨10.1109/ISSCC19947.2020.9062927⟩
Communication dans un congrès hal-02985945 v1

ExaNoDe: Combined Integration of Chiplets on Active Interposer with Bare Dice in a Multi-Chip-Module for Heterogeneous and Scalable High Performance Compute Nodes

P. Martinez , Y. Beilliard , M. Godard , D. Danovitch , D. Drouin et al.
2020 IEEE Symposium on VLSI Technology, Jun 2020, Honolulu, United States. pp.1-2, ⟨10.1109/VLSITechnology18217.2020.9265100⟩
Communication dans un congrès hal-03178715 v1
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POPSTAR: a robust modular optical NoC architecture for chiplet-based 3D integrated systems

Yvain Thonnart , Stephane Bernabe , Jean Charbonnier , Christian Bernard , David Coriat et al.
DATE 2020 - Design, Automation & Test in Europe Conference & Exhibition, Mar 2020, Grenoble, France. pp.1456-1461, ⟨10.23919/DATE48585.2020.9116214⟩
Communication dans un congrès cea-03471376 v1

WAVES: Wavelength Selection for Power-Efficient 2.5D-Integrated Photonic NoCs

Aditya Narayan , Yvain Thonnart , Pascal Vivet , Cesar Fuguet Tortolero , Ayse Coskun
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), Mar 2019, Florence, France. pp.516-521, ⟨10.23919/DATE.2019.8715036⟩
Communication dans un congrès hal-04392763 v1

Active Interposer Technology for Chiplet-Based Advanced 3D System Architectures

Perceval Coudrain , P. Chausse , L. Arnaud , D. Lattard , E. Guthmuller et al.
2019 IEEE 69th Electronic Components and Technology Conference (ECTC), May 2019, Las Vegas, France. pp.569-578, ⟨10.1109/ECTC.2019.00092⟩
Communication dans un congrès hal-04392754 v1

A 29 Gops/Watt 3D-Ready 16-Core Computing Fabric with Scalable Cache Coherent Architecture Using Distributed L2 and Adaptive L3 Caches

E. Guthmuller , C. Fuguet , P. Vivet , C. Bernard , I. Miro-Panades et al.
ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC), Sep 2018, Dresden, Germany. pp.318-321, ⟨10.1109/ESSCIRC.2018.8494275⟩
Communication dans un congrès hal-02985969 v1

Trace-driven exploration of sharing set management strategies for cache coherence in manycores

J. Dumas , E. Guthmuller , C. Fuguet Tortolero , Frédéric Pétrot
15th IEEE International New Circuits and Systems Conference (NEWCAS'17), Jun 2017, Strasbourg, France. pp.77-80
Communication dans un congrès hal-01701046 v1

A Programmable Inbound Transfer Processor for Active Messages in Embedded Multicore Systems

Yves Durand , Christian Bernard , Romain Lemaire , Cesar Fuguet Tortolero , Emilie Garat
2017 Euromicro Conference on Digital System Design (DSD), Aug 2017, Vienna, France. pp.192-197, ⟨10.1109/DSD.2017.38⟩
Communication dans un congrès hal-04392776 v1

A Method for Fast Evaluation of Sharing Set Management Strategies in Cache Coherence Protocols

J. Dumas , E. Guthmuller , C. Fuguet Tortolero , Frédéric Pétrot
30th International Conference on Architecture of Computing Systems (ARCS 2017), Apr 2017, Vienna, Austria. pp.111-123
Communication dans un congrès hal-01523232 v1
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On Benefits of Modeling the HPDcache in LNT

Zachary Assoumani , César Fuguet , Radu Mateescu , Wendelin Serwe
RISC-V 2025 -RISC-V Summit Europe, May 2025, Paris, France. pp.1-1, 2025
Poster de conférence hal-05106202 v1
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Breaking the memory wall with a flexible open-source L1 Data-cache

Davy Million , Noelia Oliete-Escuín , César Fuguet
DATE 2024 - 2024 Design, Automation and Test in Europe Conference, Mar 2024, Valence, Spain. , 2024
Poster de conférence cea-04600891 v1
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Functional Verification Strategy for an Open-Source High-Performance L1 Data-Cache for RISC-V cores

Tanuj Khandelwal , Ludovic Pion , César Fuguet , Adrian Evans
RISC-V Summit 2023, Jun 2023, Barcelona, Spain
Poster de conférence hal-04392800 v1
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128-bit addresses for the masses (of memory and devices).

Mathieu Bacou , Adam Chader , Chandana Deshpande , Christian Fabre , César Fuguet et al.
HotInfra 2023 - Workshop on Hot Topics in System Infrastructure, Jun 2023, Orlando, United States. 2023
Poster de conférence cea-04487782 v1
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The Variable Precision Processor VXP: preliminary performance results on generic Krylov-based solvers

Yves Durand , Jérome Fereyre , César Fuguet
Colloque Sparse Days 2023, Jun 2023, Toulouse, France. 2023
Poster de conférence cea-04487791 v1
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Towards simulation of an unified address space for 128-bit massively parallel computers

Eduardo Tomasi , César Fuguet , Christian Fabre , Frédéric Pétrot
RISC-V Summit Europe 2023, Jun 2023, Barcelone, Spain.
Poster de conférence hal-04392810 v1

We had 64-bit, yes. What about second 64-bit?

Mathieu Bacou , Adam Chader , Chandana S. Deshpande , Christian Fabre , César Fuguet et al.
RISC-V Summit Europe 2023, Jun 2023, Barcelona, Spain. 2023
Poster de conférence hal-04161612 v1
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Fault-Tolerance Mechanisms for Permanent Failures in a Coherent Shared-Memory Many-Core Architecture

César Fuguet , Alain Greiner
Colloque GDR SoC-SiP, Jun 2014, Paris, France. 2014
Poster de conférence hal-01011990 v1
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Introduction of Fault-Tolerance Mechanisms for Permanent Failures in Coherent Shared-Memory Many-Core Architectures

César Fuguet Tortolero
Distributed, Parallel, and Cluster Computing [cs.DC]. Université Pierre et Marie Curie - Paris VI, 2015. English. ⟨NNT : 2015PA066462⟩
Thèse tel-01292995 v1