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David Novo
75
Documents
Researcher identifiers
david-novo
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0000-0002-5510-4152
- Google Scholar : https://scholar.google.fr/citations?user=9U2rzRQAAAAJ&hl=en&oi=ao
- IdRef : 244276455
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Modeling Rowhammer in the gem5 simulatorConference poster lirmm-03817275v1 |
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Implementation of Rowhammer Effect in gem5Conference poster hal-03284443v1 |
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Approximations in Deep LearningApproximate Computing Techniques - From Component- to Application-Level, pp.467-512, 2022, 978-3-030-94704-0. ⟨10.1007/978-3-030-94705-7_15⟩
Book sections
hal-03494874v1
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Analysis of Finite Word-Length Effects in Fixed-Point SystemsShuvra S. Bhattacharyya. Handbook of Signal Processing Systems, pp.1063-1101, 2019, 978-3-319-91733-7. ⟨10.1007/978-3-319-91734-4_29⟩
Book sections
hal-01941888v1
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Fixed-point refinement of digital signal processing systemsDigitally Enhanced Mixed Signal Systems, Chapter 1, The Institution of Engineering and Technology, pp.1-37, 2019, 978-1-78561-609-9. ⟨10.1049/PBCS040E_ch⟩
Book sections
hal-01941898v1
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Progressive Generation of Canonical Irredundant Sums of Products Using a SAT SolverAndré Inácio Reis; Rolf Drechsler. Advanced Logic Synthesis, Springer, pp.169-188, 2017, 978-3-319-67295-3. ⟨10.1007/978-3-319-67295-3_8⟩
Book sections
lirmm-01712044v1
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Design of a Low Power Pre-synchronization ASIP for Multimode SDR TerminalsEmbedded Computer Systems: Architectures, Modeling, and Simulation, pp.322-332, 2007, ⟨10.1007/978-3-540-73625-7_34⟩
Book sections
lirmm-02089055v1
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Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction- and Data-Level ParallelismIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, pp.12-23, 2006, ⟨10.1007/11847083_2⟩
Book sections
lirmm-02089057v1
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Fixed-point refinement, a guaranteed approach towards energy efficient computing2016
Other publications
hal-01423184v1
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Fixed-point refinement, a guaranteed approach towards energy efficient computing2015
Other publications
hal-01253496v1
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Performance and Energy Impact of Enhanced Cache Replacement Policy on STT-MRAM LLC2021
Preprints, Working Papers, ...
lirmm-03341604v1
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Towards a Flexible and Comprehensive Evaluation Approach for Adressing NVM Integration in Cache Hierarchy2021
Preprints, Working Papers, ...
lirmm-03341602v1
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Emerging NVM Technologies in Main Memory for Energy-Efficient HPC: an Empirical Study2019
Preprints, Working Papers, ...
lirmm-02135043v1
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Deliverable D5.1 – Technical description of the holistic design flow in CONTINUUM[Research Report] Inria Rennes – Bretagne Atlantique; LIRMM (UM, CNRS); Cortus S.A.S. 2019
Reports
lirmm-03168363v1
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