David Novo
Présentation
Publications
Publications
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ADAM: ADAptive microcontroller platform for edge AI systemsRSP 2025 - 36th International Symposium on Rapid System Prototyping, Sep 2025, Taipei, Taiwan |
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EasyDRAM: An FPGA-based Infrastructure for Fast and Accurate End-to-End Evaluation of Emerging DRAM TechniquesDSN 2025 - 55th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, Jun 2025, Naples, Italy. pp.331-344, ⟨10.1109/DSN64029.2025.00042⟩ |
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c2c-gem5: Full System Simulation of Cache-Coherent Chip-to-Chip InterconnectsDATE 2025 - 28th Design, Automation and Test in Europe Conference and Exhibition, Mar 2025, Lyon, France. In press |
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Exploring Cache Policies on FPGA-Accelerated Simulations: Tradeoffs Between Usability and Simulation SpeedRSP 2025 - 36th International Workshop on Rapid System Prototyping, Sep 2025, Taipei, Taiwan. In press, ⟨10.1145/3768617.3770732⟩ |
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Analyzing GPU Energy Consumption in Data Movement and StorageASAP 2024 - IEEE 35th International Conference on Application-specific Systems, Architectures and Processors, Jul 2024, Hong Kong, Hong Kong SAR China. pp.143-151, ⟨10.1109/ASAP61560.2024.00038⟩ |
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Multi-level Analysis of GPU Utilization in ML Training WorkloadsDATE 2024 - 27th Design, Automation and Test in Europe Conference and Exhibition, Mar 2024, Valencia, Spain. pp.1-6, ⟨10.23919/DATE58400.2024.10546769⟩ |
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Trade-offs in Neural Network Compression: Quantized and Binary Models for Keyword SpottingICECS 2024 - 31st IEEE International Conference on Electronics Circuits and Systems, Nov 2024, Nancy, France. In press |
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An Educational Tool to Analyze the Hardware/Software Integration in RISC-V SystemsDCIS 2024 - 39th Conference on Design of Circuits and Integrated Systems, Nov 2024, Catania, Italy. pp.1-6, ⟨10.1109/DCIS62603.2024.10769201⟩ |
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Analysis of Optimum 3-Dimensional Array and Fast Data Movement for Efficient Memory Computation in Convolutional Neural Network ModelsICCCSP 2023 - 7th International Conference on Computer, Communication, and Signal Processing, Jan 2023, Chennai, India. pp.94-108, ⟨10.1007/978-3-031-39811-7_8⟩ |
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Sibyl: Adaptive and Extensible Data Placement in Hybrid Storage Systems Using Online Reinforcement LearningISCA 2022 - 49th International Symposium on Computer Architecture, Jun 2022, New York, United States. pp.320-336, ⟨10.1145/3470496.3527442⟩ |
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Demystifying the TensorFlow Eager Execution of Deep Learning Inference on a CPU-GPU TandemDSD 2022 - 25th Euromicro Conference on Digital System Design, Aug 2022, Maspalomas, Spain. pp.446-455, ⟨10.1109/DSD57027.2022.00066⟩ |
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Reducing the Silicon Area Overhead of Counter-Based Rowhammer MitigationsCryptArchi 2022 - 18th International Workshops on Cryptographic architectures embedded in logic devices, May 2022, Porquerolles, France |
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Diminisher: A Linux Kernel based Countermeasure for TAA VulnerabilityCPS4CIP 2021 - 2nd International Workshop on Cyber-Physical Security for Critical Infrastructures Protection, Oct 2021, virtual event, Germany. pp.477-495, ⟨10.1007/978-3-030-95484-0_28⟩ |
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Modeling Rowhammer memory corruption in the gem5 simulatorTHCon 2022 - Toulouse Hacking Conference, Apr 2022, Toulouse, France |
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A Heuristic Exploration of Retraining-free Weight-Sharing for CNN CompressionASP-DAC 2022 - 27th Asia and South Pacific Design Automation Conference, Jan 2022, Taipei, Taiwan. pp.134-139, ⟨10.1109/ASP-DAC52403.2022.9712487⟩ |
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Pref-X: a framework to reveal data prefetching in commercial in-order coresDAC 2022 - 59th ACM/IEEE Design Automation Conference, Jul 2022, San Francisco, CA, United States. pp.1051-1056, ⟨10.1145/3489517.3530569⟩ |
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Hermes: Accelerating Long-Latency Load Requests via Perceptron-Based Off-Chip Load PredictionMICRO 2022 - 55th IEEE/ACM International Symposium on Microarchitecture, Oct 2022, Chicago, IL, United States. pp.1-18, ⟨10.1109/MICRO56248.2022.00015⟩ |
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Flash-Cosmos: In-Flash Bulk Bitwise Operations Using Inherent Computation Capability of NAND Flash MemoryMICRO 2022 - 55th IEEE/ACM International Symposium on Microarchitecture, Oct 2022, Chicago, IL, United States. pp.937-955, ⟨10.1109/MICRO56248.2022.00069⟩ |
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MemCork: Exploration of Hybrid Memory Architectures for Intermittent Computing at the EdgeVLSI-SoC 2022 - 30th IFIP/IEEE International Conference on Very Large Scale Integration, Oct 2022, Patras, Greece. pp.1-6, ⟨10.1109/VLSI-SoC54400.2022.9939630⟩ |
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Exploration of Ultra Low Power Architectures for Machine Learning at the Edge15e Colloque National du GDR SoC², Jun 2021, Rennes, France |
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Transit-Guard: An OS-based Defense Mechanism Against Transient Execution AttacksETS 2021 - 26th IEEE European Test Symposium, May 2021, Bruges (virtual), Belgium. pp.1-2, ⟨10.1109/ETS50041.2021.9465429⟩ |
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Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate SimulationDATE 2021 - 24th Design, Automation and Test in Europe Conference and Exhibition, Feb 2021, Grenoble (Virtual), France. pp.707-710, ⟨10.23919/DATE51398.2021.9474108⟩ |
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AdequateDL: Approximating Deep Learning AcceleratorsDDECS 2021 - 24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2021, Vienna (virtual), Austria. pp.37-40, ⟨10.1109/DDECS52668.2021.9417026⟩ |
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Implementing Rowhammer Memory Corruption in the gem5 SimulatorRSP 2021 - 32nd International Workshop on Rapid System Prototyping, Oct 2021, Virtual Event, France. pp.36-42, ⟨10.1109/RSP53691.2021.9806242⟩ |
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Fast Exploration of Weight Sharing Opportunities for CNN CompressionSLOHA 2021 - Workshop on System-level Design Methods for Deep Learning on Heterogeneous Architectures, Feb 2021, Grenoble, France |
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Virtual Platform to Analyze the Security of a System on Chip at Microarchitectural LevelEuroS&PW 2021 - IEEE European Symposium on Security and Privacy Workshops, Sep 2021, Vienne, Austria. pp.96-102, ⟨10.1109/EuroSPW54576.2021.00017⟩ |
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Vulnerability Assessment of the Rowhammer Attack Using Machine Learning and the gem5 Simulator -Work in ProgressSaT-CPS 2021 - ACM Workshop on Secure and Trustworthy Cyber-Physical Systems, Apr 2021, Virtually, United States. pp.104-109, ⟨10.1145/3445969.3450425⟩ |
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An FPGA-based Emulation Platform for Edge Computing Node Design ExplorationRSP 2021 - 32nd International Workshop on Rapid System Prototyping, Oct 2021, Virtual event, France. pp.8-14, ⟨10.1109/RSP53691.2021.9806230⟩ |
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Sensitivity Analysis and Compression Opportunities in DNNs Using Weight SharingDDECS 2020 - 23rd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2020, Novi Sad, Serbia. pp.1-6, ⟨10.1109/DDECS50862.2020.9095658⟩ |
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On the Automatic Exploration of Weight Sharing for Deep Neural Network CompressionDATE 2020 - 23rd Design, Automation and Test in Europe Conference and Exhibition, Mar 2020, Grenoble, France. pp.1319-1322, ⟨10.23919/DATE48585.2020.9116350⟩ |
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Performance and Energy Assessment of Last-Level Cache Replacement PoliciesEDiS: Embedded and Distributed Systems, Dec 2017, Oran, Algeria. ⟨10.1109/EDIS.2017.8284032⟩ |
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Improving the Performance of STT-MRAM LLC through Enhanced Cache Replacement PolicyARCS: Architecture of Computing Systems, Apr 2018, Braunschweig, Germany. pp.168-180, ⟨10.1007/978-3-319-77610-1_13⟩ |
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Evaluation of Heterogeneous Multicore Cluster Architectures Designed for Mobile ComputingReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jul 2018, Lille, France. ⟨10.1109/ReCoSoC.2018.8449376⟩ |
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Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworksDATE 2018 - 21st Design, Automation and Test in Europe Conference and Exhibition, Mar 2018, Dresden, Germany. pp.103-108, ⟨10.23919/DATE.2018.8341987⟩ |
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OpenMP scheduling on ARM big.LITTLE architectureMULTIPROG 2016 - 9th International Workshop on Programmability and Architectures for Heterogeneous Multicores, HIPEAC, Jan 2016, Prague, Czech Republic |
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Speed and Accuracy Dilemma in NoC Simulation: What about Memory Impact?ReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jun 2016, Tallinn, Estonia |
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Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy ExplorationMCSoC: Embedded Multicore/Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.201-208, ⟨10.1109/MCSoC.2016.20⟩ |
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A Workflow for Fast Evaluation of Mapping Heuristics Targeting Cloud InfrastructuresDREAMCloud: Dynamic Resource Allocation and Management in Embedded, High Performance and Cloud Computing, Jan 2016, Prague, Czech Republic |
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Shortening Design Time through Multiplatform Simulations with a Portable OpenCL Golden-model: The LDPC Decoder CaseFCCM: Field-Programmable Custom Computing Machines, Apr 2012, Toronto, Canada. pp.224-231, ⟨10.1109/FCCM.2012.46⟩ |
Software controlled cell bit-density to improve NAND flash lifetimeDAC: Design Automation Conference, Jun 2012, San Francisco, United States. pp.229-234, ⟨10.1145/2228360.2228404⟩ |
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Fast Performance Evaluation of Fixed-Point Systems with Un-Smooth OperatorsIEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 2010, San Jose, United States |
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Quantization mode opportunities in fixed-point system designEuropean Signal Processing Conference, 2010, Aalborg, Denmark |
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Fast performance evaluation of fixed-point systems with un-smooth operatorsIEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov 2010, San Jose, United States. pp.9-16, ⟨10.1109/ICCAD.2010.5654064⟩ |
Exploiting finite precision information to guide data-flow mappingDAC: Design Automation Conference, Jun 2010, Anaheim, United States. pp.248-253, ⟨10.1145/1837274.1837338⟩ |
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Quantization Mode Opportunities in Fixed-Point System Design18th European Signal Processing Conference (EUSIPCO-2010) (2010), EURASIP, Aug 2011, Aalborg, Denmark. pp.542-546 |
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Ultra low energy Domain Specific Instruction-set Processor for on-line surveillanceSASP 2010 - 8th Symposium on Application Specific Processors, Jun 2010, Anaheim, United States. pp.30-35, ⟨10.1109/SASP.2010.5521151⟩ |
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Adaptive early-stopping threshold for LTE turbo decoder18th European Signal Processing Conference, 2010, Aalborg, Denmark |
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Power-aware evaluation flowfor digital decimation filter architectures for high-speed ADCSIEEE Workshop on Signal Processing Systems (SiPS), Oct 2009, Tampere, Finland. pp.151-156, ⟨10.1109/SIPS.2009.5336241⟩ |
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Algorithm-architecture co-design of soft-output ML MIMO detector for parallel application specific instruction set processorsDATE: Design, Automation and Test in Europe, Apr 2009, Nice, France. pp.1608-1613, ⟨10.1109/DATE.2009.5090921⟩ |
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Novel energy-efficient scalable soft-output SSFE MIMO detector architecturesSAMOS: Systems, Architectures, Modeling, and Simulation, Jul 2009, Samos, Greece. pp.165-171, ⟨10.1109/ICSAMOS.2009.5289228⟩ |
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A 200Mbps+ 2.14 nJ/b digital baseband multi processor system-on-chip for SDRsSymposium on VLSI Circuits, 2009, Kyoto, Japan |
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A System Level Algorithmic Approach toward Energy-Aware SDR Baseband ImplementationsICC: International Conference on Communications, Jun 2009, Dresden, Germany. pp.1-6, ⟨10.1109/ICC.2009.5198680⟩ |
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Finite precision processing in wireless applicationsDATE: Design, Automation and Test in Europe, Apr 2009, Nice, France. pp.1230-1233, ⟨10.1109/DATE.2009.5090851⟩ |
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Scenario-Based Fixed-point Data Format Refinement to Enable Energy-scalable Software Defined RadiosDATE: Design, Automation and Test in Europe, Mar 2008, Munich, Germany. pp.722-727, ⟨10.1109/DATE.2008.4484764⟩ |
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A coarse-grained array based baseband processor for 100Mbps+ software defined radioDATE: Design, Automation and Test in Europe, Mar 2008, Munich, Germany. pp.716-721, ⟨10.1109/DATE.2008.4484763⟩ |
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Selective Spanning with Fast Enumeration: A Near Maximum-Likelihood MIMO Detector Designed for Parallel Programmable Baseband ArchitecturesIEEE International Conference on Communications, May 2008, Beijing, China. pp.737-741, ⟨10.1109/ICC.2008.144⟩ |
Adaptive SSFE Near-ML MIMO Detector with Dynamic Search Range and 80-103Mbps Flexible ImplementationIEEE GLOBECOM 2008 - 2008 IEEE Global Telecommunications Conference, Nov 2008, New Orleans, France. pp.1-5, ⟨10.1109/GLOCOM.2008.ECP.632⟩ |
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An implementation friendly low complexity multiplierless LLR generator for soft MIMO sphere decodersIEEE Workshop on Signal Processing Systems (SiPS), Oct 2008, Washington, United States. pp.118-123, ⟨10.1109/SIPS.2008.4671748⟩ |
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Bridging the energy gap in size, weight and power constrained software defined radio: Agile baseband processing as a key enablerICASSP: International Conference on Acoustics, Speech and Signal Processing, Mar 2008, Las Vegas, United States. pp.5384-5387, ⟨10.1109/ICASSP.2008.4518877⟩ |
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Generic Multi-Phase Software-Pipelined Partial-FFT on Instruction-Level-Parallel Architectures and SDR Baseband ApplicationsDATE: Design, Automation and Test in Europe, Mar 2008, Munich, Germany. pp.598-603, ⟨10.1109/DATE.2008.4484742⟩ |
Optimizing Near-ML MIMO Detector for SDR Baseband on Parallel Programmable ArchitecturesDATE: Design, Automation and Test in Europe, Mar 2008, Munich, Germany. pp.444-449, ⟨10.1109/DATE.2008.4484721⟩ |
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A Scalable Baseband Platform for Energy-Efficient Reactive Software-Defined-Radio1st International Conference on Cognitive Radio Oriented Wireless Networks and Communications, Jun 2006, Mykonos Island, Greece. pp.1-5, ⟨10.1109/CROWNCOM.2006.363450⟩ |
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Mapping a multiple antenna SDM-OFDM receiver on the ADRES coarse-grained reconfigurable processorIEEE Workshop on Signal Processing Systems Design and Implementation, 2005, Athens, Greece. pp.473-478, ⟨10.1109/SIPS.2005.1579915⟩ |
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Forgetful Counters for Rowhammer DetectionCHES 2024 - Conference on Cryptographic Hardware and Embedded Systems, Sep 2024, Hallifax, Canada. , 2024 |
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Study and design of MRAM-based in-memory computing architectures for machine learning applicationsJournées Scientifiques Nationales 2024 du PEPR Électronique, Mar 2024, Grenoble, France |
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In-memory-computing implementation of magnetoresistive networks for ultra-low-power computingJournées Scientifiques Nationales 2024 du PEPR électronique, Mar 2024, Grenoble, France. |
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DaPPA: A Data-Parallel Framework for Processing-in-Memory ArchitecturesPACT 2023 - 32nd International Conference on Parallel Architectures and Compilation Techniques, Oct 2023, Vienna, Austria. , 2023, ⟨10.48550/arXiv.2310.10168⟩ |
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Modeling Rowhammer in the gem5 simulatorCHES 2022 - Conference on Cryptographic Hardware and Embedded Systems, Sep 2022, Leuven, Belgium. |
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Implementation of Rowhammer Effect in gem515e Colloque National du GDR SoC², Jun 2021, Rennes, France. , 2021 |
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Approximations in Deep LearningApproximate Computing Techniques - From Component- to Application-Level, pp.467-512, 2022, 978-3-030-94704-0. ⟨10.1007/978-3-030-94705-7_15⟩ |
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Analysis of Finite Word-Length Effects in Fixed-Point SystemsShuvra S. Bhattacharyya. Handbook of Signal Processing Systems, pp.1063-1101, 2019, 978-3-319-91733-7. ⟨10.1007/978-3-319-91734-4_29⟩ |
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Fixed-point refinement of digital signal processing systemsDigitally Enhanced Mixed Signal Systems, Chapter 1, The Institution of Engineering and Technology, pp.1-37, 2019, 978-1-78561-609-9. ⟨10.1049/PBCS040E_ch⟩ |
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Progressive Generation of Canonical Irredundant Sums of Products Using a SAT SolverAndré Inácio Reis; Rolf Drechsler. Advanced Logic Synthesis, Springer, pp.169-188, 2017, 978-3-319-67295-3. ⟨10.1007/978-3-319-67295-3_8⟩ |
Design of a Low Power Pre-synchronization ASIP for Multimode SDR TerminalsEmbedded Computer Systems: Architectures, Modeling, and Simulation, pp.322-332, 2007, ⟨10.1007/978-3-540-73625-7_34⟩ |
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Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction- and Data-Level ParallelismIntegrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, pp.12-23, 2006, ⟨10.1007/11847083_2⟩ |
Fixed-point refinement, a guaranteed approach towards energy efficient computing2016 |
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Fixed-point refinement, a guaranteed approach towards energy efficient computing2015 |
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Towards a Flexible and Comprehensive Evaluation Approach for Adressing NVM Integration in Cache Hierarchy2021 |
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Performance and Energy Impact of Enhanced Cache Replacement Policy on STT-MRAM LLC2021 |
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Emerging NVM Technologies in Main Memory for Energy-Efficient HPC: an Empirical Study2019 |
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Deliverable D5.1 – Technical description of the holistic design flow in CONTINUUM[Research Report] Inria Rennes – Bretagne Atlantique; LIRMM (UM, CNRS); Cortus S.A.S. 2019 |
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Adapting to Scarcity: Computer Systems for a Sustainable FutureMicro and nanotechnologies/Microelectronics. Université de Montpellier (2022-..), 2024 |