Maria Méndez Real
- Equipe Software/HArdware and unKnown Environment inteRactions (Lab-STICC_SHAKER)
- Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC)
Publications
Publications
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A Lightweight Embedded Detection System against Voltage Drop Fault Attacks in Multi-Tenant FPGAsCASCADE (Constructive Approaches for SeCurity Analysis and Design of Embedded systems), Mar 2026, Regensburg, Germany |
Double Strike: Breaking Approximation-Based Side-Channel Countermeasures for DNNsHOST 2026 - IEEE International Symposium on Hardware Oriented Security and Trust, May 2026, Washignton DC, United States |
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UAVLnQ: An Architecture for Security Analysis of Cyber-Physical Network Behavior in UAV SwarmsDASIP: Workshop on Design and Architectures for Signal and Image Processing, In conjonction with HIPEAC, Jan 2026, Krakovie, Poland |
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Comb Frequency Division Multiplexing: A Non-Binary Modulation for AirGap Covert Channel Transmission2025 Design, Automation & Test in Europe Conference (DATE), Mar 2025, Lyon, France. pp.1-2, ⟨10.23919/DATE64628.2025.10993130⟩ |
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Side-Channel Exploitation of DRAM Access Patterns for Fingerprinting FPGA-CPU EnvironmentsRESSI 2025 - Rendez-Vous de la Recherche et de l'Enseignement de la Sécurité des Systèmes d'Information, May 2025, Lannion, France |
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AudioGap: An AirGapped Covert Channel Exploiting the Frequency Diversity of Audio IC Electromagnetic Leakage2025 IEEE 49th Annual Computers, Software, and Applications Conference (COMPSAC), IEEE, Jul 2025, Toronto, Canada. ⟨10.1109/COMPSAC65507.2025.00128⟩ |
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RISC-V processor enhanced with a dynamic micro-decoder unitIEEE International Conference on Electronics, Circuits and Systems, Nov 2024, Nancy, France. paper #4224, ⟨10.1109/ICECS61496.2024.10849306⟩ |
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Securing a RISC-V architecture: A dynamic approach2023 Design, Automation and Test in Europe Conference (DATE 2023), Apr 2023, Antwerp, Belgium. ⟨10.23919/DATE56975.2023.10136972⟩ |
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Bus Electrocardiogram: Vulnerability of SoC-FPGA Internal AXI Bus to Electromagnetic Side-Channel Analysis2023 International Symposium on Electromagnetic Compatibility - EMC Europe, EMC Europe 2023, Sep 2023, Krakow, Poland. Paper ID: 249, ⟨10.1109/EMCEurope57790.2023.10274170⟩ |
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You only Get One-Shot: Eavesdropping Input Images to Neural Network by Spying SoC-FPGA Internal Bus18th International Conference on Availability, Reliability and Security, ARES 2023, Aug 2023, Benevento, Italy. pp.31, ⟨10.1145/3600160.3600189⟩ |
Towards Malicious Exploitation of Energy Management MechanismsDesign, Automation and Test in Europe Conference, Mar 2020, Grenoble, France. paper #257 |
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System-Level Modeling and Simulation of MPSoC Run-Time Management using Execution Traces AnalysisInternational Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIX), Jul 2019, Samos, Greece. paper #49 |
Mapping and Frequency Joint Optimization for Energy Efficient Execution of Multiple Applications on Multicore SystemsThe Conference on Design and Architectures for Signal and Image Processing, Oct 2019, Montreal, Canada. pp.SUBMISS14 |
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Fast polynomial arithmetic for Somewhat Homomorphic Encryption operations in hardware with Karatsuba algorithmInternational Conference on Field-Programmable Technology (FPT), Dec 2016, Xi’an, China. ⟨10.1109/FPT.2016.7929535⟩ |
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MPSoCSim extension: An OVP Simulator for the Evaluation of Cluster-based Multicore and Many-core architectures4rd Workshop on Virtual Prototyping of Parallel and Embedded Systems (ViPES) as part of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), Jul 2016, Samos, Greece |
ALMOS many-core operating system extension with new secure-enable mechanisms for dynamic creation of secure zones24th Euromicro International Conference on Parallel, Distributed and Netwprk-Based Processing (PDP 2016), Feb 2016, Heraklion - Crete, Greece |
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Dynamic Spatially Isolated Secure Zones for NoC-based Many-core Accelerators8th IEEE International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip, Jun 2016, Tallinn, Estonia. ⟨10.1109/ReCoSoC.2016.7533900⟩ |
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Exploration of Polynomial Multiplication Algorithms for Homomorphic Encryption SchemesInternational Conference on Reconfigurable Computing and FPGAs (ReConFig), Dec 2015, Cancun, Mexico. ⟨10.1109/ReConFig.2015.7393307⟩ |
Extending Multicore Architectures with Cryptoptocessors and Parallel CryptographyColloque national du GDR SOC-SIP, Jun 2014, Paris, France |
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ATTILA -- Addressing security threats to artificial intelligence in approximate computing systemsWISG 2025 - Workshop interdisciplinaire sur la sécurité globale, Mar 2025, Paris, France. pp.1-1, 2025 |
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Side-channel attack hardware detection module added to RISC-V coreRISC-V Summit Europe, May 2025, Paris, France. pp.P497 |
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MonitoRISC : Dynamic insertion of instructions dedicated to sidechannel attacks detection2024 - Colloque National du GDR SoC2, Jun 2024, Toulouse, France. 2024 |
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First analysis and protection of the micro-architecture of a RISC-V coreJournée Nationale GDR SoC2, Jun 2023, Lyon, France. |
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Comb Frequency Division Multiplexing: A Non-Binary Modulation For AirGap Covert Channel Transmission2025 |
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System-level design for the assessment of shared resources effects on multiprocessor systems securityRapport Stage Ingénieur ETN4 Polytech Nantes, Nantes université. 2023 |
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Spatial Isolation against Logical Cache-based Side-Channel Attacks in Many-Core ArchitecturesCryptography and Security [cs.CR]. Université de Bretagne Sud, 2017. English. ⟨NNT : 2017LORIS454⟩ |