Access content directly

Marie-Lise Flottes

219
Documents
Researcher identifiers

Presentation

Publications

Image document

Hybrid Protection of Digital FIR Filters

Levent Aksoy , Quang-Linh Nguyen , Felipe Almeida , Jaan Raik , Marie-Lise Flottes
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, inPress, ⟨10.1109/TVLSI.2023.3253641⟩
Journal articles lirmm-04078805v1
Image document

Analysis of resistive defects on a foundry 8T SRAM-based IMC architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noel , Arnaud Virazel
Microelectronics Reliability, 2023, 147, pp.115029. ⟨10.1016/j.microrel.2023.115029⟩
Journal articles hal-04129470v1
Image document

SKG-Lock+: A Provably Secure Logic Locking SchemeCreating Significant Output Corruption

Quang-Linh Nguyen , Sophie Dupuis , Marie-Lise Flottes , Bruno Rouzeyre
Electronics, 2022, 11, pp.3906. ⟨10.3390/electronics11233906⟩
Journal articles lirmm-03884259v1
Image document

A Survey on Security Threats and Countermeasures in IEEE Test Standards

Emanuele Valea , Mathieu da Silva , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
IEEE Design & Test, 2019, 36 (3), pp.95-116. ⟨10.1109/MDAT.2019.2899064⟩
Journal articles hal-02166858v1

Preventing Scan Attacks on Secure Circuits Through Scan Chain Encryption

Mathieu da Silva , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019, 38 (3), pp.538-550. ⟨10.1109/TCAD.2018.2818722⟩
Journal articles lirmm-01867245v1
Image document

Stream vs Block ciphers for scan encryption

Emanuele Valea , Mathieu da Silva , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
Microelectronics Journal, 2019, 86, pp.65-76. ⟨10.1016/j.mejo.2019.02.019⟩
Journal articles lirmm-02306938v1

Logic Locking: A Survey of Proposed Methods and Evaluation Metrics

Sophie Dupuis , Marie-Lise Flottes
Journal of Electronic Testing: : Theory and Applications, 2019, 35 (3), pp.273-291. ⟨10.1007/s10836-019-05800-4⟩
Journal articles lirmm-02128826v1
Image document

Protection against Hardware Trojans with Logic Testing: Proposed Solutions and Challenges Ahead

Sophie Dupuis , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
IEEE Design & Test, 2018, 35 (2), pp.73-90. ⟨10.1109/MDAT.2017.2766170⟩
Journal articles lirmm-01688166v1

Sensitivity to Laser Fault Injection: CMOS FD-SOI vs. CMOS bulk

J.-M. Dutertre , Vincent Beroulle , Philippe Candelier , Stephan de Castro , Louis-Barthelemy Faber
IEEE Transactions on Device and Materials Reliability, 2018, 19 (1), pp.6-15. ⟨10.1109/TDMR.2018.2886463⟩
Journal articles hal-01971932v1

Assessing Body Built-In Current Sensors for Detection of Multiple Transient Faults

Raphael Andreoni Camponogara-Viera , Jean-Max Dutertre , Marie-Lise Flottes , Olivier Potin , Giorgio Di Natale
Microelectronics Reliability, 2018, 88-90, pp.128-134. ⟨10.1016/j.microrel.2018.07.111⟩
Journal articles hal-01893676v1

Frontside Versus Backside Laser Injection: A Comparative Study

Stephan de Castro , Jean-Max Dutertre , Bruno Rouzeyre , Giorgio Di Natale , Marie-Lise Flottes
ACM Journal on Emerging Technologies in Computing Systems, 2016, Special Issue on Secure and Trustworthy Computing, 13 (1), pp.7. ⟨10.1145/2845999⟩
Journal articles lirmm-01444121v1

Multi-Level Ionizing-Induced Transient Fault Simulator

Feng Lu , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
Information Security Journal: A Global Perspective, 2014, 22 (5-6), pp.251-264. ⟨10.1080/19393555.2014.891280⟩
Journal articles lirmm-01075393v1
Image document

Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS

Jean-Max Dutertre , Rodrigo Possamai Bastos , Olivier Potin , Marie-Lise Flottes , Bruno Rouzeyre
Microelectronics Reliability, 2014, 54 (9-10), pp.2289-2294. ⟨10.1016/j.microrel.2014.07.151⟩
Journal articles emse-01094805v1
Image document

On the Effectiveness of Hardware Trojan Horse Detection via Side-Channel Analysis

Sophie Dupuis , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
Information Security Journal: A Global Perspective, 2014, Trustworthy Manufacturing and Utilization of Secure Devices, 22 (5-6), pp.226-236. ⟨10.1080/19393555.2014.891277⟩
Journal articles lirmm-00991362v1

Test versus Security: Past and Present

Jean da Rolt , Amitabh Das , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
IEEE Transactions on Emerging Topics in Computing, 2014, 2 (1), pp.50-62. ⟨10.1109/TETC.2014.2304492⟩
Journal articles lirmm-00989627v1
Image document

Thwarting Scan-Based Attacks on Secure-ICs with On-Chip Comparison

Jean da Rolt , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014, 22 (4), pp.947-951. ⟨10.1109/TVLSI.2013.2257903⟩
Journal articles lirmm-00841650v1
Image document

A New Recovery Scheme Against Short-to-Long Duration Transient Faults in Combinational Logic

Rodrigo Possamai Bastos , Giorgio Di Natale , Marie-Lise Flottes , Feng Lu , Bruno Rouzeyre
Journal of Electronic Testing: : Theory and Applications, 2013, 29, pp.331-340. ⟨10.1007/s10836-013-5359-y⟩
Journal articles lirmm-00838389v1
Image document

Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection

Jean-Max Dutertre , Rodrigo Possamai Bastos , Olivier Potin , Marie-Lise Flottes , Bruno Rouzeyre
Microelectronics Reliability, 2013, European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, 53 (9), pp.1320-1324. ⟨10.1016/j.microrel.2013.07.069⟩
Journal articles emse-01100723v1

A Novel Differential Scan Attack on Advanced DFT Structures

Jean da Rolt , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
ACM Transactions on Design Automation of Electronic Systems, 2013, 18 (4), pp.58. ⟨10.1145/2505014⟩
Journal articles lirmm-01075410v1
Image document

Secure JTAG Implementation Using Schnorr Protocol

Amitabh Das , Jean da Rolt , Santosh Ghosh , Stefaan Seys , Sophie Dupuis
Journal of Electronic Testing: : Theory and Applications, 2013, 29 (2), pp.193-209. ⟨10.1007/s10836-013-5369-9⟩
Journal articles lirmm-00837904v1

Scan attacks on side-channel and fault attack resistant public-key implementations

Jean da Rolt , Amitabh Das , Santos Ghosh , Giorgio Di Natale , Marie-Lise Flottes
Journal of Cryptographic Engineering, 2012, 2 (4), pp.207-219. ⟨10.1007/s13389-012-0045-z⟩
Journal articles lirmm-00805687v1
Image document

Novel Transient-Fault Detection Circuit Featuring Enhanced Bulk Built-in Current Sensor with Low-Power Sleep Mode

Rodrigo Possamai Bastos , Frank Sill Torres , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
Microelectronics Reliability, 2012, 52 (9-10), pp.1781-1786. ⟨10.1016/j.microrel.2012.06.149⟩
Journal articles lirmm-00715117v1
Image document

A Reliable Architecture for Parallel Implementations of the Advanced Encryption Standard

Giorgio Di Natale , Marion Doulcier , Marie-Lise Flottes , Bruno Rouzeyre
Journal of Electronic Testing: : Theory and Applications, 2009, 25 (4-5), pp.269-278. ⟨10.1007/s10836-009-5106-6⟩
Journal articles lirmm-00423026v1

Self-Test Techniques for Crypto-Devices

Giorgio Di Natale , Marion Doulcier , Marie-Lise Flottes , Bruno Rouzeyre
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2009, 18 (2), pp.329-333. ⟨10.1109/TVLSI.2008.2010045⟩
Journal articles lirmm-00365359v1

Remote Labs for Industrial IC Testing

Béatrice Pradarelli , Laurent Latorre , Marie-Lise Flottes , Yves Bertrand , Pascal Nouet
IEEE Transactions on Learning Technologies, 2009, 2 (4), pp.304-311. ⟨10.1109/TLT.2009.46⟩
Journal articles lirmm-00435903v1

Securing Scan Control in Crypto Chips

David Hely , Frédéric Bancel , Marie-Lise Flottes , Bruno Rouzeyre
Journal of Electronic Testing: : Theory and Applications, 2007, 23 (5), pp.457-464. ⟨10.1007/s10836-007-5000-z⟩
Journal articles lirmm-00186353v1
Image document

Academic Network for Microelectronic Test Education

Franc Novak , Anton Biasizzo , Yves Bertrand , Marie-Lise Flottes , Luz Balado
International Journal of Engineering Education, 2007, 23 (6), pp.1245-1253
Journal articles lirmm-00195573v1

A Unified DFT Approach for BIST and External Test

Marie-Lise Flottes , Christian Landrault , Aurélia Petitqueux
Journal of Electronic Testing: : Theory and Applications, 2003, 19 (1), pp.49-60. ⟨10.1023/A:1021943912494⟩
Journal articles lirmm-00269517v1
Image document

Improving Datapath Testability by Modifying Controller Specification

Marie-Lise Flottes , Bruno Rouzeyre , Leo Volpe
VLSI Design, 2002, 15 (2), pp.491-498. ⟨10.1080/1065514021000012101⟩
Journal articles lirmm-00268581v1
Image document

A Method for Trading Test Time, Area and Fault Coverage in Datapath BIST Synthesis

David Berthelot , Marie-Lise Flottes , Bruno Rouzeyre
Journal of Electronic Testing: : Theory and Applications, 2001, 17 (3/4), pp.331-339. ⟨10.1023/A:1012227715327⟩
Journal articles lirmm-02288800v1

BISTing Datapaths under Heterogeneous Test Schemes

David Berthelot , Marie-Lise Flottes , Bruno Rouzeyre
Journal of Electronic Testing: : Theory and Applications, 1999, 14 (1/2), pp.115-123. ⟨10.1023/A:1008309625123⟩
Journal articles lirmm-02288809v1
Image document

Improving Testability of Non-Scan Designs during Behavioral Synthesis

Marie-Lise Flottes , D. Hammad , Bruno Rouzeyre
Journal of Electronic Testing: : Theory and Applications, 1997, 11 (1), pp.29-42. ⟨10.1023/A:1008243700142⟩
Journal articles lirmm-02288852v1
Image document

Intra-cell Resistive-Open Defect Analysis on a Foundry 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noël , Arnaud Virazel
ETS 2023 - 28th IEEE European Test Symposium, May 2023, Venise, Italy. ⟨10.1109/ETS56758.2023.10174107⟩
Conference papers hal-04164663v1
Image document

Resynthesis-based Attacks Against Logic Locking

Felipe Almeida , Levent Aksoy , Quang-Linh Nguyen , Sophie Dupuis , Marie-Lise Flottes
ISQED 2023 - 24th International Symposium on Quality Electronic Design, Apr 2023, San Fransisco, CA, United States
Conference papers lirmm-04053224v1
Image document

Analysis of Read Port Short Defects in an 8T SRAM-based IMC Architecture

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Jean-Philippe Noel , Arnaud Virazel
16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Conference papers lirmm-03990078v1
Image document

A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing

Sébastien Lapeyre , Nicolas Valette , Marc Merandat , Marie-Lise Flottes , Arnaud Virazel
ETS 2022 - 27th IEEE European Test Symposium, May 2022, Barcelona, Spain. pp.1-4, ⟨10.1109/ETS54262.2022.9810364⟩
Conference papers lirmm-03739783v1
Image document

A new key-gate insertion strategy for logic locking with high output corruption

Quang-Linh Nguyen , Sophie Dupuis , Marie-Lise Flottes
THCon 2022 - Toulouse Hacking Convention, ENAC, Apr 2022, Toulouse, France
Conference papers lirmm-04048983v1

Leveraging Layout-based Effects for Locking Analog ICs

Muayad Aljafar , Florence Azaïs , Marie-Lise Flottes , Samuel Pagliarini
ASHES 2022 - 6th Workshop on Attacks and Solutions in Hardware Security @CCS 2022, Nov 2022, Los Angeles, CA, United States. pp.5-13, ⟨10.1145/3560834.3563826⟩
Conference papers lirmm-04080258v1
Image document

Preliminary Defect Analysis of 8T SRAM Cells Used for In-Memory Computing

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Arnaud Virazel
15e Colloque National du GDR SoC², Jun 2021, Rennes, France
Conference papers lirmm-03994467v1
Image document

A Plug and Play Digital ABIST Controller for Analog Sensors in Secure Devices

Sébastien Lapeyre , Nicolas Valette , Marc Merandat , Marie-Lise Flottes , Bruno Rouzeyre
ETS 2021 - 26th IEEE European Test Symposium, May 2021, Bruges, Belgium. pp.1-4, ⟨10.1109/ETS50041.2021.9465480⟩
Conference papers lirmm-03305266v1
Image document

Preliminary Defect Analysis of 8T SRAM Cells for In-Memory Computing Architectures

Lila Ammoura , Marie-Lise Flottes , Patrick Girard , Arnaud Virazel
DTIS 2021 - 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Jun 2021, Montpellier, France. ⟨10.1109/DTIS53253.2021.9505101⟩
Conference papers lirmm-03377433v1
Image document

On Preventing SAT Attack with Decoy Key-Inputs

Quang-Linh Nguyen , Marie-Lise Flottes , Sophie Dupuis , Bruno Rouzeyre
ISVLSI 2021 - IEEE Computer Society Annual Symposium on VLSI, Jul 2021, Tampa, United States. pp.114-119, ⟨10.1109/ISVLSI51109.2021.00031⟩
Conference papers lirmm-03359458v1
Image document

High-level Intellectual Property Obfuscation via Decoy Constants

Levent Aksoy , Quang-Linh Nguyen , Felipe Almeida , Jaan Raik , Marie-Lise Flottes
IOLTS 2021 - 27th IEEE International Symposium on On-Line Testing and Robust System Design, Jun 2021, Torino, Italy. pp.1-7, ⟨10.1109/IOLTS52814.2021.9486714⟩
Conference papers lirmm-03359476v1
Image document

A Secure Scan Controller for Protecting Logic Locking

Quang-Linh Nguyen , Emanuele Valea , Marie-Lise Flottes , Sophie Dupuis , Bruno Rouzeyre
IOLTS 2020 - 26th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2020, Napoli, Italy. pp.1-6, ⟨10.1109/IOLTS50870.2020.9159730⟩
Conference papers lirmm-02995199v1
Image document

Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs

Florence Azaïs , Serge Bernard , Mariane Comte , Bastien Deveautour , Sophie Dupuis
IOLTS 2020 - 26th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2020, Napoli, Italy. pp.1-4, ⟨10.1109/IOLTS50870.2020.9159723⟩
Conference papers lirmm-02993384v1
Image document

Logic Locking a Design-for-Trust IC Design Technique

Marie-Lise Flottes
FETCH 2020 - École d'hiver Francophone sur les Technologies de Conception des Systèmes Embarqués Hétérogènes, Feb 2020, Montréal, Canada
Conference papers lirmm-03125660v1
Image document

Encryption-Based Secure JTAG

Emanuele Valea , Mathieu da Silva , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
DDECS 2019 - 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2019, Cluj-Napoca, Romania. pp.1-6, ⟨10.1109/DDECS.2019.8724654⟩
Conference papers hal-02149061v1
Image document

Stream Cipher Based Encryption in IEEE Test Standards

Emanuele Valea , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
TRUDEVICE 2019 - 8th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, May 2019, Baden Baden, Germany
Conference papers hal-02506743v1
Image document

A Comprehensive Approach to a Trusted Test Infrastructure

Marc Merandat , Vincent Reynaud , Emanuele Valea , Jerome Quevremont , Nicolas Valette
IVSW 2019 - 4th IEEE International Verification and Security Workshop, Jul 2019, Rhodes, Greece. pp.43-48, ⟨10.1109/IVSW.2019.8854428⟩
Conference papers lirmm-02306980v1
Image document

Providing Confidentiality and Integrity in Ultra Low Power IoT Devices

Emanuele Valea , Mathieu da Silva , Marie-Lise Flottes , Giorgio Di Natale , Sophie Dupuis
DTIS 2019 - 14th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Apr 2019, Mykonos, Greece. ⟨10.1109/DTIS.2019.8735090⟩
Conference papers hal-02166920v1
Image document

Does stream cipher-based scan chains encryption really prevent scan attacks?

Mathieu da Silva , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
TRUDEVICE Workshop, Mar 2018, Dresden, Germany
Conference papers lirmm-01867286v1
Image document

A new secure stream cipher for scan chain encryption

Mathieu da Silva , Emanuele Valea , Marie-Lise Flottes , Sophie Dupuis , Giorgio Di Natale
3rd IEEE International Verification and Security Workshop (IVSW 2018), Jul 2018, Platja d’Aro, Spain. pp.68-73, ⟨10.1109/IVSW.2018.8494852⟩
Conference papers lirmm-01867256v1
Image document

Encryption of test data: which cipher is better?

Mathieu da Silva , Emanuele Valea , Marie-Lise Flottes , Sophie Dupuis , Giorgio Di Natale
PRIME: PhD Research in Microelectronics and Electronics, Jul 2018, Prague, Czech Republic. pp.85-88, ⟨10.1109/PRIME.2018.8430366⟩
Conference papers lirmm-01867249v1
Image document

SI ECCS: SECure context saving for IoT devices

Emanuele Valea , Mathieu da Silva , Giorgio Di Natale , Marie-Lise Flottes , Sophie Dupuis
DTIS 2018 - 13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, Apr 2018, Taormina, Italy. ⟨10.1109/DTIS.2018.8368561⟩
Conference papers hal-01740173v1
Image document

Laser fault injection at the CMOS 28 nm technology node: an analysis of the fault model

Jean-Max Dutertre , Vincent Beroulle , Philippe Candelier , Stephan de Castro , Louis-Barthelemy Faber
FDTC: Fault Diagnosis and Tolerance in Cryptography, Sep 2018, Amsterdam, Netherlands. pp.1-6, ⟨10.1109/FDTC.2018.00009⟩
Conference papers emse-01856008v1
Image document

The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks

Jean-Max Dutertre , Vincent Beroulle , Philippe Candelier , Louis-Barthelemy Faber , Marie-Lise Flottes
IOLTS: International On-Line Testing Symposium, Jul 2018, Platja d’Aro, Spain. pp.214-219, ⟨10.1109/IOLTS.2018.8474230⟩
Conference papers emse-01856000v1
Image document

Scan Chain Encryption

Mathieu da Silva , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
DOCTIS: Journée des Doctorants de l’école doctorale I2S, 2017, Montpellier, France
Conference papers lirmm-01867277v1

Hacking the Control Flow error detection mechanism

Giorgio Di Natale , Marie-Lise Flottes , Sophie Dupuis , Bruno Rouzeyre
IVSW: International Verification and Security Workshop, Jul 2017, Thessaloniki, Greece. pp.51-56, ⟨10.1109/IVSW.2017.8031544⟩
Conference papers lirmm-01700739v1
Image document

Scan chain encryption for the test, diagnosis and debug of secure circuits

Mathieu da Silva , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre , Paolo Prinetto
ETS: European Test Symposium, May 2017, Limassol, Cyprus. ⟨10.1109/ETS.2017.7968248⟩
Conference papers lirmm-01699254v1
Image document

Experimentations on scan chain encryption with PRESENT

Mathieu da Silva , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
IVSW: International Verification and Security Workshop, Jul 2017, Thessaloniki, Greece. pp.45-50, ⟨10.1109/IVSW.2017.8031543⟩
Conference papers lirmm-01699258v1
Image document

Duplication-based Concurrent Detection of Hardware Trojans in Integrated Circuits

Manikandan Palanichamy , Papa-Sidy Ba , Sophie Dupuis , Marie-Lise Flottes , Giorgio Di Natale
TRUDEVICE, Nov 2016, Barcelona, Spain
Conference papers lirmm-01385551v1
Image document

Hardware Trust through Layout Filling: a Hardware Trojan Prevention Technique

Papa-Sidy Ba , Sophie Dupuis , Manikandan Palanichamy , Marie-Lise Flottes , Giorgio Di Natale
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2016, Pittsburgh, United States. pp.254-259, ⟨10.1109/ISVLSI.2016.22⟩
Conference papers lirmm-01346529v1
Image document

Using Outliers to Detect Stealthy Hardware Trojan Triggering?

Papa-Sidy Ba , Sophie Dupuis , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
IVSW: International Verification and Security Workshop, Jul 2016, Sant Feliu de Guixols, France
Conference papers lirmm-01347119v1
Image document

Hardware Trojan Prevention using Layout-Level Design Approach

Papa-Sidy Ba , Manikandan Palanichamy , Sophie Dupuis , Marie-Lise Flottes , Giorgio Di Natale
ECCTD: European Conference on Circuit Theory and Design, Aug 2015, Trondheim, Norway. ⟨10.1109/ECCTD.2015.7300093⟩
Conference papers lirmm-01234072v1

Session-less based thermal-aware 3D-SIC test scheduling

Marie-Lise Flottes , João Azevedo , Giorgio Di Natale , Bruno Rouzeyre
ETS: European Test Symposium, May 2015, Cluj-Napoca, Romania. ⟨10.1109/ETS.2015.7138732⟩
Conference papers lirmm-01922990v1

Multi-segment Enhanced Scan-chains for Secure ICs

Mafalda Cortez , Said Hamdioui , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
TRUDEVICE Workshop, Sep 2015, Saint-Malo, France
Conference papers lirmm-01276304v1

Validation Of Single BBICS Architecture In Detecting Multiple Faults

Raphael Andreoni Camponogara-Viera , Rodrigo Possamai Bastos , Jean-Max Dutertre , Olivier Potin , Marie-Lise Flottes
ATS: Asian Test Symposium, Nov 2015, Mumbai, India
Conference papers lirmm-01234067v1

Hierarchical Secure DfT

Mafalda Cortez , Said Hamdioui , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
TRUDEVICE Workshop, Sep 2015, St Malo, France
Conference papers lirmm-01234095v1
Image document

New Testing Procedure for Finding Insertion Sites of Stealthy Hardware Trojans

Sophie Dupuis , Bruno Rouzeyre , Marie-Lise Flottes , Giorgio Di Natale , Papa-Sidy Ba
DATE 2015 - 18th Design, Automation and Test in Europe Conference and Exhibition, Mar 2015, Grenoble, France. pp.776-781, ⟨10.7873/DATE.2015.1102⟩
Conference papers lirmm-01141619v1
Image document

On the limitations of logic testing for detecting Hardware Trojans Horses

Marie-Lise Flottes , Sophie Dupuis , Papa-Sidy Ba , Bruno Rouzeyre
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. ⟨10.1109/DTIS.2015.7127362⟩
Conference papers lirmm-01257837v1
Image document

3D DFT Challenges and Solutions

Yassine Fkih , Pascal Vivet , Marie-Lise Flottes , Bruno Rouzeyre , Giorgio Di Natale
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.603-608, ⟨10.1109/ISVLSI.2015.11⟩
Conference papers lirmm-01234076v1

Sensitivity to fault laser injection: a comparison between 28nm bulk and FD-SOI technology

Stephan de Castro , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
TRUDEVICE Workshop, Sep 2015, Saint-Malo, France
Conference papers lirmm-01234094v1
Image document

Figure of merits of 28nm Si technologies for implementing laser attack resistant security dedicated circuits

Stephan de Castro , Jean-Max Dutertre , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.362-367, ⟨10.1109/ISVLSI.2015.76⟩
Conference papers emse-01227138v1
Image document

Laser-Induced Fault Effects in Security-Dedicated Circuits

Vincent Beroulle , Philippe Candelier , Stephan de Castro , Giorgio Di Natale , Jean-Max Dutertre
VLSI-SoC: Very Large Scale Integration and System-on-Chip, Oct 2014, Playa del Carmen, Mexico. pp.220-240, ⟨10.1007/978-3-319-25279-7_12⟩
Conference papers hal-01383737v1

Layout-Aware Laser Fault Injection Simulation and Modeling: from physical level to gate level

Feng Lu , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, May 2014, Santorin, Greece. ⟨10.1109/DTIS.2014.6850665⟩
Conference papers lirmm-01119592v1

Customized Cell Detector for Laser-Induced-Fault Detection

Feng Lu , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
IOLTS: International On-Line Testing Symposium, Jul 2014, Platja d'Aro, Spain. pp.37-42, ⟨10.1109/IOLTS.2014.6873669⟩
Conference papers lirmm-01119576v1

Built-In Self-Test for Manufacturing TSV Defects before bonding

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre , Hakim Zimouche
VTS: VLSI Test Symposium, Apr 2014, Napa, CA, United States. ⟨10.1109/VTS.2014.6818771⟩
Conference papers lirmm-00989682v1
Image document

2D to 3D Test Pattern Retargeting Using IEEE P1687 Based 3D DFT Architectures

Yassine Fkih , Pascal Vivet , Bruno Rouzeyre , Marie-Lise Flottes , Giorgio Di Natale
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2014, Tampa, FL, United States. pp.386-391, ⟨10.1109/ISVLSI.2014.83⟩
Conference papers lirmm-01119605v1

Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS

Jean-Max Dutertre , Rodrigo Possamai Bastos , Olivier Potin , Marie-Lise Flottes , Bruno Rouzeyre
25th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2014), Sep 2014, Berlin, Germany
Conference papers hal-03094235v1
Image document

A Novel Hardware Logic Encryption Technique for thwarting Illegal Overproduction and Hardware Trojans

Sophie Dupuis , Papa-Sidy Ba , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
IOLTS: International On-Line Testing Symposium, Jul 2014, Platja d'Aro, Girona, Spain. pp.49-54, ⟨10.1109/IOLTS.2014.6873671⟩
Conference papers lirmm-01025275v1
Image document

Laser attacks on integrated circuits: from CMOS to FD-SOI

Jean-Max Dutertre , Stephan de Castro , Alexandre Sarafianos , Noémie Boher , Bruno Rouzeyre
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, May 2014, Santorin, Greece. ⟨10.1109/DTIS.2014.6850664⟩
Conference papers emse-01099042v1
Image document

Simulating Laser Effects on ICs, from Physical Level to Gate Level: a comprehensive approach

Feng Lu , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
TRUDEVICE Workshop, May 2014, Paderborn, Germany
Conference papers lirmm-01119614v1
Image document

A smart test controller for scan chains in secure circuits

Jean da Rolt , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
IOLTS: International On-Line Testing Symposium, Jul 2013, Chania, Greece. pp.228-229, ⟨10.1109/IOLTS.2013.6604085⟩
Conference papers lirmm-01430814v1
Image document

A 3D IC BIST for pre-bond test of TSVs using Ring Oscillators

Yassine Fkih , Pascal Vivet , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
NEWCAS: New Circuits and Systems, Jun 2013, Paris, France. pp.001-004
Conference papers lirmm-00838524v1
Image document

Identification of Hardware Trojans triggering signals

Sophie Dupuis , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
First Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, May 2013, Avignon, France
Conference papers lirmm-00991360v1

Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection

Jean-Max Dutertre , Rodrigo Possamai Bastos , Olivier Potin , Marie-Lise Flottes , Bruno Rouzeyre
ESREF: European Symposium on Reliability of Electron devices, Failure physics and analysis, Sep 2013, Arcachon, France. pp.B3c-2 #68
Conference papers hal-00872705v1
Image document

Laser-Induced Fault Simulation

Feng Lu , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
EUROMICRO DSD/SEAA, Sep 2013, Santander, Spain. pp.609-614, ⟨10.1109/DSD.2013.72⟩
Conference papers lirmm-01430807v1

A BIST Method for TSVs Pre-Bond Test

Hakim Zimouche , Marie-Lise Flottes , Bruno Rouzeyre , Giorgio Di Natale
IDT'13: 8th IEEE International Design & Test Symposium, Dec 2013, Marrakesh, Morocco. pp.1-6, ⟨10.1109/IDT.2013.6727081⟩
Conference papers lirmm-00989727v1

TSVs Pre-Bond Testing: a test scheme for capturing BIST responses

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre , Hakim Zimouche
3D-Test: Testing Three-Dimensional Stacked Integrated Circuits, Sep 2013, Anaheim, CA, United States
Conference papers lirmm-00989707v1
Image document

A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults

Rodrigo Possamai Bastos , Frank Sill Torres , Jean-Max Dutertre , Marie-Lise Flottes , Giorgio Di Natale
PATMOS: Power and Timing Modeling, Optimization and Simulation, Sep 2013, Karlsruhe, Germany. pp.157-163, ⟨10.1109/PATMOS.2013.6662169⟩
Conference papers lirmm-00968621v1
Image document

3D Design For Test Architectures Based on IEEE P1687

Yassine Fkih , Pascal Vivet , Bruno Rouzeyre , Marie-Lise Flottes , Giorgio Di Natale
4th IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits (3D-TEST), Sep 2013, Anaheim, CA, United States
Conference papers lirmm-00989717v1
Image document

A Bulk Built-in Sensor for Detection of Fault Attacks

Rodrigo Possamai Bastos , Franck Sill Torres , Jean Max Dutertre , Marie-Lise Flottes , Giorgio Di Natale
HOST: Hardware-Oriented Security and Trust, Jun 2013, Austin, TX, United States. pp.51-54, ⟨10.1109/HST.2013.6581565⟩
Conference papers lirmm-01430800v1

Circuits intégrés en 3D

Rodolphe Giroudeau , Florent Hernandez , Michel Gendreau , Marie-Lise Flottes , Giorgio Di Natale
ROADEF: Recherche Opérationnelle et Aide à la Décision, Apr 2012, Angers, France
Conference papers lirmm-00805058v1

Novel transient-fault detection circuit featuring enhanced bulk built-in current sensor with low-power sleep-mode

Rodrigo Possamai Bastos , Frank Sill Torres , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
ESREF: European Symposium on Reliability of Electron devices, Failure physics and analysis, Oct 2012, Cagliari, Italy
Conference papers hal-00867864v1

Are Advanced DfT Structures Sufficient for Preventing Scan-Attacks?

Jean da Rolt , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
VTS'12: 30th IEEE VLSI Test Symposium, Apr 2012, Maui, Hawai, United States. pp.246-251
Conference papers lirmm-00694536v1
Image document

A Scan-based Attack on Elliptic Curve Cryptosystems in presence of Industrial Design-for-Testability Structures

Jean da Rolt , Bruno Rouzeyre , Marie-Lise Flottes , Giorgio Di Natale , Amitabh Das
IEEE International Symposium on Defect and Fault Tolerance in VLSI & Nanotechnology Systems, United States. http://www.dfts.org/
Conference papers lirmm-00744472v1
Image document

On-Chip Comparison for Testing Secure ICs

Jean da Rolt , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
DCIS 2012 - 27th Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France. pp.112-117
Conference papers lirmm-00795205v1
Image document

A New Scan Attack on RSA in Presence of Industrial Countermeasures

Jean da Rolt , Amitabh Das , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
COSADE: Constructive Side-Channel Analysis and Secure Design, May 2012, Darmstadt, Germany. pp.89-104, ⟨10.1007/978-3-642-29912-4_8⟩
Conference papers lirmm-00719986v1
Image document

Timing Issues for an Efficient Use of Concurrent Error Detection Codes

Rodrigo Possamai Bastos , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
LATW: Latin American Test Workshop, Mar 2011, Porto de Galinhas, Brazil. pp.1-6, ⟨10.1109/LATW.2011.5985933⟩
Conference papers lirmm-00627427v1

Power Consumption Traces Realignment to Improve Differential Power Analysis

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre , Miroslav Valka , Denis Real
DDECS'11: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits ans Systems, Germany. pp.201-206
Conference papers lirmm-00592005v1
Image document

New side-channel attack against scan chains

Jean da Rolt , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
9th CryptArchi Workshop (2011), Jun 2011, Bochum, Germany. pp.2
Conference papers lirmm-00648575v1

Scan Attacks and Countermeasures in Presence of Scan Response Compactors

Jean da Rolt , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
ETS: European Test Symposium, May 2011, Trondheim, Norway. pp.19-24, ⟨10.1109/ETS.2011.30⟩
Conference papers lirmm-00647062v1
Image document

A New Bulk Built-in Current Sensor-Based Strategy for Dealing with Long-Duration Transient Faults in Deep-Submicron Technologies

Rodrigo Possamai Bastos , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
DFT'2011: International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2011, Vancouver, Canada. pp.302-308, ⟨10.1109/DFT.2011.15⟩
Conference papers lirmm-00701789v1
Image document

How to Sample Results of Concurrent Error Detection Schemes in Transient Fault Scenarios?

Rodrigo Possamai Bastos , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
RADECS: Radiation and Its Effects on Components and Systems, Sep 2011, Sevilla, Spain. pp.635-642, ⟨10.1109/RADECS.2011.6131361⟩
Conference papers lirmm-00701776v1
Image document

New Security Threats Against Chips Containing Scan Chain Structures

Jean da Rolt , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
HOST'11: IEEE International Symposium on Hardware-Oriented Security and Trust, San Diego, CA, United States. pp.105-110
Conference papers lirmm-00599690v1

Ensuring High Testability without Degrading Security

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
DDECS'10: IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Vienna, Austria. pp.6
Conference papers lirmm-00480710v1
Image document

Evaluation of Concurrent Error Detection Techniques on the Advanced Encryption Standard

Kaouthar Bousselam , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
ETS: European Test Symposium, May 2010, Prague, Czech Republic
Conference papers lirmm-00493247v1

Evaluation of Concurrent Error Detection Techniques on the Advanced Encryption Standard

Kaouthar Bousselam , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
IOLTS: International On-Line Testing Symposium, Jul 2010, Corfu, Greece. pp.223-228, ⟨10.1109/IOLTS.2010.5560196⟩
Conference papers lirmm-00539232v1

Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
DELTA'10: Fifth IEEE International Symposium on Electronic Design, Test and Application, Jan 2010, Ho Chi Minh City, Vietnam. pp.256-261
Conference papers lirmm-00539993v1

Waveforms re-Alignment to Improve DPA Attacks

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre , Miroslav Valka
CryptArchi: Cryptographic Architectures, Jun 2010, Gif-sur-Yvette, France
Conference papers lirmm-00539994v1
Image document

Ensuring High Testability without Degrading Security

Marie-Lise Flottes , Giorgio Di Natale , Paolo Maistri , Bruno Rouzeyre , Régis Leveugle
ETS: European Test Symposium, May 2009, Seville, Spain
Conference papers lirmm-00407163v1

Execution Time Reduction of Differential Power Analysis Experiments

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
LATW'09: 10th Latin-American Test Workshop, Mar 2009, Armaçao dos Buzios, Brazil, pp.1-5, ⟨10.1109/LATW.2009.4813819⟩
Conference papers lirmm-00367712v1

Tutorial on Design For Testability & Digital Security

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
IEEE 10th Latin American Test Workshop, 2009, Buzios, Brazil
Conference papers lirmm-00407161v1

Low Cost Self-Test of Crypto-Devices

Giorgio Di Natale , Marion Doulcier , Marie-Lise Flottes , Bruno Rouzeyre
WDSN'08: 2nd Workshop on Dependable and Secure Nanocomputing, Jun 2008, Anchorage, Canada, United States. pp.41-46
Conference papers lirmm-00295108v1
Image document

Observability of Stuck-at-Faults with Differential Power Analysis

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
LATW'08: IEEE Latin American Test Workshop, Feb 2008, Mexico. pp.N/A
Conference papers lirmm-00295498v1

Initialisatioin des Circuits Séquentiels Avant Test Intégré et Scan Partiel

Isabelle Vogel , Marie-Lise Flottes , Christian Landrault
Colloque du GDR CAO de Circuits et Systèmes Intégrés, Paris (France), France. pp. 39-42
Conference papers lirmm-00269335v1
Image document

An Integrated Validation Environment for Differential Power Analysis

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
DELTA: Electronic Design, Test and Applications, Jan 2008, Hong Kong, China. pp.527-532, ⟨10.1109/DELTA.2008.61⟩
Conference papers lirmm-00407165v1
Image document

A Reliable Architecture for Substitution Boxes in Integrated Cryptographic

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
DCIS'08: Conference on Design of Circuits and Integrated Systems, Nov 2008, pp.27-32
Conference papers lirmm-00363783v1

Power Supply Investigation for Wireless Wafer Test

Ziad Noun , Philippe Cauvet , Marie-Lise Flottes , Serge Bernard , David Andreu
LATW'08: 9th Latin-American Test Workshop, Mar 2008, Puebla, Mexico. pp.165-170
Conference papers lirmm-00260205v1

An Integrated Validation Environment for Differential Power Analysis

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
SAME'08: Sophia-Antipolis Forum on MicroElectronics 2008, Sep 2008, Sophia-Antipolis, France
Conference papers lirmm-00363796v1

A Reliable Architecture for the Advanced Encryption Standard

Giorgio Di Natale , Marion Doulcier , Marie-Lise Flottes , Bruno Rouzeyre
13th IEEE European Test Symposium, May 2008, Verbania, Italy. pp.13-18, ⟨10.1109/ETS.2008.26⟩
Conference papers lirmm-00285868v1

European Network for Test Education

Yves Bertrand , Marie-Lise Flottes , Florence Azaïs , Serge Bernard , Laurent Latorre
DELTA'02: 1st International Workshop on Electronic DesignTest and Applications, Christchurch, New Zeland, pp.230-239
Conference papers lirmm-00268490v1
Image document

Improving the Test of NoC-Based SoCs with Help of Compression Schemes

Erika Cota , Julien Dalmasso , Marie-Lise Flottes , Bruno Rouzeyre
ISVLSI: IEEE Symposium on Very Large Scale Integration, Apr 2008, Montpellier, France. pp.139-144, ⟨10.1109/ISVLSI.2008.86⟩
Conference papers lirmm-00271574v1
Image document

AES-based BIST: Self-test, Test Pattern Generation and Signature Analysis

Marion Doulcier , Marie-Lise Flottes , Bruno Rouzeyre
4th IEEE International Symposium on Electronic Design, Test and Applications (DELTA), Jan 2008, Hong-Kong, China. pp.314-321, ⟨10.1109/DELTA.2008.86⟩
Conference papers lirmm-00258769v1

Stuck-at-Faults Test using Differential Power Analysis

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
LPonTR'08: Workshop on Low Power Design Impact on Test and Reliability, May 2008, Italy
Conference papers lirmm-00332529v1
Image document

L'auto-test d'un coeur de chiffrement AES

Marion Doulcier , Marie-Lise Flottes , Bruno Rouzeyre
JNRDM'08 : Journées Nationales du Réseau Doctoral en Microélectronique, May 2008, France. pp.4
Conference papers lirmm-00325878v1
Image document

A Novel Parity Bit Scheme for SBOX in AES Circuits

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
IEEE Design and Diagnostics of Electronic Circuits and Systems (DDECS), Apr 2007, Cracovie, Poland. pp.267-271, ⟨10.1109/DDECS.2007.4295295⟩
Conference papers lirmm-00141799v1
Image document

Utilisation de ressources cryptographiques pour le test des circuits sécurisés

Marie-Lise Flottes , Marion Doulcier , Bruno Rouzeyre
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Conference papers lirmm-00203332v1
Image document

AES vs LFSR Based Test Pattern Generation: A Comparative Study

Marion Doulcier , Marie-Lise Flottes , Bruno Rouzeyre
LATW: Latin American Test Workshop, Mar 2007, Cuzco, Peru. pp.314-321
Conference papers lirmm-00138831v1

On-Line Self-Test of AES Hardware Implementations

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
DSN'07: Workshop on Dependable and Secure Nanocomputing, Jun 2007, Edinburgh, United Kingdom
Conference papers lirmm-00163405v1
Image document

Test Data Compression and TAM Design

Julien Dalmasso , Marie-Lise Flottes , Bruno Rouzeyre
VLSI-SoC 2007 - IFIP International Conference on Very Large Scale Integration, Oct 2007, Atlanta, GA, United States. pp.178-183, ⟨10.1109/VLSISOC.2007.4402494⟩
Conference papers lirmm-00186171v1
Image document

An On-Line Fault Detection Scheme for SBoxes in Secure Circuits

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
IOLTS 2007 - 13th IEEE International On-Line Testing and Robust System Design Symposium, Jul 2007, Heraklion, Crete, Greece. pp.57-62, ⟨10.1109/IOLTS.2007.16⟩
Conference papers lirmm-00163244v1

Test and Security

Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre , Marion Doulcier
CryptArchi: Cryptographic Architectures, Jun 2007, Montpellier, France
Conference papers lirmm-00163017v1
Image document

Compression de Données de Test : Réduction du Nombre de Broches et Gain en Temps de Test

Julien Dalmasso , Marie-Lise Flottes , Bruno Rouzeyre
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, May 2006, Rennes, France
Conference papers lirmm-00102830v1

Testing System-in-Package Wirelessly

Serge Bernard , Marie-Lise Flottes , Philippe Cauvet , Hervé Fleury , Fabrice Verjus
LATW'06: 7th Latin American Test Workshop, 2006, Buenos Aires, Argentina. pp.73-78
Conference papers lirmm-00102751v1

A Secure Scan Design Methodology

David Hély , Frédéric Bancel , Marie-Lise Flottes , Bruno Rouzeyre
LATW'06: 7th IEEE Latin American Test Workshop, Mar 2006, Buenos Aires, Argentina. pp.81-86
Conference papers lirmm-00102752v1

Secure Scan Techniques: a Comparison

David Hély , Frédéric Bancel , Marie-Lise Flottes , Bruno Rouzeyre
IOLTS: International On-Line Testing Symposium, Jul 2006, Como, Italy. pp.119-124, ⟨10.1109/IOLTS.2006.55⟩
Conference papers lirmm-00102857v1

Fitting ATE Channels with Scan Chains: A Comparison Between a Test Data Compression Technique and Serial Loading of Scan Chains

Julien Dalmasso , Marie-Lise Flottes , Bruno Rouzeyre
DELTA'06: Third IEEE International Workshop on Electronics DesignTest & Applications, Kuala Lumpur (Malaysia), pp.295-300
Conference papers lirmm-00102704v1
Image document

Testing System-In-Package Wirelessly

Serge Bernard , David Andreu , Marie-Lise Flottes , Philippe Cauvet , Hervé Fleury
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Sep 2006, Tunis, Tunisia. pp.222-226
Conference papers lirmm-00094916v1

Scan Pattern Watermarking

David Hely , Frédéric Bancel , Marie-Lise Flottes , Bruno Rouzeyre
LATW'06: 7th IEEE Latin American Test Workshop, Mar 2006, Buenos Aires, pp.63-67
Conference papers lirmm-00102753v1
Image document

A secure Scan Design Methodology

David Hély , Frédéric Bancel , Marie-Lise Flottes , Bruno Rouzeyre
DATE: Design, Automation and Test in Europe, Mar 2006, Munich, Germany. pp.1177-1178, ⟨10.1109/DATE.2006.244019⟩
Conference papers lirmm-00132516v1
Image document

Scan Design and Secure Chips : Can They Work Together

David Hely , Frédéric Bancel , Marie-Lise Flottes , Bruno Rouzeyre
SAME'05: Sophia-Antipolis Forum on MicroElectronics, Oct 2005, Sophia-Antipolis, France
Conference papers lirmm-00106546v1
Image document

Test Engineering Education in Europe: The EuNICE Test Project

Laurent Latorre , Yves Bertrand , Michel Robert , Marie-Lise Flottes
EDUTECH'05, 2005, France
Conference papers lirmm-00106506v1
Image document

Mutation Sampling Technique for the Generation of Structural Test Data

Mathieu Scholivé , Vincent Beroulle , Chantal Robach , Marie-Lise Flottes , Bruno Rouzeyre
DATE 2005 - 8th Design, Automation and Test in Europe Conference and Exhibition, Mar 2005, Munich, Germany. pp.1022-1023, ⟨10.1109/DATE.2005.220⟩
Conference papers hal-00181680v1

Test Control for Secure Scan Designs

David Hely , Frédéric Bancel , Marie-Lise Flottes , Bruno Rouzeyre
ETS: European Test Symposium, May 2005, Tallinn, Estonia. pp.190-195
Conference papers lirmm-00106011v1
Image document

Mutation Sampling Technique for the Generation of Structural Test Data

Mathieu Scholivé , Vincent Beroulle , Chantal Robach , Marie-Lise Flottes , Bruno Rouzeyre
DATE 2005 - 8th Design, Automation and Test in Europe Conference and Exhibition, Mar 2005, Munich, Germany. pp.1022-1023, ⟨10.1109/DATE.2005.220⟩
Conference papers lirmm-00105978v1

Mutation sampling technique for the generation of structural test data

Mathieu Scholivé , Vincent Beroulle , Chantal Robach , Marie-Lise Flottes , Bruno Rouzeyre
6th IEEE Latin American Test Workshop, Mar 2005, Salvador, Bahia, Brazil
Conference papers hal-00378490v1

Test Digital, Test de Mémoires, Test Mixte : 5 Centres de Compétence pour la Formation en Europe

Laurent Latorre , Florence Azaïs , Marie-Lise Flottes , Serge Bernard , Régis Lorival
CNFM'04 : 8ème Journées Pédagogiques du Comité National de Formation en Microélectronique, 2004, Saint Malo, France. p. 242
Conference papers lirmm-00108671v1
Image document

Scan design and secure chip [secure IC testing]

David Hely , Marie-Lise Flottes , Frédéric Bancel , Bruno Rouzeyre , Nicolas Berard
IOLTS: International On-Line Testing Symposium, Jul 2004, Madeira Island, Portugal. pp.219-224, ⟨10.1109/OLT.2004.1319691⟩
Conference papers lirmm-00108909v1

On Using Test Vector Differences for Reducing Test Pin Numbers

Marie-Lise Flottes , Régis Poirier , Bruno Rouzeyre
DELTA'04: 2nd International Workshop on Electronic DesignTest and Applications, Jan 2004, Perth (Australia), pp.275-280
Conference papers lirmm-00108832v1
Image document

An Arithmetic Structure for Test Data Horizontal Compression

Marie-Lise Flottes , Régis Poirier , Bruno Rouzeyre
DATE 2004 - 7th Design, Automation and Test in Europe Conference and Exhibition, Feb 2004, Paris, France. pp.428-434, ⟨10.1109/DATE.2004.1268884⟩
Conference papers lirmm-00108837v1

Testing a Secure Device: High Coverage with Very Low Observability

Marie-Lise Flottes
ITC'04: International Test Conference, Oct 2004
Conference papers lirmm-00109147v1
Image document

Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competences in Europe

Marie-Lise Flottes , Yves Bertrand , Luz Maria Balado Suarez , Emili Lupon , Anton Biasizzo
DELTA: Electronic Design, Test and Applications, Jan 2004, Perth, Australia. pp.135-139
Conference papers lirmm-00108831v1

User-Constrained Test Architecture Design for Modular SOC Testing

L. Krundel , S. Kumar Goel , E.J. Marinissen , Marie-Lise Flottes , Bruno Rouzeyre
ETS: European Test Symposium, May 2004, Ajaccio, Corsica, France. pp.80-85, ⟨10.1109/ETSYM.2004.1347611⟩
Conference papers lirmm-00108903v1

Structural and Functional Analysis for Initialization of High Pipelined Industrial BISTed Circuits Using Partial Reset

Isabelle Vogel , Marie-Lise Flottes , Christian Landrault
LATW: 4th IEEE Latin American Test Workshop, Natal, Brazil. pp.84-89
Conference papers lirmm-00269462v1
Image document

An Efficient Approach to SoC Wrapper Design, TAM Configuration and Test Scheduling

Julien Pouget , Erik Larsson , Zebo Peng , Marie-Lise Flottes , Bruno Rouzeyre
ETW: European Test Workshop, 2003, Maastricht, Netherlands. pp.51-56
Conference papers lirmm-00191948v1
Image document

Software-Based Testing of Sequential VHDL Descriptions

Mathieu Scholivé , Vincent Beroulle , Chantal Robach , Marie-Lise Flottes , Bruno Rouzeyre
8th IEEE European Test Workshop (ETW), May 2003, Maastricht, Netherlands. pp.199-200
Conference papers lirmm-00269437v1

Test Engineering Education in Europe: The EuNICE-Test Project

Yves Bertrand , Marie-Lise Flottes , Luz Balado , Joan Figueras , Anton Biasizzo
MSE: Microelectronic Systems Education, Jun 2003, Anaheil, CA, United States. pp.85-86, ⟨10.1109/MSE.2003.1205266⟩
Conference papers lirmm-00269541v1
Image document

A Remote Access to Engineering Test Facilities for the Distant Education of European Microelectronics Students

Yves Bertrand , Marie-Lise Flottes , Florence Azaïs , Serge Bernard , Laurent Latorre
32nd Annual Frontiers in Education (FIE), Nov 2002, Boston, MA, United States. pp.T2E-24, ⟨10.1109/FIE.2002.1157943⟩
Conference papers lirmm-00269423v1

EuNICE-Test Project: A remote Access to Engineering Test for European Universities

Yves Bertrand , Marie-Lise Flottes , Florence Azaïs , Serge Bernard , Laurent Latorre
EWME: European Workshop on Microelectronics Education, 2002, Vigo, Spain. pp.133-136
Conference papers lirmm-00268489v1
Image document

A Heuristic for Test scheduling at System Level

Marie-Lise Flottes , Julien Pouget , Bruno Rouzeyre
DATE: Design, Automation and Test in Europe, Mar 2002, Paris, France. pp.1124-1124, ⟨10.1109/DATE.2002.998480⟩
Conference papers lirmm-00268503v1

A Simple and Effective Compression Scheme for Test Pins Reduction

Marie-Lise Flottes , Régis Poirier , Bruno Rouzeyre
HLDVT 2002 - 7th IEEE International High Level Design Validation and Test Workshop, Oct 2002, Cannes, France. pp.165-168, ⟨10.1109/HLDVT.2002.1224447⟩
Conference papers lirmm-00269326v1
Image document

Initialization of Partially LBISTed Sequential Circuits

Isabelle Vogel , Marie-Lise Flottes , Christian Landrault
ETW: European Test Workshop, May 2002, Corfou, Greece
Conference papers lirmm-00269339v1

Is high level test synthesis just design for test?

Christian Landrault , Marie-Lise Flottes , Bruno Rouzeyre
ITC: International Test Conference, Oct 1995, Washington, DC, United States. pp.294-298, ⟨10.1109/TEST.1995.529846⟩
Conference papers lirmm-02288898v1
Image document

Sécurité et intégrité dans un Contexte Embarqué

Sébastien Lapeyre , Nicolas Valette , Marc Merandat , Marie-Lise Flottes , Bruno Rouzeyre
15e Colloque National du GDR SoC², Jun 2021, Rennes, France
Conference poster lirmm-03361957v1
Image document

Encryption Techniques for Test Infrastructures

Emanuele Valea , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
13e Colloque National Du GDR SoC², Jun 2019, Montpellier, France.
Conference poster lirmm-02306922v1
Image document

Scan chain encryption, a countermeasure against scan attacks

Mathieu da Silva , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
PHISIC: Practical Hardware Innovations in Security Implementation and Characterization, May 2018, Gardanne, France. , Workshop on Practical Hardware Innovations in Security Implementation and Characterization, 2018
Conference poster lirmm-01882565v2
Image document

Sécurité des moyens de test des SoC

Mathieu da Silva , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
Journée thématique des GDR SoC² et Sécurité Informatique : Sécurité des SoC complexes hétérogènes – de la TEE au matériel, Sep 2018, Paris, France. 2018
Conference poster lirmm-01882552v1
Image document

SECCS: SECure Context Saving for IoT Devices

Emanuele Valea , Mathieu da Silva , Giorgio Di Natale , Marie-Lise Flottes , Sophie Dupuis
12e Colloque National du GDR SoC/SiP, Jun 2018, Paris, France. 2018
Conference poster hal-02042659v1
Image document

Scan chain encryption in Test Standards

Mathieu da Silva , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
SURREALIST: SecURity, REliAbiLity, test, prIvacy, Safety and Trust of Future Devices, May 2018, Bremen, Germany. , Workshop on SecURity, REliAbiLity, test, prIvacy, Safety and Trust of Future Devices, 2018
Conference poster lirmm-01882578v2
Image document

Stream cipher-based scan encryption in test standards

Mathieu da Silva , Emanuele Valea , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
12e Colloque National du GDR SoC/SiP, Jun 2018, Paris, France. 2018
Conference poster lirmm-01867283v1
Image document

Scan Chain Encryption for the Test, Diagnosis and Debug of Secure Circuits

Mathieu da Silva , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
SETS: South European Test Seminar, Mar 2017, Alpe d'Huez, France. , 2017
Conference poster lirmm-01892667v1
Image document

Sécurisation des structures de test : étude comparative

Mathieu da Silva , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
11e Colloque National du GDR SoC/SiP, Jun 2017, Bordeaux, France. 2017
Conference poster lirmm-01867279v1

Detection and Prevention of Hardware Trojan through Logic Testing

Papa-Sidy Ba , Sophie Dupuis , Marie-Lise Flottes , Giorgio Di Natale , Bruno Rouzeyre
TRUDEVICE, Nov 2016, Barcelona, Spain. , 4th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, Manufacturing test of secure devices / Reverse engineering countermeasures / Other topics, pp.#33, 2016, Posters IV
Conference poster lirmm-01430007v1
Image document

Design of Bulk Built-In Current Sensors to Detect Single Event Effects and Laser-Induced Fault Injection Attempts

Jean-Max Dutertre , Rodrigo Possamai Bastos , Olivier Potin , Marie-Lise Flottes , Giorgio Di Natale
Joint MEDIAN–TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands. 2014
Conference poster emse-01099040v1
Image document

tLIFTING : A Multi-level Delay-annotated Fault Simulator for Digital Circuits

Giorgio Di Natale , Marie-Lise Flottes , Feng Lu , Bruno Rouzeyre
DCIS 2012 - 27th Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France. , 2012
Conference poster lirmm-00799892v1
Image document

Calibrating Bulk Built-in Current Sensors for Detecting Transient Faults

Rodrigo Possamai Bastos , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
Colloque GDR SoC-SiP, 2012, Lyon, France. 2012, Colloque National du Groupement de Recherche System-On-Chip et System-In-Package
Conference poster lirmm-00715126v1

Exact wafer matching process wafer to wafer inegration

Rodolphe Giroudeau , Giorgio Di Natale , Marie-Lise Flottes , Florent Hernandez
3D Integration Applications, 2012, Grenoble, France. Workshop on 3D Integration Applications, Technology, Architecture, Design, Automation, and Test, 2012
Conference poster lirmm-00805059v1
Image document

Timing Issues of Transient Faults in Concurrent Error Detection Schemes

Rodrigo Possamai Bastos , Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
GdR SoC-SiP'2011: Colloque national du Groupement de Recherche System-On-Chip et System-In-Package, Jun 2011, Lyon, France. , http://www2.lirmm.fr/~w3mic/SOCSIP/, 2011
Conference poster lirmm-00701798v1
Image document

TOETS: Work Package 1

Philippe Cauvet , Olivier Potin , Marie-Lise Flottes , Serge Bernard , David Andreu
The European Nanoelectronics Forum 2011, Nov 2011, Dublin, Ireland. , 2011
Conference poster lirmm-00653039v1

Wireless Wafer Test for Iterative Testing During System Assembly

Ziad Noun , Philippe Cauvet , Marie-Lise Flottes , David Andreu , Serge Bernard
3D-Test: Testing Three-Dimensional Stacked Integrated Circuits, Nov 2010, Austin, Texas, United States. , 1st IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits, 2010
Conference poster lirmm-00537849v1

Wireless Test Structure for Integrated Systems

Ziad Noun , Philippe Cauvet , Marie-Lise Flottes , David Andreu , Serge Bernard
ITC'2008: International Test Conference, Oct 2008, Santa Clara, CA, United States. pp.N/A, 2008, ⟨10.1109/TEST.2008.4700704⟩
Conference poster lirmm-00375077v1
Image document

TAM Design and Test Data Compression for SoC Test Cost Reduction

Julien Dalmasso , Marie-Lise Flottes , Bruno Rouzeyre
ETS: European Test Symposium, May 2007, Freiburg, Germany. 12th IEEE European Test Symposium, pp.241-246, 2007
Conference poster lirmm-00159044v1
Image document

Improving NoC-based Testing Through Compression Schemes

Erika Cota , Julien Dalmasso , Marie-Lise Flottes , Bruno Rouzeyre
DATE: Design, Automation and Test in Europe, Apr 2007, Nice, France. , 2007
Conference poster lirmm-00170833v1

A Dependable Parallel Architecture for SBoxes

Giorgio Di Natale , Marie-Lise Flottes , Bruno Rouzeyre
ReCoSoc'07: International Workshop on Reconfigurable Communication Centric System-On-Chips, Jun 2007, Montpellier, France. pp.CD-ROM, 2007
Conference poster lirmm-00163414v1

Test Engineering Education in Europe: The CRTC Experience Through the EuNICE-Test Project

Laurent Latorre , Yves Bertrand , Marie-Lise Flottes , Michel Robert
Achim Rettberg and Christophe Bobda. IFIP TC10 Working Conference: EduTech'05, Oct 2005, France. , pp.63-77, 2005
Conference poster lirmm-00106564v1