|
Logic Locking: Exploration of a new key-gate based on tristate logic
Sophie Dupuis
,
Nassim Riadi
,
Clémy Moroukian
,
Florence Azaïs
,
Marie-Lise Flottes
Communication dans un congrès
lirmm-04564164
v1
|
|
A Novel March Test Algorithm for Testing 8T SRAM-based IMC Architectures
Lila Ammoura
,
Marie-Lise Flottes
,
Patrick Girard
,
Jean-Philippe Noel
,
Arnaud Virazel
Communication dans un congrès
hal-04658584
v1
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Power Analysis Attack Against post-SAT Logic Locking schemes
Nassim Riadi
,
Florent Bruguier
,
Pascal Benoit
,
Sophie Dupuis
,
Marie-Lise Flottes
Communication dans un congrès
lirmm-04628663
v1
|
|
Resynthesis-based Attacks Against Logic Locking
Felipe Almeida
,
Levent Aksoy
,
Quang-Linh Nguyen
,
Sophie Dupuis
,
Marie-Lise Flottes
et al.
Communication dans un congrès
lirmm-04053224
v1
|
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Intra-cell Resistive-Open Defect Analysis on a Foundry 8T SRAM-based IMC Architecture
Lila Ammoura
,
Marie-Lise Flottes
,
Patrick Girard
,
Jean-Philippe Noël
,
Arnaud Virazel
Communication dans un congrès
hal-04164663
v1
|
|
Analysis of Resistive-Open Defects on a Foundry 8T SRAM-based IMC Architecture
Lila Ammoura
,
Marie-Lise Flottes
,
Patrick Girard
,
Jean-Philippe Noël
,
Arnaud Virazel
17e Colloque National du GDR SoC², Jun 2023, Lyon, France
Communication dans un congrès
lirmm-04565688
v1
|
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Leveraging Layout-based Effects for Locking Analog ICs
Muayad Aljafar
,
Florence Azaïs
,
Marie-Lise Flottes
,
Samuel Pagliarini
ASHES 2022 - 6th Workshop on Attacks and Solutions in Hardware Security @CCS 2022, Nov 2022, Los Angeles, CA, United States. pp.5-13, ⟨10.1145/3560834.3563826⟩
Communication dans un congrès
lirmm-04080258
v1
|
|
Analysis of Read Port Short Defects in an 8T SRAM-based IMC Architecture
Lila Ammoura
,
Marie-Lise Flottes
,
Patrick Girard
,
Jean-Philippe Noel
,
Arnaud Virazel
16e Colloque National du GDR SoC², Jun 2022, Strasbourg, France
Communication dans un congrès
lirmm-03990078
v1
|
|
A new key-gate insertion strategy for logic locking with high output corruption
Quang-Linh Nguyen
,
Sophie Dupuis
,
Marie-Lise Flottes
THCon 2022 - Toulouse Hacking Convention, ENAC, Apr 2022, Toulouse, France
Communication dans un congrès
lirmm-04048983
v1
|
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A Lightweight, Plug-and-Play and Autonomous JTAG Authentication IP for Secure Device Testing
Sébastien Lapeyre
,
Nicolas Valette
,
Marc Merandat
,
Marie-Lise Flottes
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-03739783
v1
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High-level Intellectual Property Obfuscation via Decoy Constants
Levent Aksoy
,
Quang-Linh Nguyen
,
Felipe Almeida
,
Jaan Raik
,
Marie-Lise Flottes
et al.
Communication dans un congrès
lirmm-03359476
v1
|
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On Preventing SAT Attack with Decoy Key-Inputs
Quang-Linh Nguyen
,
Marie-Lise Flottes
,
Sophie Dupuis
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-03359458
v1
|
|
Preliminary Defect Analysis of 8T SRAM Cells Used for In-Memory Computing
Lila Ammoura
,
Marie-Lise Flottes
,
Patrick Girard
,
Arnaud Virazel
15e Colloque National du GDR SoC², Jun 2021, Rennes, France
Communication dans un congrès
lirmm-03994467
v1
|
|
Preliminary Defect Analysis of 8T SRAM Cells for In-Memory Computing Architectures
Lila Ammoura
,
Marie-Lise Flottes
,
Patrick Girard
,
Arnaud Virazel
DTIS 2021 - 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Jun 2021, Montpellier, France. ⟨10.1109/DTIS53253.2021.9505101⟩
Communication dans un congrès
lirmm-03377433
v1
|
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A Plug and Play Digital ABIST Controller for Analog Sensors in Secure Devices
Sébastien Lapeyre
,
Nicolas Valette
,
Marc Merandat
,
Marie-Lise Flottes
,
Bruno Rouzeyre
et al.
Communication dans un congrès
lirmm-03305266
v1
|
|
A Secure Scan Controller for Protecting Logic Locking
Quang-Linh Nguyen
,
Emanuele Valea
,
Marie-Lise Flottes
,
Sophie Dupuis
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-02995199
v1
|
|
Development and Application of Embedded Test Instruments to Digital, Analog/RFs and Secure ICs
Florence Azaïs
,
Serge Bernard
,
Mariane Comte
,
Bastien Deveautour
,
Sophie Dupuis
et al.
Communication dans un congrès
lirmm-02993384
v1
|
|
Logic Locking a Design-for-Trust IC Design Technique
Marie-Lise Flottes
FETCH 2020 - École d'hiver Francophone sur les Technologies de Conception des Systèmes Embarqués Hétérogènes, Feb 2020, Montréal, Canada
Communication dans un congrès
lirmm-03125660
v1
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Providing Confidentiality and Integrity in Ultra Low Power IoT Devices
Emanuele Valea
,
Mathieu da Silva
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Sophie Dupuis
et al.
DTIS 2019 - 14th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Apr 2019, Mykonos, Greece. ⟨10.1109/DTIS.2019.8735090⟩
Communication dans un congrès
hal-02166920
v1
|
|
Encryption-Based Secure JTAG
Emanuele Valea
,
Mathieu da Silva
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Bruno Rouzeyre
DDECS 2019 - 22nd International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2019, Cluj-Napoca, Romania. pp.1-6, ⟨10.1109/DDECS.2019.8724654⟩
Communication dans un congrès
hal-02149061
v1
|
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A Comprehensive Approach to a Trusted Test Infrastructure
Marc Merandat
,
Vincent Reynaud
,
Emanuele Valea
,
Jerome Quevremont
,
Nicolas Valette
et al.
Communication dans un congrès
lirmm-02306980
v1
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|
Stream Cipher Based Encryption in IEEE Test Standards
Emanuele Valea
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Bruno Rouzeyre
TRUDEVICE 2019 - 8th Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, May 2019, Baden Baden, Germany
Communication dans un congrès
hal-02506743
v1
|
|
The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks
Jean-Max Dutertre
,
Vincent Beroulle
,
Philippe Candelier
,
Louis-Barthelemy Faber
,
Marie-Lise Flottes
et al.
Communication dans un congrès
emse-01856000
v1
|
|
A new secure stream cipher for scan chain encryption
Mathieu da Silva
,
Emanuele Valea
,
Marie-Lise Flottes
,
Sophie Dupuis
,
Giorgio Di Natale
et al.
3rd IEEE International Verification and Security Workshop (IVSW 2018), Jul 2018, Platja d’Aro, Spain. pp.68-73, ⟨10.1109/IVSW.2018.8494852⟩
Communication dans un congrès
lirmm-01867256
v1
|
|
Does stream cipher-based scan chains encryption really prevent scan attacks?
Mathieu da Silva
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Bruno Rouzeyre
TRUDEVICE Workshop, Mar 2018, Dresden, Germany
Communication dans un congrès
lirmm-01867286
v1
|
|
Laser fault injection at the CMOS 28 nm technology node: an analysis of the fault model
Jean-Max Dutertre
,
Vincent Beroulle
,
Philippe Candelier
,
Stephan de Castro
,
Louis-Barthelemy Faber
et al.
Communication dans un congrès
emse-01856008
v1
|
|
Assessing Body Built-In Current Sensors for Detection of Multiple Transient Faults
Raphael Viera
,
Jean-Max Dutertre
,
Marie-Lise Flottes
,
Olivier Potin
,
Giorgio Di Natale
et al.
ESREF 2018 - European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, Oct 2018, Aalborg, Denmark
Communication dans un congrès
hal-04457522
v1
|
|
Encryption of test data: which cipher is better?
Mathieu da Silva
,
Emanuele Valea
,
Marie-Lise Flottes
,
Sophie Dupuis
,
Giorgio Di Natale
et al.
Communication dans un congrès
lirmm-01867249
v1
|
|
SI ECCS: SECure context saving for IoT devices
Emanuele Valea
,
Mathieu da Silva
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Sophie Dupuis
et al.
DTIS 2018 - 13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, Apr 2018, Taormina, Italy. ⟨10.1109/DTIS.2018.8368561⟩
Communication dans un congrès
hal-01740173
v1
|
|
Scan Chain Encryption
Mathieu da Silva
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Bruno Rouzeyre
DOCTIS: Journée des Doctorants de l’école doctorale I2S, 2017, Montpellier, France
Communication dans un congrès
lirmm-01867277
v1
|
|
Experimentations on scan chain encryption with PRESENT
Mathieu da Silva
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-01699258
v1
|
|
Hacking the Control Flow error detection mechanism
Giorgio Di Natale
,
Marie-Lise Flottes
,
Sophie Dupuis
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-01700739
v1
|
|
Scan chain encryption for the test, diagnosis and debug of secure circuits
Mathieu da Silva
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Bruno Rouzeyre
,
Paolo Prinetto
et al.
Communication dans un congrès
lirmm-01699254
v1
|
|
Using Outliers to Detect Stealthy Hardware Trojan Triggering?
Papa-Sidy Ba
,
Sophie Dupuis
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Bruno Rouzeyre
IVSW: International Verification and Security Workshop, Jul 2016, Sant Feliu de Guixols, France
Communication dans un congrès
lirmm-01347119
v1
|
|
Duplication-based Concurrent Detection of Hardware Trojans in Integrated Circuits
Manikandan Palanichamy
,
Papa-Sidy Ba
,
Sophie Dupuis
,
Marie-Lise Flottes
,
Giorgio Di Natale
et al.
TRUDEVICE, Nov 2016, Barcelona, Spain
Communication dans un congrès
lirmm-01385551
v1
|
|
Hardware Trust through Layout Filling: a Hardware Trojan Prevention Technique
Papa-Sidy Ba
,
Sophie Dupuis
,
Manikandan Palanichamy
,
Marie-Lise Flottes
,
Giorgio Di Natale
et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2016, Pittsburgh, United States. pp.254-259, ⟨10.1109/ISVLSI.2016.22⟩
Communication dans un congrès
lirmm-01346529
v1
|
|
Sensitivity to fault laser injection: a comparison between 28nm bulk and FD-SOI technology
Stephan de Castro
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
TRUDEVICE Workshop, Sep 2015, Saint-Malo, France
Communication dans un congrès
lirmm-01234094
v1
|
|
Figure of merits of 28nm Si technologies for implementing laser attack resistant security dedicated circuits
Stephan de Castro
,
Jean-Max Dutertre
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.362-367, ⟨10.1109/ISVLSI.2015.76⟩
Communication dans un congrès
emse-01227138
v1
|
|
Laser-Induced Fault Effects in Security-Dedicated Circuits
Vincent Beroulle
,
Philippe Candelier
,
Stephan de Castro
,
Giorgio Di Natale
,
Jean-Max Dutertre
et al.
Communication dans un congrès
hal-01383737
v1
|
|
Hardware Trojan Prevention using Layout-Level Design Approach
Papa-Sidy Ba
,
Manikandan Palanichamy
,
Sophie Dupuis
,
Marie-Lise Flottes
,
Giorgio Di Natale
et al.
Communication dans un congrès
lirmm-01234072
v1
|
|
Session-less based thermal-aware 3D-SIC test scheduling
Marie-Lise Flottes
,
João Azevedo
,
Giorgio Di Natale
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-01922990
v1
|
|
3D DFT Challenges and Solutions
Yassine Fkih
,
Pascal Vivet
,
Marie-Lise Flottes
,
Bruno Rouzeyre
,
Giorgio Di Natale
et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.603-608, ⟨10.1109/ISVLSI.2015.11⟩
Communication dans un congrès
lirmm-01234076
v1
|
|
Validation Of Single BBICS Architecture In Detecting Multiple Faults
Raphael Andreoni Camponogara-Viera
,
Rodrigo Possamai Bastos
,
Jean-Max Dutertre
,
Olivier Potin
,
Marie-Lise Flottes
et al.
ATS: Asian Test Symposium, Nov 2015, Mumbai, India
Communication dans un congrès
lirmm-01234067
v1
|
|
Multi-segment Enhanced Scan-chains for Secure ICs
Mafalda Cortez
,
Said Hamdioui
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
et al.
TRUDEVICE Workshop, Sep 2015, Saint-Malo, France
Communication dans un congrès
lirmm-01276304
v1
|
|
Hierarchical Secure DfT
Mafalda Cortez
,
Said Hamdioui
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
TRUDEVICE Workshop, Sep 2015, St Malo, France
Communication dans un congrès
lirmm-01234095
v1
|
|
New Testing Procedure for Finding Insertion Sites of Stealthy Hardware Trojans
Sophie Dupuis
,
Bruno Rouzeyre
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Papa-Sidy Ba
DATE 2015 - 18th Design, Automation and Test in Europe Conference and Exhibition, Mar 2015, Grenoble, France. pp.776-781, ⟨10.7873/DATE.2015.1102⟩
Communication dans un congrès
lirmm-01141619
v1
|
|
On the limitations of logic testing for detecting Hardware Trojans Horses
Marie-Lise Flottes
,
Sophie Dupuis
,
Papa-Sidy Ba
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-01257837
v1
|
|
Simulating Laser Effects on ICs, from Physical Level to Gate Level: a comprehensive approach
Feng Lu
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
TRUDEVICE Workshop, May 2014, Paderborn, Germany
Communication dans un congrès
lirmm-01119614
v1
|
|
Laser attacks on integrated circuits: from CMOS to FD-SOI
Jean-Max Dutertre
,
Stephan de Castro
,
Alexandre Sarafianos
,
Noémie Boher
,
Bruno Rouzeyre
et al.
Communication dans un congrès
emse-01099042
v1
|
|
Layout-Aware Laser Fault Injection Simulation and Modeling: from physical level to gate level
Feng Lu
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-01119592
v1
|
|
Design of Bulk Built-In Current Sensors to Detect Single Event Effects and Laser-Induced Fault Injection Attempts
Jean-Max Dutertre
,
Rodrigo Possamai Bastos
,
Olivier Potin
,
Marie-Lise Flottes
,
Giorgio Di Natale
et al.
Joint MEDIAN–TRUDEVICE Open Forum, Sep 2014, Amsterdam, Netherlands
Communication dans un congrès
emse-01099040
v1
|
|
Built-In Self-Test for Manufacturing TSV Defects before bonding
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
,
Hakim Zimouche
Communication dans un congrès
lirmm-00989682
v1
|
|
Customized Cell Detector for Laser-Induced-Fault Detection
Feng Lu
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-01119576
v1
|
|
2D to 3D Test Pattern Retargeting Using IEEE P1687 Based 3D DFT Architectures
Yassine Fkih
,
Pascal Vivet
,
Bruno Rouzeyre
,
Marie-Lise Flottes
,
Giorgio Di Natale
et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2014, Tampa, FL, United States. pp.386-391, ⟨10.1109/ISVLSI.2014.83⟩
Communication dans un congrès
lirmm-01119605
v1
|
|
Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS
Jean-Max Dutertre
,
Rodrigo Possamai Bastos
,
Olivier Potin
,
Marie-Lise Flottes
,
Bruno Rouzeyre
et al.
25th European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2014), Sep 2014, Berlin, Germany
Communication dans un congrès
hal-03094235
v1
|
|
A Novel Hardware Logic Encryption Technique for thwarting Illegal Overproduction and Hardware Trojans
Sophie Dupuis
,
Papa-Sidy Ba
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-01025275
v1
|
|
Identification of Hardware Trojans triggering signals
Sophie Dupuis
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
First Workshop on Trustworthy Manufacturing and Utilization of Secure Devices, May 2013, Avignon, France
Communication dans un congrès
lirmm-00991360
v1
|
|
A 3D IC BIST for pre-bond test of TSVs using Ring Oscillators
Yassine Fkih
,
Pascal Vivet
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
NEWCAS: New Circuits and Systems, Jun 2013, Paris, France. pp.001-004
Communication dans un congrès
lirmm-00838524
v1
|
|
A smart test controller for scan chains in secure circuits
Jean da Rolt
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-01430814
v1
|
|
A Bulk Built-in Sensor for Detection of Fault Attacks
Rodrigo Possamai Bastos
,
Frank Sill Torres
,
Jean Max Dutertre
,
Marie-Lise Flottes
,
Giorgio Di Natale
et al.
Communication dans un congrès
lirmm-01430800
v1
|
|
3D Design For Test Architectures Based on IEEE P1687
Yassine Fkih
,
Pascal Vivet
,
Bruno Rouzeyre
,
Marie-Lise Flottes
,
Giorgio Di Natale
et al.
4th IEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits (3D-TEST), Sep 2013, Anaheim, CA, United States
Communication dans un congrès
lirmm-00989717
v1
|
|
A JTAG based 3D DfT architecture using automatic die detection
Yassine Fkih
,
Pascal Vivet
,
Bruno Rouzeyre
,
Marie-Lise Flottes
,
Giorgio Di Natale
PRIME 2013 - 9th Conference on Ph.D. Research in Microelectronics and Electronics, Jun 2013, Villach, France. pp.341-344, ⟨10.1109/PRIME.2013.6603184⟩
Communication dans un congrès
lirmm-05007359
v1
|
|
Laser-Induced Fault Simulation
Feng Lu
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-01430807
v1
|
|
A BIST Method for TSVs Pre-Bond Test
Hakim Zimouche
,
Marie-Lise Flottes
,
Bruno Rouzeyre
,
Giorgio Di Natale
Communication dans un congrès
lirmm-00989727
v1
|
|
Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection
Jean-Max Dutertre
,
Rodrigo Possamai Bastos
,
Olivier Potin
,
Marie-Lise Flottes
,
Bruno Rouzeyre
et al.
ESREF: European Symposium on Reliability of Electron devices, Failure physics and analysis, Sep 2013, Arcachon, France. pp.B3c-2 #68
Communication dans un congrès
hal-00872705
v1
|
|
TSVs Pre-Bond Testing: a test scheme for capturing BIST responses
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
,
Hakim Zimouche
3D-Test: Testing Three-Dimensional Stacked Integrated Circuits, Sep 2013, Anaheim, CA, United States
Communication dans un congrès
lirmm-00989707
v1
|
|
A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults
Rodrigo Possamai Bastos
,
Frank Sill Torres
,
Jean-Max Dutertre
,
Marie-Lise Flottes
,
Giorgio Di Natale
et al.
Communication dans un congrès
lirmm-00968621
v1
|
|
A New Scan Attack on RSA in Presence of Industrial Countermeasures
Jean da Rolt
,
Amitabh Das
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
et al.
Communication dans un congrès
lirmm-00719986
v1
|
|
On-Chip Comparison for Testing Secure ICs
Jean da Rolt
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
DCIS 2012 - 27th Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France. pp.112-117
Communication dans un congrès
lirmm-00795205
v1
|
|
Circuits intégrés en 3D
Rodolphe Giroudeau
,
Florent Hernandez
,
Michel Gendreau
,
Marie-Lise Flottes
,
Giorgio Di Natale
et al.
ROADEF 2012 - 13e Congrès de la Société Française de Recherche Opérationnelle et d'Aide à la Décision, Apr 2012, Angers, France
Communication dans un congrès
lirmm-00805058
v1
|
|
How to Sample Results of Concurrent Error Detection Schemes in Transient Fault Scenarios?
Rodrigo Possamai Bastos
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00701776
v1
|
|
Novel transient-fault detection circuit featuring enhanced bulk built-in current sensor with low-power sleep-mode
Rodrigo Possamai Bastos
,
Frank Sill Torres
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
ESREF: European Symposium on Reliability of Electron devices, Failure physics and analysis, Oct 2012, Cagliari, Italy
Communication dans un congrès
hal-00867864
v1
|
|
Calibrating Bulk Built-in Current Sensors for Detecting Transient Faults
Rodrigo Possamai Bastos
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Colloque GDR SoC-SiP, 2012, Lyon, France
Communication dans un congrès
lirmm-00715126
v1
|
|
Are Advanced DfT Structures Sufficient for Preventing Scan-Attacks?
Jean da Rolt
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
VTS'12: 30th IEEE VLSI Test Symposium, Apr 2012, Maui, Hawai, United States. pp.246-251
Communication dans un congrès
lirmm-00694536
v1
|
|
A Scan-based Attack on Elliptic Curve Cryptosystems in presence of Industrial Design-for-Testability Structures
Jean da Rolt
,
Bruno Rouzeyre
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Amitabh Das
et al.
IEEE International Symposium on Defect and Fault Tolerance in VLSI & Nanotechnology Systems, United States. http://www.dfts.org/
Communication dans un congrès
lirmm-00744472
v1
|
|
New Security Threats Against Chips Containing Scan Chain Structures
Jean da Rolt
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
HOST'11: IEEE International Symposium on Hardware-Oriented Security and Trust, San Diego, CA, United States. pp.105-110
Communication dans un congrès
lirmm-00599690
v1
|
|
Power Consumption Traces Realignment to Improve Differential Power Analysis
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
,
Miroslav Valka
,
Denis Real
DDECS'11: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits ans Systems, Germany. pp.201-206
Communication dans un congrès
lirmm-00592005
v1
|
|
Timing Issues for an Efficient Use of Concurrent Error Detection Codes
Rodrigo Possamai Bastos
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00627427
v1
|
|
Timing Issues of Transient Faults in Concurrent Error Detection Schemes
Rodrigo Possamai Bastos
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
GdR SoC-SiP'2011: Colloque national du Groupement de Recherche System-On-Chip et System-In-Package, Jun 2011, Lyon, France. http://www2.lirmm.fr/~w3mic/SOCSIP/
Communication dans un congrès
lirmm-00701798
v1
|
|
New side-channel attack against scan chains
Jean da Rolt
,
Marie-Lise Flottes
,
Giorgio Di Natale
,
Bruno Rouzeyre
9th CryptArchi Workshop (2011), Jun 2011, Bochum, Germany. pp.2
Communication dans un congrès
lirmm-00648575
v1
|
|
Scan Attacks and Countermeasures in Presence of Scan Response Compactors
Jean da Rolt
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00647062
v1
|
|
A New Bulk Built-in Current Sensor-Based Strategy for Dealing with Long-Duration Transient Faults in Deep-Submicron Technologies
Rodrigo Possamai Bastos
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
DFT'2011: International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2011, Vancouver, Canada. pp.302-308, ⟨10.1109/DFT.2011.15⟩
Communication dans un congrès
lirmm-00701789
v1
|
|
Waveforms re-Alignment to Improve DPA Attacks
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
,
Miroslav Valka
CryptArchi: Cryptographic Architectures, Jun 2010, Gif-sur-Yvette, France
Communication dans un congrès
lirmm-00539994
v1
|
|
Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
DELTA'10: Fifth IEEE International Symposium on Electronic Design, Test and Application, Jan 2010, Ho Chi Minh City, Vietnam. pp.256-261
Communication dans un congrès
lirmm-00539993
v1
|
|
Ensuring High Testability without Degrading Security
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
DDECS'10: IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Vienna, Austria. pp.6
Communication dans un congrès
lirmm-00480710
v1
|
|
Evaluation of Concurrent Error Detection Techniques on the Advanced Encryption Standard
Kaouthar Bousselam
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
ETS: European Test Symposium, May 2010, Prague, Czech Republic
Communication dans un congrès
lirmm-00493247
v1
|
|
Evaluation of Concurrent Error Detection Techniques on the Advanced Encryption Standard
Kaouthar Bousselam
,
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00539232
v1
|
|
Ensuring High Testability without Degrading Security
Marie-Lise Flottes
,
Giorgio Di Natale
,
Paolo Maistri
,
Bruno Rouzeyre
,
Régis Leveugle
ETS: European Test Symposium, May 2009, Seville, Spain
Communication dans un congrès
lirmm-00407163
v1
|
|
Execution Time Reduction of Differential Power Analysis Experiments
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00367712
v1
|
|
Tutorial on Design For Testability & Digital Security
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
IEEE 10th Latin American Test Workshop, 2009, Buzios, Brazil
Communication dans un congrès
lirmm-00407161
v1
|
|
Stuck-at-Faults Test using Differential Power Analysis
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
LPonTR'08: Workshop on Low Power Design Impact on Test and Reliability, May 2008, Italy
Communication dans un congrès
lirmm-00332529
v1
|
|
AES-based BIST: Self-test, Test Pattern Generation and Signature Analysis
Marion Doulcier
,
Marie-Lise Flottes
,
Bruno Rouzeyre
4th IEEE International Symposium on Electronic Design, Test and Applications (DELTA), Jan 2008, Hong-Kong, China. pp.314-321, ⟨10.1109/DELTA.2008.86⟩
Communication dans un congrès
lirmm-00258769
v1
|
|
L'auto-test d'un coeur de chiffrement AES
Marion Doulcier
,
Marie-Lise Flottes
,
Bruno Rouzeyre
JNRDM'08 : Journées Nationales du Réseau Doctoral en Microélectronique, May 2008, France. pp.4
Communication dans un congrès
lirmm-00325878
v1
|
|
Low Cost Self-Test of Crypto-Devices
Giorgio Di Natale
,
Marion Doulcier
,
Marie-Lise Flottes
,
Bruno Rouzeyre
WDSN'08: 2nd Workshop on Dependable and Secure Nanocomputing, Jun 2008, Anchorage, Canada, United States. pp.41-46
Communication dans un congrès
lirmm-00295108
v1
|
|
Observability of Stuck-at-Faults with Differential Power Analysis
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
LATW'08: IEEE Latin American Test Workshop, Feb 2008, Mexico. pp.N/A
Communication dans un congrès
lirmm-00295498
v1
|
|
An Integrated Validation Environment for Differential Power Analysis
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00407165
v1
|
|
A Reliable Architecture for Substitution Boxes in Integrated Cryptographic
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
DCIS'08: Conference on Design of Circuits and Integrated Systems, Nov 2008, pp.27-32
Communication dans un congrès
lirmm-00363783
v1
|
|
Power Supply Investigation for Wireless Wafer Test
Ziad Noun
,
Philippe Cauvet
,
Marie-Lise Flottes
,
Serge Bernard
,
David Andreu
et al.
LATW'08: 9th Latin-American Test Workshop, Mar 2008, Puebla, Mexico. pp.165-170
Communication dans un congrès
lirmm-00260205
v1
|
|
A Reliable Architecture for the Advanced Encryption Standard
Giorgio Di Natale
,
Marion Doulcier
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00285868
v1
|
|
An Integrated Validation Environment for Differential Power Analysis
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
SAME'08: Sophia-Antipolis Forum on MicroElectronics 2008, Sep 2008, Sophia-Antipolis, France
Communication dans un congrès
lirmm-00363796
v1
|
|
Improving the Test of NoC-Based SoCs with Help of Compression Schemes
Erika Cota
,
Julien Dalmasso
,
Marie-Lise Flottes
,
Bruno Rouzeyre
ISVLSI: IEEE Symposium on Very Large Scale Integration, Apr 2008, Montpellier, France. pp.139-144, ⟨10.1109/ISVLSI.2008.86⟩
Communication dans un congrès
lirmm-00271574
v1
|
|
Test and Security
Marie-Lise Flottes
,
Giorgio Di Natale
,
Bruno Rouzeyre
,
Marion Doulcier
CryptArchi: Cryptographic Architectures, Jun 2007, Montpellier, France
Communication dans un congrès
lirmm-00163017
v1
|
|
An On-Line Fault Detection Scheme for SBoxes in Secure Circuits
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
IOLTS 2007 - 13th IEEE International On-Line Testing and Robust System Design Symposium, Jul 2007, Heraklion, Crete, Greece. pp.57-62, ⟨10.1109/IOLTS.2007.16⟩
Communication dans un congrès
lirmm-00163244
v1
|
|
Test Data Compression and TAM Design
Julien Dalmasso
,
Marie-Lise Flottes
,
Bruno Rouzeyre
VLSI-SoC 2007 - IFIP International Conference on Very Large Scale Integration, Oct 2007, Atlanta, GA, United States. pp.178-183, ⟨10.1109/VLSISOC.2007.4402494⟩
Communication dans un congrès
lirmm-00186171
v1
|
|
A Novel Parity Bit Scheme for SBOX in AES Circuits
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
IEEE Design and Diagnostics of Electronic Circuits and Systems (DDECS), Apr 2007, Cracovie, Poland. pp.267-271, ⟨10.1109/DDECS.2007.4295295⟩
Communication dans un congrès
lirmm-00141799
v1
|
|
AES vs LFSR Based Test Pattern Generation: A Comparative Study
Marion Doulcier
,
Marie-Lise Flottes
,
Bruno Rouzeyre
LATW: Latin American Test Workshop, Mar 2007, Cuzco, Peru. pp.314-321
Communication dans un congrès
lirmm-00138831
v1
|
|
Utilisation de ressources cryptographiques pour le test des circuits sécurisés
Marie-Lise Flottes
,
Marion Doulcier
,
Bruno Rouzeyre
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Communication dans un congrès
lirmm-00203332
v1
|
|
On-Line Self-Test of AES Hardware Implementations
Giorgio Di Natale
,
Marie-Lise Flottes
,
Bruno Rouzeyre
DSN'07: Workshop on Dependable and Secure Nanocomputing, Jun 2007, Edinburgh, United Kingdom
Communication dans un congrès
lirmm-00163405
v1
|
|
A secure Scan Design Methodology
David Hély
,
Frédéric Bancel
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00132516
v1
|
|
Compression de Données de Test : Réduction du Nombre de Broches et Gain en Temps de Test
Julien Dalmasso
,
Marie-Lise Flottes
,
Bruno Rouzeyre
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, May 2006, Rennes, France
Communication dans un congrès
lirmm-00102830
v1
|
|
Scan Pattern Watermarking
David Hely
,
Frédéric Bancel
,
Marie-Lise Flottes
,
Bruno Rouzeyre
LATW'06: 7th IEEE Latin American Test Workshop, Mar 2006, Buenos Aires, pp.63-67
Communication dans un congrès
lirmm-00102753
v1
|
|
A Secure Scan Design Methodology
David Hély
,
Frédéric Bancel
,
Marie-Lise Flottes
,
Bruno Rouzeyre
LATW'06: 7th IEEE Latin American Test Workshop, Mar 2006, Buenos Aires, Argentina. pp.81-86
Communication dans un congrès
lirmm-00102752
v1
|
|
Testing System-in-Package Wirelessly
Serge Bernard
,
Marie-Lise Flottes
,
Philippe Cauvet
,
Hervé Fleury
,
Fabrice Verjus
LATW'06: 7th Latin American Test Workshop, 2006, Buenos Aires, Argentina. pp.73-78
Communication dans un congrès
lirmm-00102751
v1
|
|
Secure Scan Techniques: a Comparison
David Hély
,
Frédéric Bancel
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00102857
v1
|
|
Fitting ATE Channels with Scan Chains: A Comparison Between a Test Data Compression Technique and Serial Loading of Scan Chains
Julien Dalmasso
,
Marie-Lise Flottes
,
Bruno Rouzeyre
DELTA'06: Third IEEE International Workshop on Electronics DesignTest & Applications, Kuala Lumpur (Malaysia), pp.295-300
Communication dans un congrès
lirmm-00102704
v1
|
|
Testing System-In-Package Wirelessly
Serge Bernard
,
David Andreu
,
Marie-Lise Flottes
,
Philippe Cauvet
,
Hervé Fleury
et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Sep 2006, Tunis, Tunisia. pp.222-226
Communication dans un congrès
lirmm-00094916
v1
|
|
Mutation Sampling Technique for the Generation of Structural Test Data
Mathieu Scholivé
,
Vincent Beroulle
,
Chantal Robach
,
Marie-Lise Flottes
,
Bruno Rouzeyre
DATE 2005 - 8th Design, Automation and Test in Europe Conference and Exhibition, Mar 2005, Munich, Germany. pp.1022-1023, ⟨10.1109/DATE.2005.220⟩
Communication dans un congrès
lirmm-00105978
v1
|
|
Mutation sampling technique for the generation of structural test data
Mathieu Scholivé
,
Vincent Beroulle
,
Chantal Robach
,
Marie-Lise Flottes
,
Bruno Rouzeyre
6th IEEE Latin American Test Workshop, Mar 2005, Salvador, Bahia, Brazil
Communication dans un congrès
hal-00378490
v1
|
|
Scan Design and Secure Chips : Can They Work Together
David Hely
,
Frédéric Bancel
,
Marie-Lise Flottes
,
Bruno Rouzeyre
SAME'05: Sophia-Antipolis Forum on MicroElectronics, Oct 2005, Sophia-Antipolis, France
Communication dans un congrès
lirmm-00106546
v1
|
|
Test Engineering Education in Europe: The EuNICE Test Project
Laurent Latorre
,
Yves Bertrand
,
Michel Robert
,
Marie-Lise Flottes
EDUTECH'05, 2005, France
Communication dans un congrès
lirmm-00106506
v1
|
|
Mutation Sampling Technique for the Generation of Structural Test Data
Mathieu Scholivé
,
Vincent Beroulle
,
Chantal Robach
,
Marie-Lise Flottes
,
Bruno Rouzeyre
DATE 2005 - 8th Design, Automation and Test in Europe Conference and Exhibition, Mar 2005, Munich, Germany. pp.1022-1023, ⟨10.1109/DATE.2005.220⟩
Communication dans un congrès
hal-00181680
v1
|
|
Test Control for Secure Scan Designs
David Hely
,
Frédéric Bancel
,
Marie-Lise Flottes
,
Bruno Rouzeyre
ETS: European Test Symposium, May 2005, Tallinn, Estonia. pp.190-195
Communication dans un congrès
lirmm-00106011
v1
|
|
User-Constrained Test Architecture Design for Modular SOC Testing
L. Krundel
,
S. Kumar Goel
,
E.J. Marinissen
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00108903
v1
|
|
Test Digital, Test de Mémoires, Test Mixte : 5 Centres de Compétence pour la Formation en Europe
Laurent Latorre
,
Florence Azaïs
,
Marie-Lise Flottes
,
Serge Bernard
,
Régis Lorival
et al.
CNFM'04 : 8ème Journées Pédagogiques du Comité National de Formation en Microélectronique, 2004, Saint Malo, France. p. 242
Communication dans un congrès
lirmm-00108671
v1
|
|
Scan design and secure chip [secure IC testing]
David Hely
,
Marie-Lise Flottes
,
Frédéric Bancel
,
Bruno Rouzeyre
,
Nicolas Berard
et al.
Communication dans un congrès
lirmm-00108909
v1
|
|
An Arithmetic Structure for Test Data Horizontal Compression
Marie-Lise Flottes
,
Régis Poirier
,
Bruno Rouzeyre
DATE 2004 - 7th Design, Automation and Test in Europe Conference and Exhibition, Feb 2004, Paris, France. pp.428-434, ⟨10.1109/DATE.2004.1268884⟩
Communication dans un congrès
lirmm-00108837
v1
|
|
On Using Test Vector Differences for Reducing Test Pin Numbers
Marie-Lise Flottes
,
Régis Poirier
,
Bruno Rouzeyre
DELTA'04: 2nd International Workshop on Electronic DesignTest and Applications, Jan 2004, Perth (Australia), pp.275-280
Communication dans un congrès
lirmm-00108832
v1
|
|
Digital, Memory and Mixed-Signal Test Engineering Education: Five Centres of Competences in Europe
Marie-Lise Flottes
,
Yves Bertrand
,
Luz Maria Balado Suarez
,
Emili Lupon
,
Anton Biasizzo
et al.
DELTA: Electronic Design, Test and Applications, Jan 2004, Perth, Australia. pp.135-139
Communication dans un congrès
lirmm-00108831
v1
|
|
Testing a Secure Device: High Coverage with Very Low Observability
Marie-Lise Flottes
ITC'04: International Test Conference, Oct 2004
Communication dans un congrès
lirmm-00109147
v1
|
|
Structural and Functional Analysis for Initialization of High Pipelined Industrial BISTed Circuits Using Partial Reset
Isabelle Vogel
,
Marie-Lise Flottes
,
Christian Landrault
LATW: 4th IEEE Latin American Test Workshop, Natal, Brazil. pp.84-89
Communication dans un congrès
lirmm-00269462
v1
|
|
Test Engineering Education in Europe: The EuNICE-Test Project
Yves Bertrand
,
Marie-Lise Flottes
,
Luz Balado
,
Joan Figueras
,
Anton Biasizzo
et al.
Communication dans un congrès
lirmm-00269541
v1
|
|
An Efficient Approach to SoC Wrapper Design, TAM Configuration and Test Scheduling
Julien Pouget
,
Erik Larsson
,
Zebo Peng
,
Marie-Lise Flottes
,
Bruno Rouzeyre
ETW: European Test Workshop, 2003, Maastricht, Netherlands. pp.51-56
Communication dans un congrès
lirmm-00191948
v1
|
|
Software-Based Testing of Sequential VHDL Descriptions
Mathieu Scholivé
,
Vincent Beroulle
,
Chantal Robach
,
Marie-Lise Flottes
,
Bruno Rouzeyre
8th IEEE European Test Workshop (ETW), May 2003, Maastricht, Netherlands. pp.199-200
Communication dans un congrès
lirmm-00269437
v1
|
|
Initialization of Partially LBISTed Sequential Circuits
Isabelle Vogel
,
Marie-Lise Flottes
,
Christian Landrault
ETW: European Test Workshop, May 2002, Corfou, Greece
Communication dans un congrès
lirmm-00269339
v1
|
|
A Remote Access to Engineering Test Facilities for the Distant Education of European Microelectronics Students
Yves Bertrand
,
Marie-Lise Flottes
,
Florence Azaïs
,
Serge Bernard
,
Laurent Latorre
et al.
Communication dans un congrès
lirmm-00269423
v1
|
|
Initialisatioin des Circuits Séquentiels Avant Test Intégré et Scan Partiel
Isabelle Vogel
,
Marie-Lise Flottes
,
Christian Landrault
Colloque du GDR CAO de Circuits et Systèmes Intégrés, Paris (France), France. pp. 39-42
Communication dans un congrès
lirmm-00269335
v1
|
|
EuNICE-Test Project: A remote Access to Engineering Test for European Universities
Yves Bertrand
,
Marie-Lise Flottes
,
Florence Azaïs
,
Serge Bernard
,
Laurent Latorre
et al.
EWME: European Workshop on Microelectronics Education, 2002, Vigo, Spain. pp.133-136
Communication dans un congrès
lirmm-00268489
v1
|
|
A Heuristic for Test scheduling at System Level
Marie-Lise Flottes
,
Julien Pouget
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-00268503
v1
|
|
A Simple and Effective Compression Scheme for Test Pins Reduction
Marie-Lise Flottes
,
Régis Poirier
,
Bruno Rouzeyre
HLDVT 2002 - 7th IEEE International High Level Design Validation and Test Workshop, Oct 2002, Cannes, France. pp.165-168, ⟨10.1109/HLDVT.2002.1224447⟩
Communication dans un congrès
lirmm-00269326
v1
|
|
European Network for Test Education
Yves Bertrand
,
Marie-Lise Flottes
,
Florence Azaïs
,
Serge Bernard
,
Laurent Latorre
et al.
DELTA'02: 1st International Workshop on Electronic DesignTest and Applications, Christchurch, New Zeland, pp.230-239
Communication dans un congrès
lirmm-00268490
v1
|
|
Is high level test synthesis just design for test?
Christian Landrault
,
Marie-Lise Flottes
,
Bruno Rouzeyre
Communication dans un congrès
lirmm-02288898
v1
|