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NVSRLO: A FeFET-Based Non-Volatile and SEU-Recoverable Latch Design with Optimized Overhead
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Communication dans un congrès
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Dylan Robins
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Patrick Girard
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Arnaud Virazel
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Communication dans un congrès
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A Fast and Efficient Graph-Based methodology for Cell-Aware Model Generation
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Eric Faehn
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Dylan Robins
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Patrick Girard
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Arnaud Virazel
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Communication dans un congrès
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Communication dans un congrès
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Julia Lefèvre
,
Philippe Debaud
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Arnaud Virazel
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TTTC’s E. J. McCluskey Best Doctoral Thesis Award Contest at ETS’24 Semifinal, May 2024, The Hague, Netherlands
Communication dans un congrès
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Eric Faehn
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Patrick Girard
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Arnaud Virazel
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Communication dans un congrès
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,
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Patrick Girard
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Chen Dong
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Xing Guo
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Jie Song
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Jie Cui
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Communication dans un congrès
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,
Eric Faehn
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Patrick Girard
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Arnaud Virazel
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Zhuoyuan Lin
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Guangzhu Liu
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Qingyang Zhang
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Zhengfeng Huang
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Marie-Lise Flottes
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Patrick Girard
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Jean-Philippe Noel
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Arnaud Virazel
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Eric Faehn
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Dylan Robins
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Patrick Girard
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Arnaud Virazel
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Communication dans un congrès
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Patrick Girard
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Thibault Vayssade
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Arnaud Virazel
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Communication dans un congrès
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Marie-Lise Flottes
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Patrick Girard
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Jean-Philippe Noël
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Arnaud Virazel
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Yu Chen
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Shaojie Wei
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Jie Cui
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Zhengfeng Huang
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Zhen Zhou
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Liang Ding
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Jie Cui
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Fan Xia
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Tianming Ni
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Jie Cui
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Shaojie Wei
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Jinjun Zhang
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Tianming Ni
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Jie Song
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Communication dans un congrès
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v1
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Marie-Lise Flottes
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Patrick Girard
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Jean-Philippe Noël
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Arnaud Virazel
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Communication dans un congrès
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Tianming Ni
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Jie Cui
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Jie Cui
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Tianming Ni
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Communication dans un congrès
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Patrick Girard
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Arnaud Virazel
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Shaojie Wei
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Zhixing Li
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Philippe Debaud
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Patrick Girard
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Arnaud Virazel
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Marie-Lise Flottes
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Patrick Girard
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Jean-Philippe Noel
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Arnaud Virazel
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Communication dans un congrès
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Philippe Debaud
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Patrick Girard
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Arnaud Virazel
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Zijie Zhai
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Yu Chen
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Shukai Song
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Jie Cui
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Communication dans un congrès
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Jie Cui
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Yong Zhou
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Communication dans un congrès
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Aymen Ladhar
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Arnaud Virazel
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Philippe Debaud
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Patrick Girard
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Arnaud Virazel
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Communication dans un congrès
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Zhihui He
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Yong Zhou
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Communication dans un congrès
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Francesco Garau
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Nima Kolahimahmoudi
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Sandro Sartoni
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Communication dans un congrès
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Philippe Debaud
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Patrick Girard
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Arnaud Virazel
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Ambika Prasad Shah
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Suhaib Ahmed
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Patrick Girard
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Michael Waltl
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Arnaud Virazel
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Patrick Girard
Communication dans un congrès
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Patrick Girard
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Riccardo Masante
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Sandro Sartoni
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Matteo Sonza Reorda
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PESW 2021 - 9th Prague Embedded Systems Workshop, Jul 2021, Horoměřice, Czech Republic
Communication dans un congrès
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Marie-Lise Flottes
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Patrick Girard
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Arnaud Virazel
15e Colloque National du GDR SoC², Jun 2021, Rennes, France
Communication dans un congrès
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Aoran Cao
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Zhengzheng Fan
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Zhelong Xu
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Tianming Ni
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GLSVLSI 2021 - 31st ACM Great Lakes Symposium on VLSI, Jun 2021, Virtual, United States. pp.301-306, ⟨10.1145/3453688.3461493⟩
Communication dans un congrès
lirmm-03380011
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Preliminary Defect Analysis of 8T SRAM Cells for In-Memory Computing Architectures
Lila Ammoura
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Marie-Lise Flottes
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Patrick Girard
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Arnaud Virazel
DTIS 2021 - 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, Jun 2021, Montpellier, France. ⟨10.1109/DTIS53253.2021.9505101⟩
Communication dans un congrès
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Nikhil Agrawal
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Ambika Prasad Shah
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Santosh Kumar Vishvakarma
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Communication dans un congrès
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Philippe Debaud
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Patrick Girard
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Arnaud Virazel
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Communication dans un congrès
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Arnaud Virazel
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Alberto Bosio
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Aymen Ladhar
Communication dans un congrès
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Alberto Bosio
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Aymen Ladhar
Communication dans un congrès
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Arnaud Virazel
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Communication dans un congrès
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Patrick Girard
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Arnaud Virazel
Communication dans un congrès
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DATE 2020 - EDAA/IEEE/ACM Design Automation & Test in Europe Conference, PhD Forum, Mar 2020, Grenoble, France
Communication dans un congrès
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Arnaud Virazel
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Hassen Aziza
Communication dans un congrès
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Jun Zhou
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Yuanjie Hu
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Zhelong Xu
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Jie Cui
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Keren Liu
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Yuanqing Cheng
Communication dans un congrès
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Arnaud Virazel
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Patrick Girard
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Mario Barbareschi
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Alberto Bosio
Communication dans un congrès
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Arnaud Virazel
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Patrick Girard
Communication dans un congrès
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Patrick Girard
Communication dans un congrès
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Stefano Di Carlo
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Ernesto Sanchez
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Alessandro Savino
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Communication dans un congrès
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|
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Jun Zhou
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Tianming Ni
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Xiaoqing Wen
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Communication dans un congrès
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|
Novel Radiation Hardened Latch Design with Cost-Effectiveness for Safety-Critical Terrestrial Applications
Aibin Yan
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Zhen Wu
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Lu Lu
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Zhili Chen
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Jie Song
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Communication dans un congrès
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Xiangfeng Feng
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Xiaohui Zhao
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Hang Zhou
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Jie Cui
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Communication dans un congrès
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|
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Jun Zhou
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Yuanjie Hu
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Yan Chen
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Communication dans un congrès
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|
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Safa Mhamdi
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Patrick Girard
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Arnaud Virazel
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Alberto Bosio
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Aymen Ladhar
Communication dans un congrès
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Communication dans un congrès
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|
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Patrick Girard
Communication dans un congrès
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Arnaud Virazel
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Alberto Bosio
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Etienne Auvray
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IOLTS 2019 - 25th IEEE International Symposium on On-Line Testing and Robust System Design, Jul 2019, Rhodes, Greece. pp.21-26, ⟨10.1109/IOLTS.2019.8854388⟩
Communication dans un congrès
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Arnaud Virazel
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Patrick Girard
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Mario Barbarcschi
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Alberto Bosio
DFT 2018 - 31st IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2018, Chicago, United States. pp.1-6, ⟨10.1109/DFT.2018.8602939⟩
Communication dans un congrès
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Patrick Girard
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Arnaud Virazel
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Alberto Bosio
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Aymen Ladhar
ART 2019 - 4th IEEE Automotive Reliability and Test Workshop, Nov 2019, Washington, United States
Communication dans un congrès
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Mathieu Moreau
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Jean-Michel Portal
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Arnaud Virazel
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Patrick Girard
Communication dans un congrès
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Arnaud Virazel
,
Alberto Bosio
,
Patrick Girard
Communication dans un congrès
lirmm-02099874
v1
|
|
On the Comparison of Different ATPG approaches for Approximate Integrated Circuits
Marcello Traiola
,
Arnaud Virazel
,
Patrick Girard
,
Mario Barbareschi
,
Alberto Bosio
DDECS 2018 - 1st International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2018, Budapest, Hungary. pp.85-90, ⟨10.1109/DDECS.2018.00022⟩
Communication dans un congrès
lirmm-03032856
v1
|
|
Testing Approximate Digital Circuits: Challenges and Opportunities
Marcello Traiola
,
Arnaud Virazel
,
Patrick Girard
,
Mario Barbareschi
,
Alberto Bosio
Communication dans un congrès
lirmm-03033024
v1
|
|
Is aproximate computing suitable for selective hardening of arithmetic circuits?
Bastien Deveautour
,
Arnaud Virazel
,
Patrick Girard
,
Serge Pravossoudovitch
,
Valentin Gherman
DTIS 2018 - 13th International Conference on Design and Technology of Integrated Systems in Nanoscale Era, Apr 2018, Taormina, Italy. pp.1-6, ⟨10.1109/DTIS.2018.8368559⟩
Communication dans un congrès
lirmm-03130537
v1
|
|
Approximate computing: Design & test for integrated circuits
Arnaud Virazel
,
Alberto Bosio
,
Patrick Girard
,
Mario Barbareschi
Communication dans un congrès
lirmm-01718600
v1
|
|
Can we Approximate the Test of Integrated Circuits?
Imran Wali
,
Marcello Traiola
,
Arnaud Virazel
,
Patrick Girard
,
Mario Barbareschi
et al.
WAPCO: Workshop On Approximate Computing, Jan 2017, Stockholm, Sweden
Communication dans un congrès
lirmm-02004418
v1
|
|
Towards digital circuit approximation by exploiting fault simulation
Marcello Traiola
,
Arnaud Virazel
,
Patrick Girard
,
Mario Barbareschi
,
Alberto Bosio
Communication dans un congrès
lirmm-01718583
v1
|
|
Towards approximation during test of Integrated Circuits
Imran Wali
,
Marcello Traiola
,
Arnaud Virazel
,
Patrick Girard
,
Mario Barbareschi
et al.
DDECS 2017 - 20th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2017, Dresden, Germany. pp.28-33, ⟨10.1109/DDECS.2017.7934574⟩
Communication dans un congrès
lirmm-01718580
v1
|
|
An effective fault-injection framework for memory reliability enhancement perspectives
Ghita Harcha
,
Alberto Bosio
,
Patrick Girard
,
Arnaud Virazel
,
Paolo Bernardi
Communication dans un congrès
lirmm-01718579
v1
|
|
A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits
Imran Wali
,
Bastien Deveautour
,
Arnaud Virazel
,
Alberto Bosio
,
Patrick Girard
et al.
Communication dans un congrès
hal-01444734
v1
|
|
An effective BIST architecture for power-gating mechanisms in low-power SRAMs
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Arnaud Virazel
,
Leonardo B. Zordan
ISQED 2016 - 17th International Symposium on Quality Electronic Design, Mar 2016, Santa Clara, CA, United States. pp.185-191, ⟨10.1109/ISQED.2016.7479198⟩
Communication dans un congrès
lirmm-01457424
v1
|
|
Improving the Functional Test Delay Fault Coverage: A Microprocessor Case Study
Aymen Touati
,
Alberto Bosio
,
Patrick Girard
,
Arnaud Virazel
,
Paolo Bernardi
et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2016, Pittsburgh, PA, United States. pp.731-736, ⟨10.1109/ISVLSI.2016.42⟩
Communication dans un congrès
lirmm-01446917
v1
|
|
A Case Study on the Approximate Test of Integrated Circuits
Imran Wali
,
Arnaud Virazel
,
Patrick Girard
,
Mario Barbareschi
,
Alberto Bosio
AC: Approximate Computing, Oct 2016, Pittsburgh, PA, United States
Communication dans un congrès
lirmm-01718609
v1
|
|
Test of Low Power Circuits: Issues and Industrial Practices
Alberto Bosio
,
Patrick Girard
,
Arnaud Virazel
ICECS: International Conference on Electronics, Circuits and Systems, Dec 2016, Monte Carlo, Monaco
Communication dans un congrès
lirmm-01433330
v1
|
|
A Hybrid Power Estimation Technique to improve IP power models quality
Alejandro Nocua
,
Arnaud Virazel
,
Alberto Bosio
,
Patrick Girard
,
Cyril Chevalier
Communication dans un congrès
lirmm-01689544
v1
|
|
An effective approach for functional test programs compaction
Aymen Touati
,
Alberto Bosio
,
Patrick Girard
,
Arnaud Virazel
,
Paolo Bernardi
et al.
Communication dans un congrès
lirmm-01457396
v1
|
|
Auto-adaptive ultra-low power IC
Alberto Bosio
,
Philippe Debaud
,
Patrick Girard
,
Stéphane Guilhot
,
Miroslav Valka
et al.
Communication dans un congrès
lirmm-01457361
v1
|
|
A hybrid power modeling approach to enhance high-level power models
Alejandro Nocua
,
Arnaud Virazel
,
Alberto Bosio
,
Patrick Girard
,
Cyril Chevalier
Communication dans un congrès
lirmm-01446854
v1
|
|
Exploring the impact of functional test programs re-used for power-aware testing
Aymen Touati
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Arnaud Virazel
et al.
DATE 2015 - 18th Design, Automation and Test in Europe Conference and Exhibition, Mar 2015, Grenoble, France. pp.1277-1280, ⟨10.7873/DATE.2015.1031⟩
Communication dans un congrès
lirmm-01272937
v1
|
|
Scan-chain intra-cell defects grading
Aymen Touati
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-01272696
v1
|
|
An efficient hybrid power modeling approach for accurate gate-level power estimation
Alejandro Nocua
,
Arnaud Virazel
,
Alberto Bosio
,
Patrick Girard
,
Cyril Chevalier
Communication dans un congrès
lirmm-01354745
v1
|
|
Design space exploration and optimization of a Hybrid Fault-Tolerant Architecture
Imran Wali
,
Arnaud Virazel
,
Alberto Bosio
,
Patrick Girard
,
Matteo Sonza Reorda
Communication dans un congrès
lirmm-01272735
v1
|
|
Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology
Sylvain Clerc
,
Fady Abouzeid
,
Darayus Adil Patel
,
Jean-Marc Daveau
,
Cyril Bottoni
et al.
ISQED 2015 - 16th International Symposium on Quality Electronic Design, Apr 2015, Santa Clara, United States. pp.366-370, ⟨10.1109/ISQED.2015.7085453⟩
Communication dans un congrès
lirmm-01272913
v1
|
|
An Experimental Comparative Study of Fault-Tolerant Architectures
Imran Wali
,
Arnaud Virazel
,
Alberto Bosio
,
Patrick Girard
VALID: Advances in System Testing and Validation Lifecycle, Nov 2015, Barcelone, Spain. pp.1-6
Communication dans un congrès
lirmm-01354754
v1
|
|
An effective hybrid fault-tolerant architecture for pipelined cores
Imran Wali
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
Communication dans un congrès
lirmm-01272730
v1
|
|
An effective ATPG flow for Gate Delay Faults
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Arnaud Virazel
,
Paolo Bernardi
et al.
Communication dans un congrès
lirmm-01272719
v1
|
|
Design-for-Diagnosis Architecture for Power Switches
Miroslav Valka
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Arnaud Virazel
et al.
DDECS: Design and Diagnostics of Electronic Circuits and Systems, Apr 2015, Belgrade, Serbia. pp.43-48, ⟨10.1109/DDECS.2015.18⟩
Communication dans un congrès
lirmm-01272684
v1
|
|
An ATPG Flow to Generate Crosstalk-Aware Path Delay Pattern
Anu Asokan
,
Alberto Bosio
,
Arnaud Virazel
,
Luigi Dilillo
,
Patrick Girard
et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.515-520, ⟨10.1109/ISVLSI.2015.99⟩
Communication dans un congrès
lirmm-01272933
v1
|
|
Path delay test in the presence of multi-aggressor crosstalk, power supply noise and ground bounce
Anu Asokan
,
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-01248599
v1
|
|
TSV aware timing analysis and diagnosis in paths with multiple TSVs
Carolina Momo Metzler
,
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-01248594
v1
|
|
A Comprehensive Evaluation of Functional Programs for Power-Aware Test
Aymen Touati
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
NATW: North Atlantic Test Workshop, May 2014, Johnson City, NY, United States. pp.69-72, ⟨10.1109/NATW.2014.23⟩
Communication dans un congrès
lirmm-01248597
v1
|
|
Timing-aware ATPG for critical paths with multiple TSVs
Carolina Momo Metzler
,
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-01248600
v1
|
|
An intra-cell defect grading tool
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
,
Stefano Bernabovi
et al.
Communication dans un congrès
lirmm-01248591
v1
|
|
A Delay Probability Metric for Input Pattern Ranking Under Process Variation and Supply Noise
Anu Asokan
,
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
ISVLSI: International Symposium on Very Large Scale Integration, Jul 2014, Tampa, FL, United States. pp.226-231, ⟨10.1109/ISVLSI.2014.42⟩
Communication dans un congrès
lirmm-01248592
v1
|
|
Test and diagnosis of power switches
Miroslav Valka
,
Alberto Bosio
,
Luigi Dilillo
,
Aida Todri-Sanial
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-01248590
v1
|
|
Power supply noise-aware workload assignments for homogeneous 3D MPSoCs with thermal consideration
Yuanqing Cheng
,
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-01248596
v1
|
|
iBoX — Jitter based Power Supply Noise sensor
Miroslav Valka
,
Alberto Bosio
,
Luigi Dilillo
,
Aida Todri-Sanial
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-01248601
v1
|
|
Real-Time Testing of 90nm COTS SRAMs at Concordia Station in Antarctica
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
NSREC: Nuclear and Space Radiation Effects Conference, Jul 2014, Paris, France
Communication dans un congrès
lirmm-01237709
v1
|
|
Efficient Dynamic Test Methods for COTS SRAMs Under Heavy Ion Irradiation
Georgios Tsiligiannis
,
Luigi Dilillo
,
Viyas Gupta
,
Alberto Bosio
,
Patrick Girard
et al.
NSREC: Nuclear and Space Radiation Effects Conference, Jul 2014, Paris, France
Communication dans un congrès
lirmm-01237660
v1
|
|
Protecting combinational logic in pipelined microprocessor cores against transient and permanent faults
Imran Wali
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-01248598
v1
|
|
On the Generation of Diagnostic Test Set for Intra-cell Defects
Zhenzhou Sun
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-01272539
v1
|
|
Analyzing resistive-open defects in SRAM core-cell under the effect of process variability
Elena Ioana Vatajelu
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
Communication dans un congrès
lirmm-01921630
v1
|
|
Performance Characterization of TAS-MRAM Architectures in Presence of Capacitive Defects
João Azevedo
,
Arnaud Virazel
,
Yuanqing Cheng
,
Alberto Bosio
,
Luigi Dilillo
et al.
VALID: Advances in System Testing and Validation Lifecycle, Oct 2013, Venice, Italy. pp.39-44
Communication dans un congrès
lirmm-01433308
v1
|
|
Characterization of an SRAM Based Particle Detector For Mixed-Field Radiation Environments
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00839046
v1
|
|
SRAM Soft Error Rate Evaluation Under Atmospheric Neutron Radiation and PVT variations
Georgios Tsiligiannis
,
Elena Ioana Vatajelu
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-00818955
v1
|
|
Adaptive Source Bias for Improved Resistive-Open Defect Coverage during SRAM Testing
Elena Ioana Vatajelu
,
Alberto Bosio
,
Patrick Girard
,
Aida Todri-Sanial
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-01248609
v1
|
|
Test Solution for Data Retention Faults in Low-Power SRAMs
Leonardo B. Zordan
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
DATE 2013 - 16th Design, Automation and Test in Europe Conference, Mar 2013, Grenoble, France. pp.442-447, ⟨10.7873/DATE.2013.099⟩
Communication dans un congrès
lirmm-00805140
v1
|
|
A novel method to mitigate TSV electromigration for 3D ICs
Yuanqing Cheng
,
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-01248617
v1
|
|
On the correlation between Static Noise Margin and Soft Error Rate evaluated for a 40nm SRAM cell
Elena Ioana Vatajelu
,
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
et al.
DFT: Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2013, New York, United States. pp.143-148, ⟨10.1109/DFT.2013.6653597⟩
Communication dans un congrès
lirmm-01238413
v1
|
|
On the Reuse of Read and Write Assist Circuits to Improve Test Efficiency in Low-Power SRAMs
Leonardo B. Zordan
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
Communication dans un congrès
lirmm-00818977
v1
|
|
Temperature Impact on the Neutron SER of a Commercial 90nm SRAM
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
NSREC: Nuclear and Space Radiation Effects Conference, Jul 2013, San Francisco, Ca, United States. pp.1-4
Communication dans un congrès
lirmm-00805291
v1
|
|
Fast and Accurate Electro-Thermal Analysis of Three-Dimensional Power Delivery Networks
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Arnaud Virazel
EuroSimE: Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Apr 2013, Wroclaw, Poland. pp.1-4, ⟨10.1109/EuroSimE.2013.6529956⟩
Communication dans un congrès
lirmm-00839043
v1
|
|
Effect-Cause Intra-Cell Diagnosis at Transistor Level
Zhenzhou Sun
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
ISQED 2013 - 14th International Symposium on Quality Electronic Design, Mar 2013, Santa Clara, CA, United States. pp.460-467, ⟨10.1109/ISQED.2013.6523652⟩
Communication dans un congrès
lirmm-00817224
v1
|
|
Multiple-Cell-Upsets on a commercial 90nm SRAM in Dynamic Mode
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00839062
v1
|
|
Mitigate TSV Electromigration for 3D ICs - From the Architecture Perspective
Yuanqing Cheng
,
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
International Symposium on VLSI, Natale, Brazil. pp.6
Communication dans un congrès
lirmm-00839052
v1
|
|
Evaluating An SEU Monitor For Mixed-Field Radiation Environments
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
iWoRID: International Workshop on Radiation Imaging Detectors, SOLEIL Synchrotron, Jun 2013, Paris, France
Communication dans un congrès
lirmm-01238433
v1
|
|
Improving Defect Localization Accuracy by means of Effect-Cause Intra-Cell Diagnosis at Transistor Level
Zhenzhou Sun
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
SDD: Silicon Debug and Diagnosis, Sep 2013, Anaheim, CA, United States
Communication dans un congrès
lirmm-00806872
v1
|
|
SEU Monitoring in Mixed-Field Radiation Environments of Particle Accelerators
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00839085
v1
|
|
Worst-Case Power Supply Noise and Temperature Distribution Analysis for 3D PDNs with Multiple Clock Domains
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00839042
v1
|
|
Analyzing the effect of concurrent variability in the core cells and sense amplifiers on SRAM read access failures
Elena Ioana Vatajelu
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Mar 2013, Abu Dhabi, United Arab Emirates. pp.39-44, ⟨10.1109/DTIS.2013.6527775⟩
Communication dans un congrès
lirmm-01248603
v1
|
|
A Built-in Scheme for Testing and Repairing Voltage Regulators of Low-Power SRAMs
Leonardo B. Zordan
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
Communication dans un congrès
lirmm-00805366
v1
|
|
Computing Detection Probability of Delay Defects in Signal Line TSVs
Carolina Momo Metzler
,
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-00839044
v1
|
|
On Using Address Scrambling for Defect Tolerance in SRAMs
Renan Alves Fonseca
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00805334
v1
|
|
A Novel Framework for Evaluating the SRAM Core-Cell Sensitivity to Neutrons
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Aida Todri-Sanial
et al.
RADECS: European Conference on Radiation and Its Effects on Components and Systems, Sep 2012, Biarritz, France. pp.1-4
Communication dans un congrès
lirmm-00805163
v1
|
|
Resistive-Open Defects Affecting Bit-Line Selection in TAS-MRAM Architectures
João Azevedo
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
JNRDM: Journées Nationales du Réseau Doctoral en Microélectronique, 2012, Paris, France
Communication dans un congrès
lirmm-00806827
v1
|
|
Electro-Thermal Analysis of 3D Power Delivery Networks
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Arnaud Virazel
DAC: Design Automation Conference, 2012, San Francisco, United States
Communication dans un congrès
lirmm-00806836
v1
|
|
Fault Localization Improvement through an Intra-Cell Diagnosis Approach
Zhenzhou Sun
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
ISTFA 2012 - 38th International Symposium for Testing and Failure Analysis, Nov 2012, Phoenix, AZ, United States. pp.509-519
Communication dans un congrès
lirmm-00806863
v1
|
|
Defect Localization Through an Effect-Cause based Intra-Cell Diagnosis
Zhenzhou Sun
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
Colloque GDR SoC-SiP, 2012, Paris, France
Communication dans un congrès
lirmm-00806841
v1
|
|
Dynamic Mode Test of a Commercial 4Mb Toggle MRAM under Neutron Radiation
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Aida Todri-Sanial
et al.
RADECS: European Conference on Radiation and Its Effects on Components and Systems, Sep 2012, Biarritz, France. pp.1-4
Communication dans un congrès
lirmm-00805165
v1
|
|
Radiation Induced Effects on Electronic Systems and ICs
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
SETS: South European Test Seminar, Mar 2012, Sauze d'Oulx, Italy
Communication dans un congrès
lirmm-00807055
v1
|
|
Impact of Resistive-Open Defects on the Heat Current of TAS-MRAM Architectures
João Azevedo
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
DATE 2012 - 15th Design, Automation and Test in Europe Conference and Exhibition, Mar 2012, Dresden, Germany. pp.532-537, ⟨10.1109/DATE.2012.6176526⟩
Communication dans un congrès
lirmm-00689024
v1
|
|
Power Supply Noise Sensor Based on Timing Uncertainty Measurements
Miroslav Valka
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
Communication dans un congrès
lirmm-00806890
v1
|
|
SRAM testing under Neutron Radiation for the evaluation of different algorithms stress
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Aida Todri-Sanial
et al.
15ème Journées Nationales du Réseau Doctoral en Microélectronique, Jun 2012, Marseille, France
Communication dans un congrès
lirmm-00807054
v1
|
|
Peak Power Estimation: A Case Study on CPU Cores
Paolo Bernardi
,
Mauricio de Carvalho
,
Ernesto Sanchez
,
Matteo Sonza Reorda
,
Alberto Bosio
et al.
Communication dans un congrès
lirmm-00805389
v1
|
|
Low-power SRAMs Power Mode Control Logic: Failure Analysis and Test Solutions
Leonardo B. Zordan
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
Communication dans un congrès
lirmm-00805143
v1
|
|
Resistive-Open Defect Analysis for Through-Silicon-Vias
Carolina Momo Metzler
,
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
DCIS 2012 - 27th Conference on Design of Circuits and Integrated Systems, Nov 2012, Avignon, France
Communication dans un congrès
lirmm-00806803
v1
|
|
Dynamic Mode Testing of SRAMS under Neutron Radiation
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Aida Todri-Sanial
et al.
Sixième colloque du GDR SOC-SIP du CNRS, Jun 2012, Paris, France
Communication dans un congrès
lirmm-00807053
v1
|
|
Defect Analysis in Power Mode Control Logic of Low-Power SRAMs
Leonardo B. Zordan
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
Communication dans un congrès
lirmm-00805374
v1
|
|
Impact of Resistive-Bridge Defects in TAS-MRAM Architectures
João Azevedo
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-00806809
v1
|
|
Advanced Test Methods for SRAMs
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
Communication dans un congrès
lirmm-00805049
v1
|
|
A Pseudo-Dynamic Comparator for Error Detection in Fault Tolerant Architectures
Ahn Duc Tran
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-00806778
v1
|
|
Evaluation of Test Algorithms Stress Effect on SRAMs under Neutron Radiation
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Aida Todri-Sanial
et al.
Communication dans un congrès
lirmm-00805373
v1
|
|
Adaptive Voltage Scaling via Effective On-Chip Timing Uncertainty Measurements
Miroslav Valka
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
et al.
Colloque GDR SoC-SiP, 2012, Paris, France
Communication dans un congrès
lirmm-00806859
v1
|
|
Tutorial intitulé "Power-Aware Testing and Test Strategies for Low Power Devices
Patrick Girard
,
Nicola Nicolici
,
Xiaoqing Wen
ITC'2012: International Test Conference, Nov 2012, Anaheim, CA, United States
Communication dans un congrès
lirmm-00820734
v1
|
|
Impacts of Resistive-Open Defects in the Word-Line Selection of TAS-MRAMs
João Azevedo
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Colloque GDR SoC-SiP, 2012, Paris, France
Communication dans un congrès
lirmm-00806842
v1
|
|
Why and How Controlling Power Consumption During Test: A Survey
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
,
Arnaud Virazel
Communication dans un congrès
lirmm-00818984
v1
|
|
Through-Silicon-Via Resistive-Open Defect Analysis
Carolina Momo Metzler
,
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-00806848
v1
|
|
Complete Framework for the Estimation of the SRAM Core-Cell Resilience to Radiation
Georgios Tsiligiannis
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Aida Todri-Sanial
et al.
RADECS: Radiation and its Effects on Components and Systems, Sep 2012, Biarritz, France
Communication dans un congrès
hal-01935785
v1
|
|
A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits
Ahn Duc Tran
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-00651238
v1
|
|
Effective Launch-to-Capture Power Reduction for LOS Scheme with Adjacent-Probability-Based X-Filling
Kohei Miyase
,
Yuta Uchinodan
,
Kazunari Enokimoto
,
Yuta Yamato
,
Xiaoqing Wen
et al.
ATS: Asian Test Symposium, 2011, New Delhi, India. pp.21-23
Communication dans un congrès
lirmm-00651247
v1
|
|
Optimized March Test Flow for Detecting Memory Faults in SRAM Devices Under Bit Line Coupling
Leonardo B. Zordan
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
GDR SOC-SIP'11 : Colloque GDR SoC-SiP, Lyon, France
Communication dans un congrès
lirmm-00679522
v1
|
|
Variability Analysis of an SRAM Test Chip
Renan Alves Fonseca
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
ETS: European Test Symposium, May 2011, Trondheim, Norway
Communication dans un congrès
lirmm-00651791
v1
|
|
A Hybrid Fault Tolerant Architecture for Robustness Improvement of Digital Circuits
Ahn Duc Tran
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
GDR SOC-SIP'11 : Colloque GDR SoC-SiP, Lyon, France
Communication dans un congrès
lirmm-00679513
v1
|
|
Neutron-Induced Multiple Bit Upsets on Dynamically-Stressed Commercial SRAM Arrays
Paolo Rech
,
Jean-Marc J.-M. Galliere
,
Patrick Girard
,
Alessio Griffoni
,
Frédéric Wrobel
et al.
RADECS: European Conference on Radiation and Its Effects on Components and Systems, Sep 2011, Seville, Spain. pp.274-280, ⟨10.1109/RADECS.2011.6131396⟩
Communication dans un congrès
lirmm-00805314
v1
|
|
A DfT Solution for Oxide Thickness Varitions in ATMEL eFlash Technology
Pierre-Didier Mauroux
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, 2011, Athènes, Greece
Communication dans un congrès
lirmm-00647750
v1
|
|
On using a SPICE-like TSTAC™ eFlash model for design and test
Pierre-Didier Mauroux
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
Communication dans un congrès
lirmm-00592203
v1
|
|
Power Reduction Through X-filling of Transition Fault Test Vectors for LOS Testing
Fangmei Wu
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00647760
v1
|
|
Error Resilient Infrastructure for Data Transfer in a Distributed Neutron Detector
Luigi Dilillo
,
Alberto Bosio
,
Miroslav Valka
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
DFT 2011 - International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Oct 2011, Vancouver, Canada. pp.294-301, ⟨10.1109/DFT.2011.41⟩
Communication dans un congrès
lirmm-00651226
v1
|
|
Dynamic-Stress Neutrons Test of Commercial SRAMs
Paolo Rech
,
Jean-Marc J.-M. Galliere
,
Patrick Girard
,
Frédéric Wrobel
,
Frédéric Saigné
et al.
IEEE Nuclear and Space Radiation Effects Conference, Jul 2012, Las Vegas, NV, United States. pp.1-4
Communication dans un congrès
lirmm-00805349
v1
|
|
Failure Analysis and Test Solutions for Low-Power SRAMs
Leonardo B. Zordan
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00805123
v1
|
|
Mapping Test Power to Functional Power through Smart X-Filling for LOS Scheme
Fangmei Wu
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
LPonTR'11: IEEE International Workshop on the Impact of Low Power on Test and Reliability, Trondheim, Norway
Communication dans un congrès
lirmm-00651905
v1
|
|
Test and Reliability of Magnetic Random Access Memories
João Azevedo
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
GDR SOC-SIP'11: Colloque GDR SoC-SiP, Lyon, France
Communication dans un congrès
lirmm-00679516
v1
|
|
Robust Data Collection and Transfer Framework for a Distributed SRAM Based Neutron Sensor
Luigi Dilillo
,
Alberto Bosio
,
Paolo Rech
,
Patrick Girard
,
Frédéric Wrobel
et al.
IEEE International Workshop on Advances in Sensors and Interfaces, Jun 2011, Savelletri di Fasano, Italy. pp.176-180, ⟨10.1109/IWASI.2011.6004712⟩
Communication dans un congrès
lirmm-00805394
v1
|
|
A Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing
Miroslav Valka
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
ETS 2011 - 16th IEEE European Test Symposium, May 2011, Trondheim, Norway. pp.153-158, ⟨10.1109/ETS.2011.21⟩
Communication dans un congrès
lirmm-00647822
v1
|
|
Neutron Detection in Atmospheric Environment through Static and Dynamic SRAM-Based Test Bench
Luigi Dilillo
,
Paolo Rech
,
Jean-Marc J.-M. Galliere
,
Patrick Girard
,
Frédéric Wrobel
et al.
IEEE Latin American test Workshop, Mar 2011, Porto de Galinhas, Brazil. pp.1-6
Communication dans un congrès
lirmm-00805120
v1
|
|
On Using Address Scrambling to Implement Defect Tolerance in SRAMs
Renan Alves Fonseca
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
ITC'2011: International Test Conference, Sep 2011, Anaheim, CA, United States. pp.N/A
Communication dans un congrès
lirmm-00647773
v1
|
|
Power Supply Noise and Ground Bounce Aware Pattern Generation for Delay Testing
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00647815
v1
|
|
Power-Aware Testing and Test Strategies for Low Power Devices
Patrick Girard
,
Nicola Nicolici
,
Xiaoqing Wen
DATE: Design, Automation and Test in Europe, Mar 2011, Grenoble, France
Communication dans un congrès
lirmm-00820698
v1
|
|
Power-Aware Test Pattern Generation for At-Speed LOS Testing
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
,
Arnaud Virazel
et al.
ATS: Asian Test Symposium, Nov 2011, New Delhi, India. pp.506-510
Communication dans un congrès
lirmm-00651917
v1
|
|
A Study of Path Delay Variations in the Presence of Uncorrelated Power and Ground Supply Noise
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00592000
v1
|
|
Optimized March Test Flow for Detecting Memory Faults in SRAM Devices Under Bit Line Coupling
Leonardo B. Zordan
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
DDECS'11: 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits ans Systems, Netherlands. pp.353-358
Communication dans un congrès
lirmm-00592182
v1
|
|
Robustness Improvement of Digital Circuits A New Hybrid Fault Tolerant Architecture
Ahn Duc Tran
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
JNRDM'11: Journées Nationales du Réseau Doctoral de Microélectronique, Paris, France
Communication dans un congrès
lirmm-00679509
v1
|
|
Robust Structure for Data Collection and Transfer in a Distributed SRAM Based Neutron Test Bench
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
Workshop on Dependability Issues in Deep-Submicron Technologies, Trondheim, Norway
Communication dans un congrès
lirmm-00651796
v1
|
|
Simultaneous Power and Thermal Integrity Analysis for 3D Integrated Systems
Aida Todri-Sanial
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
LPonTR'11: IEEE International Workshop on the Impact of Low Power on Test and Reliability, Trondheim, Norway
Communication dans un congrès
lirmm-00651802
v1
|
|
Analysis of Resistive-Open Defects in TAS-MRAM Array
João Azevedo
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
ITC: International Test Conference, Sep 2011, Anaheim, CA, United States
Communication dans un congrès
lirmm-00679524
v1
|
|
Tutorial intitulé "Power-Aware Testing and Test Strategies for Low Power Devices
Patrick Girard
,
Nicola Nicolici
,
Xiaoqing Wen
MWSCAS'2010: International Midwest Symposium on Circuits and Systems, Aug 2010, Seattle, United States
Communication dans un congrès
lirmm-00820689
v1
|
|
Setting Test Conditions for Improving SRAM Reliability
Renan Alves Fonseca
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
ETS: European Test Symposium, May 2010, Prague, Czech Republic. pp.257-262
Communication dans un congrès
lirmm-00492741
v1
|
|
Analysis of Resistive-Bridging Defects in SRAM Core-Cells: a Comparative Study from 90nm down to 40nm Technology Nodes
Renan Alves Fonseca
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
ETS: European Test Symposium, May 2010, Prague, Czech Republic. pp.132-137
Communication dans un congrès
lirmm-00493236
v1
|
|
A Two-Layer SPICE Model of the ATMEL TSTAC eFlash Memory Technology for Defect Injection and Faulty Behavior Prediction
Pierre-Didier Mauroux
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
ETS: European Test Symposium, May 2010, Prague, Czech Republic. pp.81-86
Communication dans un congrès
lirmm-00493204
v1
|
|
Impact of Resistive-Open Defects on SRAM sensitivity to Soft Errors
Paolo Rech
,
Jean-Marc J.-M. Galliere
,
Patrick Girard
,
Frédéric Wrobel
,
Frédéric Saigné
et al.
RADECS: European Conference on Radiation and Its Effects on Components and Systems, Sep 2010, Langenfeld, Austria
Communication dans un congrès
lirmm-00566847
v1
|
|
X-Identification of Transition Delay Fault Tests for Launch-off Shift Scheme
Kohei Miyase
,
Fangmei Wu
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
et al.
WRTLT'10: 11th IEEE Workshop On RTL and High Level Testing, Shanghai, China. pp.N/A
Communication dans un congrès
lirmm-00566869
v1
|
|
Tolérance aux fautes et rendement de fabrication
Ahn Duc Tran
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
GDR SOC-SIP'10 : Colloque GDR SoC-SiP, Cergy, France
Communication dans un congrès
lirmm-00553995
v1
|
|
Test Relaxation and X-filling to Reduce Peak Power During At-Speed LOS Testing
Fangmei Wu
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
GDR SOC-SIP'10 : Colloque GDR SoC-SiP, Cergy, France
Communication dans un congrès
lirmm-00553989
v1
|
|
Pattern Grading for Testing Critical Paths Considering Power Supply Noise and Crosstalk Using a Layout-Aware Quality Metric
Junxia Ma
,
Jeremy Lee
,
Nisar Ahmed
,
Patrick Girard
,
Mohammad Tehranipoor
GLSVLSI'10: IEEE Great Lake Symposium on VLSI, United States. pp.127-130
Communication dans un congrès
lirmm-00618748
v1
|
|
Detecting NBTI Induced Failures in SRAM Core-Cells
Renan Alves Fonseca
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
VTS'10: VLSI Test Symposium, Santa Cruz, CA, United States. pp.75-80
Communication dans un congrès
lirmm-00553612
v1
|
|
Impact of Resistive-Bridging Defects in SRAM Core-Cell
Renan Alves Fonseca
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
DELTA'10: International Symposium on Electronic Design, Test & Applications, Ho Chi Minh, Vietnam. pp.265-270
Communication dans un congrès
lirmm-00553592
v1
|
|
Power Reduction Through X-filling of Transition Fault Test Vectors for LOS Testing
Fangmei Wu
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
LPonTR:
Impact of Low-Power design on Test and Reliability, May 2010, Prague, Czech Republic
Communication dans un congrès
lirmm-00553930
v1
|
|
A Memory Fault Simulator for Radiation-Induced Effects in SRAMs
Paolo Rech
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
ATS: Asian Test Symposium, 2010, Shanghai, China. pp.100-105
Communication dans un congrès
lirmm-00545102
v1
|
|
Analysis and Fault Modeling of Actual Resistive Defects in Flash Memories
Pierre-Didier Mauroux
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
JNRDM'10 : Journées Nationales du Réseau Doctoral de Microélectronique, Montpellier, France
Communication dans un congrès
lirmm-00553935
v1
|
|
Analyse et modélisation des défauts résistifs affectant les mémoires Flash
Pierre-Didier Mauroux
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
GDR SOC-SIP'10 : Colloque GDR SoC-SiP, Cergy, France
Communication dans un congrès
lirmm-00553947
v1
|
|
Tutorial intitulé "Power-Aware Testing and Test Strategies for Low Power Devices
Patrick Girard
,
Nicola Nicolici
,
Xiaoqing Wen
ICM'2010: International Conference on Microelectronics, Dec 2010, La Caire, Egypt
Communication dans un congrès
lirmm-00820692
v1
|
|
Analysis of Power Consumption and Transition Fault Coverage for LOS and LOC Testing Schemes
Wu Fangmei
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
DDECS'10: 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, Apr 2010, Vienna, Austria. pp.376-381
Communication dans un congrès
lirmm-00475734
v1
|
|
Setting Test Conditions for Detecting Faults Induced by Random Dopant Fluctuation in SRAM Core-Cells
Renan Alves Fonseca
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
VARI: Workshop on CMOS Variability, 2010, Montpellier, France
Communication dans un congrès
lirmm-00553626
v1
|
|
Power-Aware Testing and Test Strategies for Low Power Devices
Patrick Girard
,
Nicola Nicolici
,
Xiaoqing Wen
LATW: Latin American Test Workshop, Mar 2010, Punta del Este, Uruguay
Communication dans un congrès
lirmm-00820651
v1
|
|
A Comprehensive System-on-Chip Logic Diagnosis
Youssef Benabboud
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
ATS: Asian Test Symposium, 2010, Shanghai, China. pp.237-242
Communication dans un congrès
lirmm-00545131
v1
|
|
Tutorial intitulé "Power-Aware Testing and Test Strategies for Low Power Devices
Patrick Girard
,
Nicola Nicolici
,
Xiaoqing Wen
IEEE International NEWCAS Conference, Jun 2010, Montréal, Canada
Communication dans un congrès
lirmm-00820652
v1
|
|
An Exact and Efficient Critical Path Tracing Algorithm
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
,
Paolo Bernardi
,
Matteo Sonza Reorda
Communication dans un congrès
lirmm-00539738
v1
|
|
A Statistical Simulation Method for Reliability Analysis of SRAM Core-Cells
Renan Alves Fonseca
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
DAC: Design Automation Conference, Jun 2010, Anaheim, United States. pp.853-856
Communication dans un congrès
lirmm-00553619
v1
|
|
Tutorial intitulé "Power-Aware Testing and Test Strategies for Low Power Devices
Patrick Girard
,
Xiaoqing Wen
,
Nicola Nicolici
ITC'2009: International Test Conference, Nov 2009, Austin, Texas, United States
Communication dans un congrès
lirmm-00820646
v1
|
|
Delay Fault Diagnosis in Sequential Circuits
Youssef Benabboud
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
ATS: Asian Test Symposium, Nov 2009, Taichung, Taiwan. pp.355-360
Communication dans un congrès
lirmm-00406968
v1
|
|
An Efficient Fault Simulation Technique for Transition Faults in Non-Scan Sequential Circuits
Alberto Bosio
,
Paolo Bernardi
,
Patrick Girard
,
Serge Pravossoudovitch
,
Matteo Sonza Reorda
DDECS'09: 12th IEEE Symposium on Design and Diagnostics of Electronic Systems, pp.50-55
Communication dans un congrès
lirmm-00371197
v1
|
|
A Fault-Simulation-Based Approach for Logic Diagnosis
Youssef Benabboud
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2009, Cairo, Egypt. pp.216-221
Communication dans un congrès
lirmm-00371377
v1
|
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Comprehensive Bridging Fault Diagnosis based on the SLAT Paradigm
Youssef Benabboud
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Arnaud Virazel
et al.
DDECS'09: 12th IEEE Symposium on Design and Diagnostics of Electronic Systems, pp.264-269
Communication dans un congrès
lirmm-00371198
v1
|
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A New Design-for-Test Technique for SRAM Core-Cell Stability Faults
Alexandre Ney
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-00371374
v1
|
|
Trade-off Between Power Dissipation and Delay Fault Coverage For LOS and LOC Testing Schemes
Fangmei Wu
,
Luigi Dilillo
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Impact of Low-Power Design on Test and Reliability, Spain
Communication dans un congrès
lirmm-00435005
v1
|
|
Using TMR Architectures for SoC Yield Improvement
Julien Vial
,
Arnaud Virazel
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
et al.
VALID'09: The First International Conference on Advances in System Testing and Validation Lifecycle, 2009, Porto, Portugal. pp.155-160
Communication dans un congrès
lirmm-00406967
v1
|
|
Power-Aware Testing and Test Strategies for Low Power Devices
Patrick Girard
,
Nicola Nicolici
,
Xiaoqing Wen
ATS: Asian Test Symposium, Nov 2009, Taichung, Taiwan
Communication dans un congrès
lirmm-00820650
v1
|
|
Power: The New Dimension of Test
Patrick Girard
IEEE Workshop on RTL and High Level Testing, Sapporo, Japan
Communication dans un congrès
lirmm-00406964
v1
|
|
A Case Study on Logic Diagnosis for System-on-Chip
Youssef Benabboud
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
ISQED 2009 - 10th International Symposium on Quality Electronic Design, Mar 2009, San Jose, CA, United States. pp.253-260, ⟨10.1109/ISQED.2009.4810303⟩
Communication dans un congrès
lirmm-00370646
v1
|
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A Design-for-Diagnosis Technique for SRAM Write Drivers
Alexandre Ney
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-00341796
v1
|
|
Améliorer le rendement grâce aux structures tolérantes aux fautes
Julien Vial
,
Alberto Bosio
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
Journées des Doctorants de l'Ecole Doctorale I2S, France
Communication dans un congrès
lirmm-00341806
v1
|
|
Yield Improvement, Fault-Tolerance to the Rescue?
Julien Vial
,
Alberto Bosio
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00303400
v1
|
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Improved Diagnosis Resolution without Physical Information
Alberto Bosio
,
Alexandre Rousset
,
Patrick Girard
,
Serge Pravossoudovitch
,
Christian Landrault
et al.
DELTA'08: International Symposium on Electronic Design, Test & Applications, Jan 2008, pp.210-215
Communication dans un congrès
lirmm-00260961
v1
|
|
Case Study on Logic Diagnosis for Industrial Circuits
Youssef Benabboud
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
,
Laroussi Bouzaida
et al.
GDR SOC-SIP: System-On-Chip & System-In-Package, France
Communication dans un congrès
lirmm-00343621
v1
|
|
Using TMR Architectures for Yield Improvement
Julien Vial
,
Alberto Bosio
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
DFT'08: 23rd IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Oct 2008, pp.007-015
Communication dans un congrès
lirmm-00326901
v1
|
|
A History-Based Technique for Faults Diagnosis in SRAMs
Alexandre Ney
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Colloque GDR SoC-SiP, France
Communication dans un congrès
lirmm-00341821
v1
|
|
Impact of Technology Scaling on Defects and Parameter Deviations in Embedded SRAMs
Luigi Dilillo
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
VLSI Test Symposium, Apr 2008, San Diego, California, United States. pp.336
Communication dans un congrès
lirmm-00324151
v1
|
|
A Signature-based Approach for Diagnosis of Dynamic Faults in SRAMs
Alexandre Ney
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00324143
v1
|
|
Tolérer Plus pour Fabriquer Plus
Julien Vial
,
Alberto Bosio
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
Colloque GDR SoC-SiP, 2008, Paris, France
Communication dans un congrès
lirmm-00341812
v1
|
|
An SRAM Design-for-Diagnosis Solution Based on Write Driver Voltage Sensing
Alexandre Ney
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Magali Bastian Hage-Hassan
et al.
VTS'08: VLSI Test Symposium, May 2008, San Diego, CA, USA, pp.89-94
Communication dans un congrès
lirmm-00281558
v1
|
|
Tutoriel intitulé "Power-Aware Testing and Test Strategies for Low Power Devices
Patrick Girard
DATE: Design, Automation and Test in Europe, Mar 2008, Munich, Germany
Communication dans un congrès
lirmm-00820638
v1
|
|
Utilisation de structures tolérantes aux fautes pour augmenter le rendement
Julien Vial
,
Christian Landrault
,
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
JNRDM 2008 - 11e Journées Nationales du Réseau Doctoral de Microélectronique, May 2008, Bordeaux, France
Communication dans un congrès
lirmm-00341811
v1
|
|
Keynote intitulé "Power : The New Dimension of Test
Patrick Girard
WRTLT'2008: Workshop on RTL and High Level Testing, Nov 2008, Sapporo, Japan
Communication dans un congrès
lirmm-00820640
v1
|
|
CTX: A Clock-Gating-Based Test Relaxation and X-Filling Scheme for Reducing Yield Loss Risk in At-Speed Scan Testing
Hiroshi Furukawa
,
Xiaoqing Wen
,
Kohei Miyase
,
Yuta Yamato
,
Seiji Kajihara
et al.
Communication dans un congrès
lirmm-00406971
v1
|
|
SoC Symbolic Simulation: A Case Study on Delay Fault Testing
Alberto Bosio
,
Patrick Girard
,
Serge Pravossoudovitch
,
Paolo Bernardi
DDECS'08: IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Apr 2008, Bratislava, Slovakia. pp.320-325
Communication dans un congrès
lirmm-00278340
v1
|
|
A History-Based Diagnosis Technique for Static and Dynamic Faults in SRAMs
Alexandre Ney
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00341798
v1
|
|
A Concurrent Approach for Testing Address Decoder Faults in eFlash Memories
Olivier Ginez
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
ITC'07: International Test Conference, paper 3.2
Communication dans un congrès
lirmm-00194260
v1
|
|
Un-Restored Destructive Write Faults due to Resistive-Open Defects in the Write Driver of SRAMs
Alexandre Ney
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
VTS 2007 - 25th IEEE VLSI Test Symposium, May 2007, Berkeley, CA, United States. pp.361-366, ⟨10.1109/VTS.2007.84⟩
Communication dans un congrès
lirmm-00155979
v1
|
|
Resistive-Open Defect Influences in SRAM I/O Circuitry
Alexandre Ney
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Communication dans un congrès
lirmm-00194282
v1
|
|
Test des Mémoires Flash Embarquées : Analyse de la perturbation entre cellules FloTOx voisines durant une phase de programmation
Olivier Ginez
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
Journées Nationales du Réseau Doctoral de Microélectronique, France
Communication dans un congrès
lirmm-00194274
v1
|
|
Embedded Flash Testing
Olivier Ginez
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Communication dans un congrès
lirmm-00194277
v1
|
|
A Mixed Approach for Unified Logic Diagnosis
Alexandre Rousset
,
Alberto Bosio
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
DDECS'07: IEEE Design and Diagnostics of Electronic Circuits and Systems, Apr 2007, Krakow, Poland, pp.239-242
Communication dans un congrès
lirmm-00161643
v1
|
|
Méthode de diagnostic unifiée pour circuits intégrés numériques
Alexandre Rousset
,
Alberto Bosio
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Communication dans un congrès
lirmm-00194285
v1
|
|
Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories
Olivier Ginez
,
Jean-Michel Daga
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00158543
v1
|
|
A Novel Scheme to Reduce Power Supply Noise for High-Quality At-Speed Scan Testing
Xiaoqing Wen
,
Kohei Miyase
,
Seiji Kajihara
,
Tatsuya Suzuki
,
Yuta Yamato
et al.
Communication dans un congrès
lirmm-00195682
v1
|
|
Influence of Threshold Voltage Deviations on 90nm SRAM Core-Cell Behavior
Magali Bastian Hage-Hassan
,
Vincent Gouin
,
Patrick Girard
,
Christian Landrault
,
Alexandre Ney
et al.
Communication dans un congrès
lirmm-00179276
v1
|
|
Dynamic Two-Cell Incorrect Read Fault due to Resistive-Open Defects in the Sense Amplifiers of SRAMs
Alexandre Ney
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-00158116
v1
|
|
Slow Write Driver Faults in 65nm SRAM Technology: Analysis and March Test Solution
Alexandre Ney
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-00187037
v1
|
|
DERRIC: A Tool for Unified Logic Diagnosis
Alberto Bosio
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Alexandre Rousset
et al.
Communication dans un congrès
lirmm-00155993
v1
|
|
Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window
Olivier Ginez
,
Jean-Michel Daga
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
VTS'07: 25th IEEE VLSI Test Symposium, May 2007, Berkeley, CA (USA), pp.47-52
Communication dans un congrès
lirmm-00151034
v1
|
|
Fast Bridging Fault Diagnosis using Logic Information
Alexandre Rousset
,
Alberto Bosio
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
ATS: Asian Test Symposium, Oct 2007, Beijing, China. pp.33-38
Communication dans un congrès
lirmm-00179259
v1
|
|
Test et testabilité de structures numériques tolérantes aux fautes
Julien Vial
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
Colloque du GDR SoC-SiP, Jun 2007, Paris, France
Communication dans un congrès
lirmm-00194278
v1
|
|
Technique Structurelle d'Affectation des Bits Non Spécifiés en Vue d'une Réduction de la Puissance de Pic Pendant le Test Série
Nabil Badereddine
,
Patrick Girard
,
Serge Pravossoudovitch
,
Christian Landrault
,
Arnaud Virazel
et al.
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, May 2006, Rennes, France
Communication dans un congrès
lirmm-00136838
v1
|
|
Méthode unifiée de diagnostic ciblant l'ensemble des modèles de fautes
Alexandre Rousset
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, May 2006, Rennes, France
Communication dans un congrès
lirmm-00136841
v1
|
|
Diagnostic Multi-Modèles des Circuits Logiques
Alexandre Rousset
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
MAJECSTIC'06: Manifestation des Jeunes Chercheurs STIC, Nov 2006, Lorient, France
Communication dans un congrès
lirmm-00136876
v1
|
|
Leakage Read Fault in Nanoscale SRAM: Analysis, Test and Diagnosis
Luigi Dilillo
,
Bashir Al-Hashimi
,
Paul Rosinger
,
Patrick Girard
IDT'06: IEEE International Design and Test Workshop, Nov 2006, Dubai, United Arab Emirates. pp.110-115
Communication dans un congrès
lirmm-00137603
v1
|
|
Structural-Based Power-Aware Assignment of Don't Cares for Peak Power Reduction during Scan Testing
Nabil Badereddine
,
Patrick Girard
,
Serge Pravossoudovitch
,
Christian Landrault
,
Arnaud Virazel
et al.
VLSI-SOC'06: 14th IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, Oct 2006, Nice (France), pp.403-408
Communication dans un congrès
lirmm-00108141
v1
|
|
Unified Diagnostic Method Targeting Several Fault Models
Alexandre Rousset
,
Patrick Girard
,
Serge Pravossoudovitch
,
Christian Landrault
,
Arnaud Virazel
VLSI-SOC'06: 14th IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, Oct 2006, Nice, pp.53-55
Communication dans un congrès
lirmm-00136869
v1
|
|
Minimizing Test Power in SRAM through Pre-charge Activity Reduction
Luigi Dilillo
,
Paul Rosinger
,
Patrick Girard
,
Bashir Al-Hashimi
Communication dans un congrès
lirmm-00137598
v1
|
|
March Pre: an Efficient Test for Resistive-Open Defects in the SRAM Pre-charge Circuit
Luigi Dilillo
,
Patrick Girard
,
Magali Bastian Hage-Hassan
,
Serge Pravossoudovitch
,
Arnaud Virazel
DDECS'06: Design and Diagnostics of Electronic Circuits and Systems, Apr 2006, Prague, République Tchèque, pp.256-261
Communication dans un congrès
lirmm-00134776
v1
|
|
Power-Aware Test Data Compression for Embedded IP Core
Nabil Badereddine
,
Zhanglei Wang
,
Patrick Girard
,
Krishnendu Chakrabarty
,
Arnaud Virazel
et al.
Communication dans un congrès
lirmm-00116832
v1
|
|
Unified Framework for Logic Diagnosis
Alexandre Rousset
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
EWDTW: East-West Design & Test Workshop, Sep 2006, Sochi, Russia. pp.47-52
Communication dans un congrès
lirmm-00096211
v1
|
|
Embedded Flash Testing: Overview and Perspectives
Olivier Ginez
,
Jean-Michel Daga
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Sep 2006, Tunis, Tunisia. pp.210-215
Communication dans un congrès
lirmm-00093665
v1
|
|
Low Power Testing
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
WRTLT'06: 7th Workshop on RTL and High Level Testing, Nov 2006, Fukuoka, pp.4
Communication dans un congrès
lirmm-00116819
v1
|
|
Minimizing Peak Power Consumption during Scan Testing: Structural Technique for Don't Care Bits Assignment
Nabil Badereddine
,
Patrick Girard
,
Serge Pravossoudovitch
,
Christian Landrault
,
Arnaud Virazel
et al.
PRIME'06: Conference on Ph.D. Research in Microelectronics and Electronics, Jun 2006, Otranto, Italy, pp.65-68
Communication dans un congrès
lirmm-00137614
v1
|
|
Minimizing Peak Power Consumption during Scan Testing: Test Pattern Modification with X Filling Heuristics
Nabil Badereddine
,
Patrick Girard
,
Serge Pravossoudovitch
,
Christian Landrault
,
Arnaud Virazel
et al.
DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Sep 2006, Tunis, Tunisia. pp.359-364
Communication dans un congrès
lirmm-00093690
v1
|
|
An Overview of Failure Mechanisms in Embedded Flash Memories
Olivier Ginez
,
Jean-Michel Daga
,
Marylène Combe
,
Patrick Girard
,
Christian Landrault
et al.
VTS'06: VLSI Test Symposium, Apr 2006, Berkeley, CA, United States. pp.108-113
Communication dans un congrès
lirmm-00102761
v1
|
|
Test Application Time Reduction with a Dynamically Reconfigurable Scan Tree Architecture
Yannick Bonhomme
,
Tomokazu Yoneda
,
Hideo Fujiwara
,
Patrick Girard
8th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS), Apr 2005, Sopron, Hungary. pp.19-26
Communication dans un congrès
lirmm-00105987
v1
|
|
Peak Power Consumption During Scan Testing: Issue, Analysis and Heuristic Solution
Nabil Badereddine
,
Patrick Girard
,
Serge Pravossoudovitch
,
Christian Landrault
,
Arnaud Virazel
DDECS'05: IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, Apr 2005, Sopron, Hungary. pp.151-159
Communication dans un congrès
lirmm-00105990
v1
|
|
Data Retention Fault in SRAM Memories: Analysis and Detection Procedures
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Magali Bastian Hage-Hassan
VTS 2005 - 23rd IEEE VLSI Test Symposium, May 2005, Palm Springs, CA, United States. pp.183-188, ⟨10.1109/VTS.2005.37⟩
Communication dans un congrès
lirmm-00105995
v1
|
|
Analyse et Réduction de la Puissance de Pic durant le Test Série
Nabil Badereddine
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Christian Landrault
JNRDM 2005 - 8e Journées Nationales du Réseau Doctoral de Microélectronique, May 2005, Paris, France
Communication dans un congrès
lirmm-00106528
v1
|
|
Efficient Test of Dynamic Read Destructive Faults in SRAM Memories
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Magali Bastian Hage-Hassan
LATW: Latin American Test Workshop, Mar 2005, Salvador, Bahia, Brazil. pp.40-45
Communication dans un congrès
lirmm-00106515
v1
|
|
Resistive-Open Defect Influence in SRAM Pre-Charge Circuits: Analysis and Characterization
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Magali Bastian Hage-Hassan
Communication dans un congrès
lirmm-00106010
v1
|
|
Resistive-Open Defect Injection in SRAM Core-Cell: Analysis and Comparison Between 0.13 um and 90 nm Technologies
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Magali Bastian Hage-Hassan
DAC: Design Automation Conference, Jun 2005, Anaheim, CA, United States. pp.857-862
Communication dans un congrès
lirmm-00136906
v1
|
|
Controlling Peak Power Consumption During Scan Testing: Power-Aware DfT and Test Set Perspectives
Nabil Badereddine
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Christian Landrault
PATMOS: Power And Timing Modeling, Optimization and Simulation, Sep 2005, Leuven, Belgium. pp.540-549, ⟨10.1007/11556930_55⟩
Communication dans un congrès
istex
lirmm-00106111
v1
|
|
Power-Aware Scan Testing for Peak Power Reduction
Nabil Badereddine
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Christian Landrault
VLSI-SOC'05: IFIP International Conference on Very Large Scale Integration, Oct 2005, Perth, Australia. pp.441-446
Communication dans un congrès
lirmm-00106112
v1
|
|
European Projects: What Type of Instruments for what Type of Research?
Patrick Girard
1st Reconfigurable Communication-Centric SoCs Workshop, Jun 2005
Communication dans un congrès
lirmm-00106559
v1
|
|
Resistive-Open Defect Injection in SRAM Core-Cell: Analysis and Comparison between 0.13μm and 90nm Technologies
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Magali Bastian Hage-Hassan
Communication dans un congrès
lirmm-00106558
v1
|
|
Incidence des Défauts Résistifs dans les Circuits de Précharge des Mémoires SRAM
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Magali Bastian Hage-Hassan
JNRDM 2005 - 8e Journées Nationales du Réseau Doctoral de Microélectronique, May 2005, Paris, France
Communication dans un congrès
lirmm-00106529
v1
|
|
An Efficient Scan Tree Design for Test Time Reduction
Yannick Bonhomme
,
Tomohiro Yoneda
,
Hideo Fujiwara
,
Patrick Girard
Communication dans un congrès
lirmm-00108901
v1
|
|
March iC-: An Improved Version of March C- for ADOFs Detection
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Simone Borri
Communication dans un congrès
lirmm-00108772
v1
|
|
High Quality TPG for Delay Faults in Look-Up Tables of FPGAs
Patrick Girard
,
Olivier Héron
,
Serge Pravossoudovitch
,
Michel Renovell
DELTA'04: 2nd International Workshop on Electronic DesignTest and Applications, Jan 2004, Perth (Australia), pp.83-88
Communication dans un congrès
lirmm-00108830
v1
|
|
March Tests Improvements for Address Decoder Open and Resistive Open Fault Detection
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Simone Borri
et al.
LATW: Latin American Test Workshop, Mar 2004, Cartagena, Colombia. pp.31-36
Communication dans un congrès
lirmm-00108642
v1
|
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Manufacturing-Oriented Testing of Delay Faults in the Logic Architecture of Symmetrical FPGAs
Patrick Girard
,
Olivier Héron
,
Serge Pravossoudovitch
,
Michel Renovell
ETS: European Test Symposium, May 2004, Ajaccio, Corsica, France. pp.117-122
Communication dans un congrès
lirmm-00108905
v1
|
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Resistive-Open Defects in Embedded-SRAM Core Cells: Analysis and March Test Solution
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Simone Borri
et al.
ATS: Asian Test Symposium, Nov 2004, Kenting, Taiwan. pp.266-271
Communication dans un congrès
lirmm-00108800
v1
|
|
Dynamic Read Destructive Faults in Embedded-SRAMs: Analysis and March Test Solution
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Simone Borri
et al.
ETS: European Test Symposium, May 2004, Ajaccio, Corsica, France. pp.140-145
Communication dans un congrès
lirmm-00108795
v1
|
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Design of Routing-Constrained Low Power Scan Chains
Yannick Bonhomme
,
Patrick Girard
,
Loïs Guiller
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00108836
v1
|
|
Test March pour la Détection des Fautes Dynamiques dans les Décodeurs de Mémoires SRAM
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Simone Borri
et al.
JNRDM'04 : 7ièmes Journées Nationales du Réseau Doctoral de Microélectronique, May 2004, Marseille, France. pp.495-497
Communication dans un congrès
lirmm-00108644
v1
|
|
Test de Fautes de Délai dans les Circuits Intégrés Numériques
Patrick Girard
Réunion Action Spécifique CNRS "TestSOC-MRF", 2004
Communication dans un congrès
lirmm-00109139
v1
|
|
Design of Routing-Constrained Low Power Scan Chains
Yannick Bonhomme
,
Patrick Girard
,
Loïs Guiller
,
Christian Landrault
,
Serge Pravossoudovitch
et al.
Communication dans un congrès
lirmm-00108833
v1
|
|
BIST of Delay Faults in the Logic Architecture of Symmetrical FPGAs
Patrick Girard
,
Olivier Héron
,
Serge Pravossoudovitch
,
Michel Renovell
Communication dans un congrès
lirmm-00108824
v1
|
|
Conditions pour le Test de Pannes de Délai des Look-Up Table dans les FPGA à Base de SRAM
Patrick Girard
,
Olivier Héron
,
Serge Pravossoudovitch
,
Michel Renovell
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, May 2003, Toulouse, France. pp.381-383
Communication dans un congrès
lirmm-00269544
v1
|
|
Defect Analysis for Delay-Fault BIST in FPGAs
Patrick Girard
,
Olivier Héron
,
Serge Pravossoudovitch
,
Michel Renovell
Communication dans un congrès
lirmm-00269553
v1
|
|
Timing Defect Analysis in Look-Up Tables of SRAM-Based FPGAs
Patrick Girard
,
Olivier Héron
,
Serge Pravossoudovitch
,
Michel Renovell
LATW: Latin American Test Workshop, Feb 2003, Natal, Brazil. pp.26-31
Communication dans un congrès
lirmm-00269497
v1
|
|
Power Conscious Testing
Yannick Bonhomme
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
EWDTC: East-West Design & Test Conference, Sep 2003, Yalta, Ukraine. pp.29-31
Communication dans un congrès
lirmm-00269649
v1
|
|
Comparison of open and resistive-open defect test conditions in SRAM address decoders
Luigi Dilillo
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
,
Simone Borri
et al.
Communication dans un congrès
lirmm-01238821
v1
|
|
Defect-Oriented Dynamic Fault Models for Embedded-SRAMs
Simone Borri
,
Magali Bastian Hage-Hassan
,
Patrick Girard
,
Serge Pravossoudovitch
,
Arnaud Virazel
ETW: European Test Workshop, May 2003, Maastricht, Netherlands. pp.23-28
Communication dans un congrès
lirmm-00269526
v1
|
|
Requirements for Delay Testing of Look-Up Tables in SRAM-Based FPGAs
Patrick Girard
,
Olivier Héron
,
Serge Pravossoudovitch
,
Michel Renovell
ETW: European Test Workshop, May 2003, Maastricht, Netherlands. pp.147-152
Communication dans un congrès
lirmm-00269530
v1
|
|
Efficient Scan Chain Design for Power Minimization During Scan Testing Under Routing Constraint
Yannick Bonhomme
,
Patrick Girard
,
Loïs Guiller
,
Christian Landrault
,
Serge Pravossoudovitch
Communication dans un congrès
lirmm-00269529
v1
|
|
Pannes Temporelles dans les FPGA
Patrick Girard
,
Olivier Héron
,
Serge Pravossoudovitch
,
Michel Renovell
Colloque du GDR CAO de Circuits et Systèmes Intégrés, May 2002, Paris, France. pp.43-46
Communication dans un congrès
lirmm-00269327
v1
|
|
On Using Efficient Test Sequences for BIST
René M. G. David
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
VTS: VLSI Test Symposium, 2002, Monterey, CA, United States. pp.145-150
Communication dans un congrès
lirmm-00268499
v1
|
|
Scan Cell Ordering for Low Power Scan Testing
Yves Bonhomme
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
ETW: European Test Workshop, May 2002, Corfu, Greece
Communication dans un congrès
lirmm-00269337
v1
|
|
Power Driven Chaining of Flip-Flops in Scan Architectures
Yannick Bonhomme
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
Communication dans un congrès
lirmm-00268492
v1
|
|
Test Power: A Big Issue in Large SOC Design
Yannick Bonhomme
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
IEEE International Workshop on Electronic DesignTest and Applications, Christchurch, New Zeland, pp.447-449
Communication dans un congrès
lirmm-00268493
v1
|
|
Test Intégré de Circuits Digitaux : Comparaison de deux types de Séquences de Test
Arnaud Virazel
,
René M. G. David
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
Journées des Doctorants, École Doctorale I2S, 2001, Montpellier, France. pp.158-160
Communication dans un congrès
lirmm-00345806
v1
|
|
On Hardware Generation of Random Single Input Change Test
René M. G. David
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
ETW: European Test Workshop, May 2001, Saltsjöbaden, Sweden. pp.117-123
Communication dans un congrès
lirmm-00345801
v1
|
|
Test Intégré de Circuits Digitaux : Etude Comparative de l'Efficacité de deux types de Séquences de Test
Arnaud Virazel
,
René M. G. David
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
JNRDM: Journées Nationales du Réseau Doctoral de Microélectronique, LIRMM; CEM2, May 2000, Montpellier, France. pp.86-87
Communication dans un congrès
lirmm-00345804
v1
|
|
Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
,
Arnaud Virazel
Communication dans un congrès
lirmm-00345800
v1
|
|
Delay Fault Testing: Choosing Between Random SIC and Random MIC Test Sequences
Arnaud Virazel
,
René M. G. David
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
Communication dans un congrès
lirmm-00345799
v1
|
|
Analyse des capacités de test de générateurs intégrés produisant des vecteurs adjacents
Arnaud Virazel
,
Patrick Girard
,
Christian Landrault
,
Serge Pravossoudovitch
Colloque CAO de Circuits Intégrés et Systèmes, France. pp.88-91
Communication dans un congrès
lirmm-00345803
v1
|
|
A Ring Architecture Strategy for BIST Test Pattern Generation
Christophe Fagot
,
Olivier Gascuel
,
Patrick Girard
,
Christian Landrault
Communication dans un congrès
lirmm-00269518
v1
|
|
A BIST Structure to Test Delay Faults in a Scan Environment
Patrick Girard
,
Christian Landrault
,
Véronique Moreda
,
Serge Pravossoudovitch
,
Arnaud Virazel
ATS: Asian Test Symposium, Dec 1998, Singapore, Singapore. pp.435-439
Communication dans un congrès
lirmm-00345798
v1
|