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Roselyne Chotin

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Documents

Publications

Novel architectural space exploration environment for multi-FPGA based prototyping systems

Roselyne Chotin-Avot , Umer Farooq , Muhammad Moazam Azeem , Maminionja Ravoson , Habib Mehrez
Microprocessors and Microsystems: Embedded Hardware Design , 2018, 56, pp.169 - 183. ⟨10.1016/j.micpro.2017.12.006⟩
Article dans une revue hal-01667303v1

AES-GCM and AEGIS: Efficient and High Speed Hardware Implementations

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
Journal of Signal Processing Systems, 2016, pp.1-12. ⟨10.1007/s11265-016-1104-y⟩
Article dans une revue hal-01259067v1
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Low cost Solutions for Secure Remote Reconfiguration of FPGAs

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
International Journal of Embedded Systems, 2014, 6 (2-3), pp.257-265. ⟨10.1504/ijes.2014.063824⟩
Article dans une revue hal-01017873v1
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Authenticated Encryption on FPGAs from the Static Part to the Reconfigurable Part

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
Microprocessors and Microsystems: Embedded Hardware Design , 2014, 38 (6), pp.526-538. ⟨10.1016/j.micpro.2014.03.006⟩
Article dans une revue hal-01017913v1

Exploring redundant arithmetics in computer-aided design of arithmetic datapaths

Sophie Belloeil , Roselyne Chotin-Avot , Habib Mehrez
Integration, the VLSI Journal, 2013, 46 (2), pp.104-118. ⟨10.1016/j.vlsi.2012.02.002⟩
Article dans une revue hal-01197289v1

High Performances ASIC Based Elliptic Curve Cryptographic Processor over GF(2m)

Zied Guitouni , Roselyne Chotin-Avot , Mohsen Machhout , Habib Mehrez , Rached Tourki
International Journal of Computer Applications, 2011, Special Issue on Network Security and Cryptography (NSC) (4), pp.1-10. ⟨10.5120/4342-039⟩
Article dans une revue hal-01197278v1

Hardware implementation of discrete stochastic arithmetic

Roselyne Chotin-Avot , Habib Mehrez
Numerical Algorithms, 2004, 37 (1-4), pp.21-33. ⟨10.1023/B:NUMA.0000049455.07441.ee⟩
Article dans une revue hal-01195967v1
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Mathematical modelling of Logic Locking against the insertion of Hardware Trojan in an Intregated Circuit

Jonathan Fontaine , Lilia Zaourar , Roselyne Chotin
31 European conference on operational research, Jul 2021, Athènes, Greece
Communication dans un congrès cea-03463941v1
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Optimisation de contre-mesure à l'insertion de Hardware Trojan

Jonathan Fontaine , Lilia Zaourar , Roselyne Chotin
22ème Conférence ROADEF de la société Française de Recherche Opérationnelle et Aide à la Décision, Apr 2021, Mulhouse, France
Communication dans un congrès cea-03463925v1

Toward an Implementation Modeling Methodology for Designing SCA resilient Cryptographic Circuits

Gabriel Rocherolle , Roselyne Chotin
2021 16th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Jun 2021, Montpellier, France. pp.1-4, ⟨10.1109/DTIS53253.2021.9505109⟩
Communication dans un congrès hal-03650043v1
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FPGA Acceleration of the Horn and Schunck Hierarchical algorithm

Ilias Bournias , Roselyne Chotin , Lionel Lacassagne
International Symposium on Circuits and Systems (ISCAS), May 2021, Daegu, South Korea. ⟨10.1109/ISCAS51556.2021.9401068⟩
Communication dans un congrès hal-03330803v1

A HDL Generator for Flexible and Efficient Finite-Field Multipliers on FPGAs

Joël Cathébras , Roselyne Chotin
WAIFI 2020 - 8th International Workshop on Arithmetic of Finite Fields, Jul 2020, Rennes, France. pp.75-91, ⟨10.1007/978-3-030-68869-1_4⟩
Communication dans un congrès hal-03650044v1

Model-Based Virtual Prototyping of CPS: Application to Bio-Medical Devices

Daniela Genius , Ilias Bournias , Ludovic Apvrille , Roselyne Chotin
MODELSWARD 2020: Model-Driven Engineering and Software Development, Feb 2020, Valletta, Malta. pp.74-96, ⟨10.1007/978-3-030-67445-8_4⟩
Communication dans un congrès hal-03161772v1

High-level Partitioning and Design Space Exploration for Cyber Physical Systems

Daniela Genius , Ilias Bournias , Ludovic Apvrille , Roselyne Chotin
Modelsward 2020 - 8th International Conference on Model-Driven Engineering and Software Development, Feb 2020, Valletta, Malta. pp.84-91, ⟨10.5220/0009171600840091⟩
Communication dans un congrès hal-02953962v1

Virtual Prototyping of Open Source Heterogeneous Systems with an Open Source Framework Featuring SystemC MDVP Extensions

Francois Pecheux , Liliana Lilibeth Andrade Porras , Marie-Minerve Louërat , Ilias Bournias , Roselyne Chotin
2020 Forum for Specification and Design Languages (FDL), Sep 2020, Kiel, Germany. pp.1-8, ⟨10.1109/FDL50818.2020.9232947⟩
Communication dans un congrès hal-03065588v1

RISC-V design using Free Open Source Software

Jean-Paul Chaput , Marie-Minerve Louërat , Roselyne Chotin-Avot , Adrian Satin
the RISC-V Week, Oct 2019, Paris, France
Communication dans un congrès hal-02316711v1
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MixLock: Securing Mixed-Signal Circuits via Logic Locking

Julian Leonhard , Muhammad Yasin , Shadi Turk , Mohammed Thari Nabeel , Marie-Minerve Louërat
Design, Automation and Test in Europe (DATE 2019), Mar 2019, Florence, Italy. pp.84-89
Communication dans un congrès hal-02094516v1

Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration

Umer Farooq , Roselyne Chotin-Avot , Muhammad Moazam Azeem , Zouha Cherif , Maminionja Ravoson
Euromicro Conference on Digital System Design (DSD), Aug 2016, Limassol, Cyprus. pp.641-645, ⟨10.1109/DSD.2016.93⟩
Communication dans un congrès hal-01406787v1

AEGIS-Based Efficient Solution for Secure Reconfiguration of FPGAs

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
Cryptography and Security in Computing Systems, Jan 2016, Prague, Czech Republic. pp.37-40, ⟨10.1145/2858930.2858937⟩
Communication dans un congrès hal-01259069v1

Multiple FPGAs based prototyping and debugging with complete design flow

Muhammad Moazam Azeem , Roselyne Chotin-Avot , Umer Farooq , Maminionja Ravoson , Habib Mehrez
IDT 2016 - 11th International Design & Test Symposium, Dec 2016, Hammamet, Tunisia. pp.171-176, ⟨10.1109/IDT.2016.7843035⟩
Communication dans un congrès hal-01657908v1

Inter-FPGA Routing Environment for Performance Exploration of Multi-FPGA Systems

Umer Farooq , Roselyne Chotin-Avot , Muhammad Moazam Azeem , Maminionja Ravoson , Habib Mehrez
Rapid System Prototyping (RSP), Oct 2016, Pittsburgh, United States. pp.1-6
Communication dans un congrès hal-01406803v1

A reference-based specification tool for creating reliable library development specifications

Jung Kyu Chae , Paul Mougeat , Jean-Arnaud François , Roselyne Chotin-Avot , Habib Mehrez
12th International New Circuits and Systems Conference, NEWCAS 2014, Jun 2014, Trois-Rivieres, QC, Canada. pp.133-136, ⟨10.1109/NEWCAS.2014.6934001⟩
Communication dans un congrès hal-01217236v1

Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA

Saif-Ur Rehman , Adrien Blanchardon , Arwa Ben Dhia , Mounir Benabdenbi , Roselyne Chotin-Avot
IEEE Computer Society Annual Symposium on VLSI (ISVLSI'14), Jul 2014, Tampa, FL, United States. pp.553-558, ⟨10.1109/ISVLSI.2014.66⟩
Communication dans un congrès hal-01400630v1
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Improve defect tolerance in a cluster of a SRAM-based Mesh of Cluster FPGA using hardware redundancy

Adrien Blanchardon , Roselyne Chotin-Avot , Habib Mehrez , Emna Amouri
FPL 2014 - 24th International Conference on Field Programmable Logic and Applications, Sep 2014, Munich, Germany. pp.1-4, ⟨10.1109/FPL.2014.6927389⟩
Communication dans un congrès hal-01162011v1

FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Ofman Algorithm

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications, ARC 2014, Apr 2014, Vilamoura, Portugal. pp.13-24, ⟨10.1007/978-3-319-05960-0_2⟩
Communication dans un congrès hal-01219833v1
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Impact of defect tolerance techniques on the criticality of a SRAM-based Mesh of Cluster FPGA

Adrien Blanchardon , Roselyne Chotin-Avot , Habib Mehrez , Emna Amouri
ReConFig 2014 - International Conference on ReConFigurable Computing and FPGAs, Dec 2014, Cancun, Mexico. pp.1-6, ⟨10.1109/ReConFig.2014.7032508⟩
Communication dans un congrès hal-01162066v1
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Efficient Multilevel Interconnect Topology for Cluster-based Mesh FPGA Architecture

Emna Amouri , Adrien Blanchardon , Roselyne Chotin-Avot , Habib Mehrez , Zied Marrakchi
ReConFig 2013 - International Conference on Reconfigurable Computing and FPGAs, Dec 2013, Cancun, Mexico. pp.1-6, ⟨10.1109/ReConFig.2013.6732282⟩
Communication dans un congrès hal-00987368v2

A formalism of the specifications for library development

Jung Kyu Chae , Paul Mougeat , Jean-Arnaud Francois , Roselyne Chotin-Avot , Habib Mehrez
IEEE International System-on-Chip Conference, Sep 2013, Erlangen, Germany. pp.307-312, ⟨10.1109/SOCC.2013.6749706⟩
Communication dans un congrès hal-00953500v1

Lightweight and Compact Solutions for Secure Reconfiguration of FPGAs

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
International Conference on Reconfigurable Computing and FPGAs, Dec 2013, Cancun, Mexico. pp.1-4, ⟨10.1109/ReConFig.2013.6732304⟩
Communication dans un congrès hal-01216543v1
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Improved Method for Parallel AES-GCM Cores Using FPGAs

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
ReConFig 2013 - International Conference on Reconfigurable Computing and FPGAs, Dec 2013, Cancun, Mexico. pp.1-4, ⟨10.1109/ReConFig.2013.6732299⟩
Communication dans un congrès hal-01160904v1
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High Speed Authenticated Encryption for Slow Changing Key Applications Using Reconfigurable Devices

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
Wireless Days (WD), 2013 IFIP, Nov 2013, Valencia, Spain. pp.1 - 6, ⟨10.1109/WD.2013.6686460⟩
Communication dans un congrès hal-01017858v2

Formalisme de la spécification de la plateforme de conception pour le développement de la bibliothèque

Jung Kyu Chae , Paul Mougeat , Jean-Arnaud François , Roselyne Chotin-Avot , Habib Mehrez
Journees Nationales du Reseau Doctoral de Micro-electronique, 2013, Grenoble, France. pp.1-4
Communication dans un congrès hal-01215668v1
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A Defect-tolerant Cluster in a Mesh SRAM-based FPGA

Arwa Ben Dhia , Saif Ur Rehman , Adrien Blanchardon , Lirida Naviner , Mounir Benabdenbi
International Conference on Field-Programmable Technology (FPT), Dec 2013, Kyoto, Japan. pp.434-437, ⟨10.1109/FPT.2013.6718407⟩
Communication dans un congrès hal-00987365v1

Efficient State-Dependent Power Model for Multi-bit Flip-Flop Banks

Jung Kyu Chae , Severine Bertrand , Pierre-Francois Ollagnon , Paul Mougeat , Jean-Arnaud Francois
IEEE International Midwest Symposium on Circuits and Systems, Aug 2013, Columbus, United States. pp.461-464, ⟨10.1109/MWSCAS.2013.6674685⟩
Communication dans un congrès hal-00913885v1
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Protecting FPGA Bitstreams Using Authenticated Encryption

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
11th IEEE International Conference of New Circuits and Systems (NEWCAS), Jun 2013, Paris, France. pp.1-4, ⟨10.1109/NEWCAS.2013.6573635⟩
Communication dans un congrès hal-01017823v2
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Générateur d'Architecture de FPGA

Adrien Blanchardon , Roselyne Chotin-Avot , Habib Mehrez
Colloque GDR SOC-SIP, Jun 2012, Paris, France. pp.1-3
Communication dans un congrès hal-00987369v1
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Efficient Parallel-Pipelined GHASH for Message Authentication

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
International Conference on Reconfigurable Computing and FPGAs (ReConFig 2012), Dec 2012, Cancun, Mexico. pp.1 - 6, ⟨10.1109/ReConFig.2012.6416742⟩
Communication dans un congrès hal-01017807v1

Synthesis and Optimization of Quantum Boolean Circuit Using the Truth Table Method

Fatma Hamzaoui , Roselyne Chotin-Avot , Patricia Renault , Habib Mehrez , Hafedh Belmabrouk
International Workshop on Number Theory, Codes, Cryptography and Communication Systems (NTCCCS), Apr 2012, Oujda, Morocco. pp.192-197
Communication dans un congrès hal-01265626v1

The Effect of S-box Design on Pipelined AES Using FPGAs

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Habib Mehrez
Colloque GDR SOC-SIP, Jun 2012, Paris, France. pp.1-4
Communication dans un congrès hal-01265624v1

Quantum circuits design and simulation

Fatma Hamzaoui , Roselyne Chotin-Avot , Mohsen Machhout , Habib Mehrez , Hafedh Belmabrouk
The First International Conference on "Research to Applications & Markets" (RAM 2011), Jun 2011, Monastir, Tunisia. pp.115-115
Communication dans un congrès hal-01265628v1

Stratus: Free design of highly parametrized VLSI modules interoperable with commercial tools

Sophie Belloeil , Roselyne Chotin-Avot , Habib Mehrez
ISQED 2011 - 12th International Symposium on Quality Electronic Design, Mar 2011, Santa Clara, CA, United States. pp.502-507, ⟨10.1109/ISQED.2011.5770774⟩
Communication dans un congrès hal-01265627v1

Modélisation et simplification de circuits quantiques

Fatma Hamzaoui , Besma Othmani , Roselyne Chotin-Avot , Mohsen Machhout , Hafedh Belmabrouk
Materiaux 2010, Nov 2010, Mahdia, Tunisia. pp.2-2
Communication dans un congrès hal-01265629v1

Design and FPGA Implementation of Modular Multiplication Methods Using Cellular Automata

Zied Guitouni , Roselyne Chotin-Avot , Mohsen Machhout , Habib Mehrez , Rached Tourki
DTIS IEEE International Conference on Design & Test of Integrated Systems in Nanoscale Technology, Mar 2010, Hammamet, Tunisia. pp.1-5, ⟨10.1109/DTIS.2010.5487586⟩
Communication dans un congrès hal-01265630v1

Automatic Allocation of Redundant Operators in Arithmetic Data path Optimization

Sophie Belloeil , Roselyne Chotin-Avot , Habib Mehrez , Alix Munier-Kordon
DASIP IEEE International Conference on Design and Architectures for Signal and Image Processing, Nov 2008, Bruxelles, Belgium. pp.176-183
Communication dans un congrès hal-01265631v1

Arithmetic Data path Optimization using Borrow-Save Representation

Sophie Belloeil , Roselyne Chotin-Avot , Habib Mehrez
ISVLSI IEEE Computer Society Annual Symposium on Emerging VLSI, Apr 2008, Montpellier, France. pp.4-9, ⟨10.1109/ISVLSI.2008.29⟩
Communication dans un congrès hal-01265632v1

Data Path Optimization using Redundant Arithmetic and Pattern Matching

Sophie Belloeil , Roselyne Chotin-Avot , Habib Mehrez
Workshop on Design and Architectures for Signal and Image Processing (DASIP'2007), Nov 2007, Grenoble, France. pp.281-288
Communication dans un congrès hal-01265633v1

Mapping an obstacles detection, stereo vision-based, software application on a multi-processor system-on-chip

Alain Greiner , Frédéric Pétrot , Mathieu Carrier , Mounir Benabdenbi , Roselyne Chotin-Avot
IV 2006 - IEEE Intelligent Vehicles Symposium, Jun 2006, Tokyo, Japan. pp.370-376, ⟨10.1109/IVS.2006.1689656⟩
Communication dans un congrès hal-00103535v1

Stratus : Un environnement de développement de circuits

Sophie Belloeil , Jean-Paul Chaput , Roselyne Chotin-Avot , Christian Masson , Habib Mehrez
JP CNFM Journées pédagogiques du CNFM, 2006, Saint-Malo, France. pp.57-61
Communication dans un congrès hal-01265634v1

MP-SoC Architecture for an Obstacle Detection Application in Pre-Crash Situation

Alain Greiner , Frédéric Pétrot , Mathieu Carrier , Mounir Benabdenbi , Roselyne Chotin-Avot
2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC'06), Jul 2006, Montpellier, France. pp.24-30
Communication dans un congrès hal-01413171v1

Hardware implementation of discrete stochastic arithmetic

Roselyne Chotin-Avot , Habib Mehrez
6th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS'03), 2003, Poznan, Poland. pp.57-64
Communication dans un congrès hal-01267471v1

On the computation of the CESTAC function

Roselyne Chotin-Avot , Jean-Marie Chesneaux , Jean-Luc Lamotte
Real Numbers and Computers 5 (RNC5), Sep 2003, Lyon, France. pp.247-260
Communication dans un congrès hal-01265635v1

Implantation matérielle d'une méthode de contrôle des erreurs d'arrondi de calcul

Roselyne Chotin , Habib Mehrez
Troisième colloque du GDR CAO de circuits et systèmes intégrés, 2002, Paris, France. pp.63-66
Communication dans un congrès hal-01265636v1

Hardware implementation of the CESTAC method

Roselyne Chotin , Habib Mehrez
10th GAMM - IMACS International Symposium on Scientific Computing Computer Arithmetic and Validated Numerics (SCAN'2002), Sep 2002, Paris, France. pp.162-162
Communication dans un congrès hal-01265638v1

A Floating-Point Unit using stochastic arithmetic compliant with the IEEE-754 standard

Roselyne Chotin , Habib Mehrez
9th IEEE International Conference on Electronics Circuits and Systems (ICECS'2002), Sep 2002, Dubrovnik, Croatia. pp.603-606, ⟨10.1109/ICECS.2002.1046241⟩
Communication dans un congrès hal-01265640v1

Hardware implementation of a method to control round-off errors

Roselyne Chotin , Habib Mehrez
6th WSEAS International Multiconference on Circuits Systems Communications and Computers (CSCC'2002), Jul 2002, Rethymnon, Greece. pp.157-162
Communication dans un congrès hal-01265639v1

Une unité de calcul flottant utilisant l'arithmétique stochastique

Roselyne Chotin , Habib Mehrez
Vèmes Journées Nationales du Réseau Doctoral de Micro-électronique (JNRDM'2002), 2002, Grenoble, France. pp.217-218
Communication dans un congrès hal-01265637v1

Use of Redundant Arithmetic on Architecture and Design of a High Performance DCT Macro-bloc Generator

Roselyne Chotin , Yannick Dumonteix , Habib Mehrez
15th Design of Circuits and Integrated Systems Conference (DCIS), 2000, Montpellier, France. pp.428-433
Communication dans un congrès hal-01265641v1
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Architectures matérielles pour l'arithmétique stochastique discrète

Roselyne Chotin-Avot
Arithmétique des ordinateurs. Université Pierre et Marie Curie (Paris, France), 2003. Français. ⟨NNT : ⟩
Thèse tel-01267458v1

Towards high performance GHASH for pipelined AES-GCM using FPGAs

Karim Moussa Ali Abdellatif , Roselyne Chotin-Avot , Zied Marrakchi , Habib Mehrez , Qingshan Tang
ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA '14, Feb 2014, Monterey, CA, United States. ACM, pp.242-242, 2014, ⟨10.1145/2554688.2554709⟩
Poster de conférence hal-00969267v1