Yves BERVILLER
- Institut Jean Lamour (IJL)
Domaines de recherche
Publications
Publications
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An algorithm for the detection of DC series-arc faults using a Convolution Neural Network2022 IEEE 67th Holm Conference on Electrical Contacts (HLM 2022), Oct 2022, Tampa, FL, United States. ⟨10.1109/HLM54538.2022.9969784⟩ |
Hardware partitioning software for dynamically reconfigurable SoC designthe 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, Jan 2008, Calgary, Canada. pp.106-111, ⟨10.1109/IWSOC.2003.1213016⟩ |
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FPGA-based SoC for transcoding H264/AVC-SVC with low latency and high bitrate entropy coding2009 IEEE International SOC Conference (SOCC 2009), Sep 2009, Belfast, United Kingdom. pp.423-426, ⟨10.1109/SOCCON.2009.5398004⟩ |
Systemc model of a MPEG-2 DVB-T bit-rate measurement architecture for FPGA implementationProceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004., Jun 2013, Geneva, Italy. pp.157-163, ⟨10.1109/IWRSP.2004.1311111⟩ |
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An efficient VLSI implementation of H.264/AVC intra-frame transcoder2011 18th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2011), Dec 2011, Beirut, Lebanon. pp.1-4, ⟨10.1109/ICECS.2011.6122199⟩ |
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Efficient implementation of a 3-D medical imaging compression system using CAVLC2010 17th IEEE International Conference on Image Processing (ICIP 2010), Sep 2010, Hong Kong, China. pp.3773-3776, ⟨10.1109/ICIP.2010.5653472⟩ |
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Transrating by frequencies selectivity for H.264/AVC intra pictures2009 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting (BMSB), May 2009, Bilbao, Spain. pp.1-7, ⟨10.1109/ISBMSB.2009.5133730⟩ |
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TOSCANE : TOwards SCalable Audiovisual Communication NetworksIEEE Global Information Infrastructure Symposium, GIIS 2009, 2009, Tunisia. pp.1-6, ⟨10.1109/GIIS.2009.5307043⟩ |
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Transrating by frequencies selectivity for H.264/AVC intra picturesIEEE International Symposium on Broadband Multimedia Systems and Braodcasting, BMSB 2009, 2009, Spain. pp.59-64, ⟨10.1109/ISBMSB.2009.5133730⟩ |
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TOSCANE: TOwards SCalable audiovisual communication networks2009 Global Information Infrastructure Symposium (GIIS), Jun 2009, Hammemet, Tunisia. pp.1-6, ⟨10.1109/GIIS.2009.5307043⟩ |
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TOSCANE - optimised transmission of scalable video in terms of source/channel codingInternational Broadcasting Conference, IBC 2009, 2009, Amsterdam, Netherlands |
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A Design Methodology for Power Electronics Digital Control based on an FPGA in the Loop Prototyping2007 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS '07), Dec 2007, Marrakech, Morocco. pp.701-704, ⟨10.1109/ICECS.2007.4511088⟩ |
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Comparison of various strategies of implementation of the algorithm of encryption AES on FPGA2006 IEEE International Symposium on Industrial Electronics, Jul 2006, Montreal, Canada. pp.3276-3280, ⟨10.1109/ISIE.2006.296142⟩ |
Implementation materielle d'un decodeur conceptuel pour l'analyse video MPEG-2 temps reelCanadian Conference on Electrical and Computer Engineering, 2005., May 2005, Saskatoon, Canada. pp.1743-1746, ⟨10.1109/CCECE.2005.1557320⟩ |
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Configurable hardware implementation of a conceptual decoder for a real-time MPEG-2 analysisInternational Conference on Field Programmable Logic and Applications, 2005., Aug 2005, Tampere, Finland. pp.386-390, ⟨10.1109/FPL.2005.1515752⟩ |
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Proof-based design of a microelectronic architecture for MPEG-2 bit-rate measurementForum on specification and Design Languages - FDL'03, 2003, Frankfurt, Germany, France. 12 p |
FPGA-based architectures of finite radon transform for medical image de-noisingIEEE, pp.20-23, 2011, ⟨10.1109/APCCAS.2010.5774903⟩ |
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Hardware implementation of a conceptual decoder for real time analysis of MPEG-2 DVB-T stream30 (31), pp.41, 2005 |
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FPGA Implementation of a Novel All Digital PLL Architecture for PCR Related Measurements in DVB-T3203, Springer Berlin Heidelberg, pp.1027-1031, 2004, Lecture Notes in Computer Science, ⟨10.1007/978-3-540-30117-2_120⟩ |
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FPGA Implementation of a Novel Architecture for PCR Related Measurements In DVB-Tpp.606-610, 2004 |
TOSCANE - optimised transmission of scalable video in terms of source/channel coding2009 |
DEVICE FOR MEASURING PARAMETERS RELATING TO PROGRAM CLOCK REFERENCES ESPECIALLY IN STREAMS, AND FREQUENCY SYNTHESISERFrance, Patent n° : WO2007/090858. 2007 |
FPGA Implementation of a Novel All Digital PLL Architecture for PCR Related Measurements in DVB-TField Programmable Logic and Application, 3203, Springer Berlin Heidelberg, pp.1027-1031, 2004, Lecture Notes in Computer Science, 978-3-540-22989-6. ⟨10.1007/978-3-540-30117-2_120⟩ |
Détection d'éléments en approche dans une zone mobile par vision artificielle et applicationsAutre. Université Henri Poincaré - Nancy 1, 1998. Français. ⟨NNT : 1998NAN10001⟩ |