Pierre Boulet
- Centre de Recherche en Informatique, Signal et Automatique de Lille - UMR 9189 (CRIStAL)
Publications
Publications
|
|
Asynchronous Multi-fidelity Hyperparameter Optimization Of Spiking Neural NetworksInternational Conference on Neuromorphic Systems (ICONS 2024), Jul 2024, Washington, United States |
[Invited] Ultra low power Cochlea for biodiversity monitoringColloque BIOCOMP 2023, Nov 2023, Banyuls - sur - Mer, France |
|
|
|
How to Integrate Environmental Challenges in Computing Curricula?SIGCSE 2022: The 53rd ACM Technical Symposium on Computer Science Education, Mar 2022, Providence, United States. pp.899-905, ⟨10.1145/3478431.3499280⟩ |
|
|
VS2N : Interactive Dynamic Visualization and Analysis Tool for Spiking Neural NetworksContent-Based Multimedia Indexing, Jun 2021, Lille, France |
Artificial Intelligence and Micropaleontology: a case study from the Eocene genus Podocyrtis27e édition de la Réunion des Sciences de la Terre, SGF, CNRS, Laboratoire de Géologie de Lyon ou l’étude de la Terre, des planètes et de l’environnement, Nov 2021, Lyon, France |
|
|
|
Multi-layered Spiking Neural Network with Target Timestamp Threshold Adaptation and STDPInternational Joint Conference on Neural Networks (IJCNN), Jul 2019, Budapest, Hungary |
|
|
Visualization Techniques in SNN Simulators3rd International Conference on Multimedia Information Processing, CITIM’2018, Oct 2018, Mascara, Algeria |
Mastering the Output Frequency in Spiking Neural NetworksInternational Joint Conference on Neural Networks (IJCNN), Jul 2018, Rio de Janeiro, Brazil |
|
|
|
An Experimental Methodology for Modeling the Energy Consumption of Mobile DevicesFirst international conference on Embedded & Distributed Systems, EDiS’2017, Dec 2017, Oran, Algeria |
|
|
Impact of Increasing Number of Neurons on Performance of Neuromorphic ArchitectureCADS 2017 - 19th CSI International Symposium on Computer Architecture & Digital Systems, Dec 2017, Kish, Iran |
|
|
Flexible Simulation for Neuromorphic Circuit Design: Motion Detection Case StudyConférence d’informatique en Parallélisme, Architecture et Système (ComPAS), Jun 2017, Nice Sophia Antipolis, France |
Modeling Parallel Real-time Tasks with Di-GraphsRTNS '16 - Proceedings of the 24th International Conference on Real-Time Networks and Systems , Oct 2016, Brest, France. pp.349-358, ⟨10.1145/2997465.2997475⟩ |
|
|
|
Combining a Volatile and Nonvolatile Memristor in Artificial Synapse to Improve Learning in Spiking Neural NetworksNANOARCH 2016 - 12th ACM/IEEE International Symposium on Nanoscale Architectures, Jul 2016, Beijing, China. ⟨10.1145/2950067.2950090⟩ |
|
|
MID: A MetaCASE Tool For A Better Reuse Of Visual Notations8th System Analysis and Modelling conference (SAM 2014), Sep 2014, Valencia, Spain. pp.16-31, ⟨10.1007/978-3-319-11743-0_2⟩ |
|
|
A Component-Based Approach for Specifying DSML's Concrete Syntax2nd Workshop on Graphical Modeling Language Development (GMLD 2013), Jul 2013, Montpellier, France. pp.3-11, ⟨10.1145/2489820.2489822⟩ |
|
|
A Component-Based Approach for Specifying Reusable Visual Languages2013 IEEE Symposium on Visual Languages and Human-Centric Computing, Allen Cypher, Sep 2013, San José, CA, United States. pp.135-138, ⟨10.1109/VLHCC.2013.6645257⟩ |
|
|
Specifez vos éditeurs de diagrammes à l'aide de composants réutilisables2ème Conférence en Ingénierie Logiciele (CIEL'13), Université de Lorraine - LORIA, Apr 2013, Nancy, France |
An Optimized Compilation of UML State MachinesISORC - 15th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, Apr 2012, Shenzhen, China |
|
|
|
Harnessing the Power of GPUs without Losing Abstractions in SaC and ArrayOL: A Comparative StudyHIPS 2011, 16th International Workshop on High-Level Parallel Programming Models and Supportive Environments, May 2011, Anchorage (Alaska), United States |
|
|
Modeling Networks-on-Chip at System Level with the MARTE UML profileM-BED'2011, Mar 2011, Grenoble, France |
|
|
Architecture Exploration for Efficient Data Transfer and Storage in Data-Parallel ApplicationsEuro-Par - 16th International Euro-Par Conference - 2010, Aug 2010, Ischia, Italy. pp.101--116, ⟨10.1007/978-3-642-15277-1_11⟩ |
|
|
Toward optimized code generation through model-based optimizationDATE 2010 - Design, Automation and Test in Europe Conference and Exhibition, Mar 2010, Dresden, Germany. pp.1313--1316, ⟨10.1109/DATE.2010.5457010⟩ |
An MDE approach for modeling network on chip topologiesDesign and Technology of Integrated Systems in Nanoscale Era (DTIS), 2010 5th International Conference on, Mar 2010, Hammamet, Tunisia. ⟨10.1109/DTIS.2010.5487596⟩ |
|
|
|
Does Code Generation Promote or Prevent Optimizations?ISORC 2010 - 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, May 2010, Parador of Carmona, Spain. pp.75--79, ⟨10.1109/ISORC.2010.25⟩ |
|
|
Modeling of Configurations for Embedded System Implementations in MARTE1st workshop on Model Based Engineering for Embedded Systems Design - Design, Automation and Test in Europe (DATE 2010), Mar 2010, Dresden, Germany |
|
|
Mapping Real Time Applications on NoC Architecture with Hybrid Multi-objective AlgorithmMETA 2010 - The International Conference on Metaheuristics and Nature Inspired Computing, Oct 2010, Djerba Island, Tunisia |
Interaction between inter-repetition dependences and high-level transformations in Array-OLConference on Design and Architectures for Signal and Image Processing (DASIP 2009), 2009, Sophia Antipolis, France |
|
High Level Loop Transformations for Multidimensional Signal Processing Embedded ApplicationsInternational Symposium on Systems, Architectures, MOdeling, and Simulation (SAMOS VIII), 2008, Samos, Greece |
|
Using the UML Profile for MARTE to MPSoC Co-DesignFirst International Conference on Embedded Systems & Critical Applications (ICESCA'08), May 2008, Tunis, Tunisia |
|
An Hybrid algorithm for Mapping on NoC Architectures2nd International Conference on Metaheuristics and Nature Inspired Computing, META'08, 2008, Hammamet, Tunisia |
|
Using An MDE Approach for Modeling of Interconnection networksThe International Symposium on Parallel Architectures, Algorithms and Networks Conference (ISPAN 08), 2008, Sydney, Australia |
|
Gaspard2: from MARTE to SystemC SimulationProceeedings of the DATE'08 workshop on Modeling and Analyzis of Real-Time and Embedded Systems with the MARTE UML profile, Mar 2008, Washington, United States |
|
Une approche modèle pour la génération de scénarios de tests : Application au système ERTMS/ETCSWorkshop International : Logistique and Transport 2007, 2007, Sousse, Tunisie |
|
Model-Based Testing of the ERTMS System with SysML and MARTEMoDeVVa'07, 2007, Nashville, United States |
|
Multi-objective Mapping for NoC Architectures1st International Conference on Digital Communications and Computer Applications, 2007, Irbid, Jordan. pp.132-139 |
|
Repetitive Allocation Modeling with MARTEForum on specification and design languages (FDL'07), 2007, Barcelona, Spain |
|
Synchronous Modeling of Data-Intensive ApplicationsInternational Open Workshop on Synchronous Programming (Synchron 2006), 2006, Alpe d'Huez, France |
|
|
|
Vers des transformations d'applications à parallélisme de données en équations synchrones9ème édition de SYMPosium en Architectures nouvelles de machines, Oct 2006, Perpignan, France |
UML2 Profile for Modeling Controlled Data Parallel ApplicationsForum on specification and Design Languages (FDL'06), 2006, Darmstadt, Germany |
|
Why to do Without Model Driven Architecture in Embedded System Codesign?The first annual IEEE BENELUX/DSP Valley Signal Processing Symposium, (SPS-DARTS 2005), 2005, Antwerp, Belgium |
|
Projection of the Array-OL Specification Language onto the Kahn Process Network Computation ModelInternational Symposium on Parallel Architectures, Algorithms, and Networks, 2005, Las Vegas, Nevada, United States |
|
The case for Globally Irregular Locally Regular Algorithm Architecture AdequationJournées Francophones sur l'Adéquation Algorithme Architecture (JFAAA'05), 2005, Dijon, France |
|
Towards UML 2 Extensions for Compact Modeling of Regular Complex Topologies - A partial answer to the MARTE RFPMoDELS/UML 2005, ACM/IEEE 8th International Conference on Model Driven Engineering Languages and Systems, 2005, Montego Bay, Jamaica. pp.445-459 |
|
Traceability and Interoperability at Different Levels of Abstraction in Model TransformationsForum on Specification and Design Languages, FDL'05, 2005, Lausanne, Switzerland |
|
|
|
Introducing Control in the Gaspard2 Data-Parallel Metamodel: Synchronous ApproachInternational Workshop MARTES: Modeling and Analysis of Real-Time and Embedded Systems, Oct 2005, Montego Bay, Jamaica |
Model Driven Scheduling Framework for Multiprocessor SoC DesignWorkshop on Scheduling for Parallel Computing (SPC 2005), 2005, Poznan, Poland |
|
Model Driven Engineering for SoC Co-DesignNEWCAS'05, IEEE, 2005, Québec, Canada |
|
|
|
Mode-Automata based Methodology for ScadeHybrid Systems: Computation and Control (HSCC05), Mar 2005, Zurich, Switzerland |
Model Driven Engineering for Regular MPSoC Co-designReCoSoC-05, 2005, Montpellier, France |
|
Regular Hardware Architecture Modeling with UML2FDL04, 2004, Lille, France |
|
MDA for SoC Design, UML to SystemC ExperimentUML-SOC'04-International Workshop on UML for SoC Design, Jan 2004, unknown, United States |
|
MDA for SoC Design, Intensive Signal Processing ExperimentFDL'03, ECSI, 2003, Frankfurt, Germany |
|
Sophocles: Cyber-Enterprise for System-on-Chip Distributed Simulation -- Model UnificationIFIP International Workshop on IP Based System-on-Chip Design, 2003, Grenoble, France |
|
MDA for SoC Embedded Design, Intensive Signal Processing ExperimentSIVOES-MDA, 2003, San Francisco, United States |
|
Visual Data-parallel Programming for Signal Processing Applications9th Euromicro Workshop on Parallel and Distributed Processing, PDP 2001, 2001, Mantova, Italy. pp.105--112 |
|
A Visual Development Environment for Meta-Computing ApplicationsHCI International 2001, 9th Int'l Conf. on Human-Computer Interaction, 2001, New Orleans, Lousiana, United States |
|
Assembling Dynamic Components for Metacomputing using CORBAParallel Computing, 2001, Naples, Italy |
|
High Level Parallelization of a 3D Electromagnetic Simulation Code With Irregular Communication Patterns4th International Meeting on Vector and Parallel Processing (VECPAR'2000), 2000, Porto, Portugal. pp.519--528 |
|
Parallélisation d'un code 3D Magnétostatique avec le Langage de Programmation High Performance FortranConférence Européenne sur les Méthodes Numériques en Éléctomagnétisme, NUMELEC'2000 (poster session), 2000, Poitiers, France. pp.184-185 |
|
Parallelization of 3D Magnetostatic Code Using High Performance FortranInternational Conference on Parallel Computing in Electrical Engineering, PARELEC'2000, 2000, Trois-Rivières, Quebec, Canada. pp.181--185 |
|
Une approche à la SQL du traitement de données intensif dans GaspardRenPar'11, Rencontres Francophones du Parallélisme des Architectures et des Systèmes, 1999, Rennes, France |
|
Parallelization of a Fortran 90 Program for Electromagnetic Problems3rd Annual HPF User Group Meeting, HUG'99, 1999, Redondo Beach, CA, United States |
|
Scanning polyhedra without DO-loopsPACT'98, 1998, Paris, France. pp.4-11 |
|
Communication Pre-evaluation in HPFEuro-Par'98, 1998, Southampton, United Kingdom. pp.263-272 |
|
Code generation in BouclettesProceedings of the Fifth Euromicro Workshop on Parallel and Distributed Processing, 1997, London, United Kingdom. pp.273--280 |
|
Bouclettes: A Fortran Loop ParallelizerHPCN 96, 1996, Bruxelles, Belgium. pp.784-791 |
|
Evaluation of Automatic Parallelization Strategies for HPF CompilersHPCN 96, 1996, Bruxelles, Belgium. pp.778-783 |
|
Heuristics for the evaluation of array expressions on state-of-the-art massively parallel machinesAlgorithms and Parallel VLSI Architectures III, 1995, Unknown, pp.319-330 |
|
Evaluating array expressions on massively parallel machines with communication/computation overlapParallel Processing: CONPAR94 - VAPP VI, 1994, Unknown, pp.713-724 |
|
Experimental Evaluation of Affine Schedules for Matrix Multiplication on the MasPar ArchitectureProceedings MPCS'94, 1994, Ischia, Italy. pp.452--459 |
|
(Pen)-ultimate tiling?Proceedings of the IEEE Scalable High Performance Computing Conference, 1994, Knoxville, TN, United States. pp.568-576 |
|
|
Spiking Neural Computing in Memristive Neuromorphic PlatformsSpringer Nature, Handbook of Memristor Networks, , In press, 978-3-319-76375-0. ⟨10.1007/978-3-319-76375-0_25⟩ |
Static and Dynamic Mapping Heuristics for Multiprocessor Systems-on-ChipGamatié, Abdoulaye. Computing in Research and Development in Africa, Springer International Publishing, pp.229--247, 2014, 978-3-319-08238-7 978-3-319-08239-4 |
|
Design Space Exploration for Efficient Data Intensive Computing on SoCsBorko Furht and Armando Escalante. Handbook of Data Intensive Computing, Springer, 2011 |
|
UML2 Profile for Modeling Controlled Data Parallel ApplicationsHuss, Sorin Alexander. Advances in Design and Specification Languages for SoCs, Selected contributions from FDL'06, Springer, 2007, ChDL |
|
Model Driven Engineering for System-on-Chip DesignJean-Philippe Babau and Joël Champeau and Sébastien Gérard. From MDD concepts to experiments and illustrations, ISTE, Hermes science and Lavoisier, 2006, 1-905209-59-0 |
|
Towards Distributed Process Networks with CORBAFrédéric Desprez. Algorithms and Tools for Parallel Computing On Heterogeneous Clusters, Nova Science Publishers, Inc, 2006 |
|
Model Driven Architecture for Intensive Embedded SystemsSébastien Gérard and Jean-Philippe Babeau and Joël Champeau. Model Driven Engineering for Distributed Embedded Real-Time Systems, ISTE, Hermes science and Lavoisier, 2005, 1-905209-32-0 |
|
Evaluating Array Expressions on Massively Parallel Machines with Communication/Computation OverlapB. Buchberger and J. Volkert. Parallel Processing: CONPAR 94-VAPP VI, 854, Springer Verlag, pp.713-724, 1994, LNCS |
Advances in Design and Specification Languages for SoCs Selected Contributions from FDL'04Pierre Boulet. Kluwer Academic Publishers, pp.303, 2005, 0-387-26149-4. ⟨10.1007/b136935⟩ |
MultimodalBirdsAutre publication scientifique hal-05540404v1 |
|
|
|
Consommation énergétique des technologies blockchain2021 |
|
|
Playing the Pinball game with Spiking Neural NetworksNeuromorphic Computing for Development and Learning Workshop (NCDL), Sep 2025, Prague, Czech Republic |
|
|
N2S3, a Simulator for the Architecture Exploration of Neuromorphic AcceleratorsNeuComp 2015, Mar 2015, Grenoble, France. 2015 |
|
|
Parallel Hyperparameter Optimization Of Spiking Neural Networks2023 |
|
|
Outils pour la parallélisation automatiqueGénie logiciel [cs.SE]. Ecole normale supérieure de lyon - ENS LYON, 1996. Français. ⟨NNT : ⟩ |
|
|
Contributions aux environnements de programmation pour le calcul intensifGénie logiciel [cs.SE]. Université des Sciences et Technologie de Lille - Lille I, 2002 |